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lpc2900.c 54 KiB

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  1. /***************************************************************************
  2. * Copyright (C) 2009 by *
  3. * Rolf Meeser <rolfm_9dq@yahoo.de> *
  4. * *
  5. * This program is free software; you can redistribute it and/or modify *
  6. * it under the terms of the GNU General Public License as published by *
  7. * the Free Software Foundation; either version 2 of the License, or *
  8. * (at your option) any later version. *
  9. * *
  10. * This program is distributed in the hope that it will be useful, *
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  13. * GNU General Public License for more details. *
  14. * *
  15. * You should have received a copy of the GNU General Public License *
  16. * along with this program; if not, write to the *
  17. * Free Software Foundation, Inc., *
  18. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  19. ***************************************************************************/
  20. #ifdef HAVE_CONFIG_H
  21. #include "config.h"
  22. #endif
  23. #include "image.h"
  24. #include "lpc2900.h"
  25. #include "binarybuffer.h"
  26. #include "armv4_5.h"
  27. /* 1024 bytes */
  28. #define KiB 1024
  29. /* Some flash constants */
  30. #define FLASH_PAGE_SIZE 512 /* bytes */
  31. #define FLASH_ERASE_TIME 100000 /* microseconds */
  32. #define FLASH_PROGRAM_TIME 1000 /* microseconds */
  33. /* Chip ID / Feature Registers */
  34. #define CHIPID 0xE0000000 /* Chip ID */
  35. #define FEAT0 0xE0000100 /* Chip feature 0 */
  36. #define FEAT1 0xE0000104 /* Chip feature 1 */
  37. #define FEAT2 0xE0000108 /* Chip feature 2 (contains flash size indicator) */
  38. #define FEAT3 0xE000010C /* Chip feature 3 */
  39. #define EXPECTED_CHIPID 0x209CE02B /* Chip ID of all LPC2900 devices */
  40. /* Flash/EEPROM Control Registers */
  41. #define FCTR 0x20200000 /* Flash control */
  42. #define FPTR 0x20200008 /* Flash program-time */
  43. #define FTCTR 0x2020000C /* Flash test control */
  44. #define FBWST 0x20200010 /* Flash bridge wait-state */
  45. #define FCRA 0x2020001C /* Flash clock divider */
  46. #define FMSSTART 0x20200020 /* Flash Built-In Selft Test start address */
  47. #define FMSSTOP 0x20200024 /* Flash Built-In Selft Test stop address */
  48. #define FMS16 0x20200028 /* Flash 16-bit signature */
  49. #define FMSW0 0x2020002C /* Flash 128-bit signature Word 0 */
  50. #define FMSW1 0x20200030 /* Flash 128-bit signature Word 1 */
  51. #define FMSW2 0x20200034 /* Flash 128-bit signature Word 2 */
  52. #define FMSW3 0x20200038 /* Flash 128-bit signature Word 3 */
  53. #define EECMD 0x20200080 /* EEPROM command */
  54. #define EEADDR 0x20200084 /* EEPROM address */
  55. #define EEWDATA 0x20200088 /* EEPROM write data */
  56. #define EERDATA 0x2020008C /* EEPROM read data */
  57. #define EEWSTATE 0x20200090 /* EEPROM wait state */
  58. #define EECLKDIV 0x20200094 /* EEPROM clock divider */
  59. #define EEPWRDWN 0x20200098 /* EEPROM power-down/start */
  60. #define EEMSSTART 0x2020009C /* EEPROM BIST start address */
  61. #define EEMSSTOP 0x202000A0 /* EEPROM BIST stop address */
  62. #define EEMSSIG 0x202000A4 /* EEPROM 24-bit BIST signature */
  63. #define INT_CLR_ENABLE 0x20200FD8 /* Flash/EEPROM interrupt clear enable */
  64. #define INT_SET_ENABLE 0x20200FDC /* Flash/EEPROM interrupt set enable */
  65. #define INT_STATUS 0x20200FE0 /* Flash/EEPROM interrupt status */
  66. #define INT_ENABLE 0x20200FE4 /* Flash/EEPROM interrupt enable */
  67. #define INT_CLR_STATUS 0x20200FE8 /* Flash/EEPROM interrupt clear status */
  68. #define INT_SET_STATUS 0x20200FEC /* Flash/EEPROM interrupt set status */
  69. /* Interrupt sources */
  70. #define INTSRC_END_OF_PROG (1 << 28)
  71. #define INTSRC_END_OF_BIST (1 << 27)
  72. #define INTSRC_END_OF_RDWR (1 << 26)
  73. #define INTSRC_END_OF_MISR (1 << 2)
  74. #define INTSRC_END_OF_BURN (1 << 1)
  75. #define INTSRC_END_OF_ERASE (1 << 0)
  76. /* FCTR bits */
  77. #define FCTR_FS_LOADREQ (1 << 15)
  78. #define FCTR_FS_CACHECLR (1 << 14)
  79. #define FCTR_FS_CACHEBYP (1 << 13)
  80. #define FCTR_FS_PROGREQ (1 << 12)
  81. #define FCTR_FS_RLS (1 << 11)
  82. #define FCTR_FS_PDL (1 << 10)
  83. #define FCTR_FS_PD (1 << 9)
  84. #define FCTR_FS_WPB (1 << 7)
  85. #define FCTR_FS_ISS (1 << 6)
  86. #define FCTR_FS_RLD (1 << 5)
  87. #define FCTR_FS_DCR (1 << 4)
  88. #define FCTR_FS_WEB (1 << 2)
  89. #define FCTR_FS_WRE (1 << 1)
  90. #define FCTR_FS_CS (1 << 0)
  91. /* FPTR bits */
  92. #define FPTR_EN_T (1 << 15)
  93. /* FTCTR bits */
  94. #define FTCTR_FS_BYPASS_R (1 << 29)
  95. #define FTCTR_FS_BYPASS_W (1 << 28)
  96. /* FMSSTOP bits */
  97. #define FMSSTOP_MISR_START (1 << 17)
  98. /* EEMSSTOP bits */
  99. #define EEMSSTOP_STRTBIST (1 << 31)
  100. /* Index sector */
  101. #define ISS_CUSTOMER_START1 (0x830)
  102. #define ISS_CUSTOMER_END1 (0xA00)
  103. #define ISS_CUSTOMER_SIZE1 (ISS_CUSTOMER_END1 - ISS_CUSTOMER_START1)
  104. #define ISS_CUSTOMER_NWORDS1 (ISS_CUSTOMER_SIZE1 / 4)
  105. #define ISS_CUSTOMER_START2 (0xA40)
  106. #define ISS_CUSTOMER_END2 (0xC00)
  107. #define ISS_CUSTOMER_SIZE2 (ISS_CUSTOMER_END2 - ISS_CUSTOMER_START2)
  108. #define ISS_CUSTOMER_NWORDS2 (ISS_CUSTOMER_SIZE2 / 4)
  109. #define ISS_CUSTOMER_SIZE (ISS_CUSTOMER_SIZE1 + ISS_CUSTOMER_SIZE2)
  110. /**
  111. * Private data for \c lpc2900 flash driver.
  112. */
  113. typedef struct lpc2900_flash_bank_s
  114. {
  115. /**
  116. * Holds the value read from CHIPID register.
  117. * The driver will not load if the chipid doesn't match the expected
  118. * value of 0x209CE02B of the LPC2900 family. A probe will only be done
  119. * if the chipid does not yet contain the expected value.
  120. */
  121. uint32_t chipid;
  122. /**
  123. * String holding device name.
  124. * This string is set by the probe function to the type number of the
  125. * device. It takes the form "LPC29xx".
  126. */
  127. char * target_name;
  128. /**
  129. * System clock frequency.
  130. * Holds the clock frequency in Hz, as passed by the configuration file
  131. * to the <tt>flash bank</tt> command.
  132. */
  133. uint32_t clk_sys_fmc;
  134. /**
  135. * Flag to indicate that dangerous operations are possible.
  136. * This flag can be set by passing the correct password to the
  137. * <tt>lpc2900 password</tt> command. If set, other dangerous commands,
  138. * which operate on the index sector, can be executed.
  139. */
  140. uint32_t risky;
  141. /**
  142. * Maximum contiguous block of internal SRAM (bytes).
  143. * Autodetected by the driver. Not the total amount of SRAM, only the
  144. * the largest \em contiguous block!
  145. */
  146. uint32_t max_ram_block;
  147. } lpc2900_flash_bank_t;
  148. static int lpc2900_register_commands(struct command_context_s *cmd_ctx);
  149. static int lpc2900_flash_bank_command(struct command_context_s *cmd_ctx,
  150. char *cmd, char **args, int argc,
  151. struct flash_bank_s *bank);
  152. static int lpc2900_erase(struct flash_bank_s *bank, int first, int last);
  153. static int lpc2900_protect(struct flash_bank_s *bank, int set, int first, int last);
  154. static int lpc2900_write(struct flash_bank_s *bank,
  155. uint8_t *buffer, uint32_t offset, uint32_t count);
  156. static int lpc2900_probe(struct flash_bank_s *bank);
  157. static int lpc2900_erase_check(struct flash_bank_s *bank);
  158. static int lpc2900_protect_check(struct flash_bank_s *bank);
  159. static int lpc2900_info(struct flash_bank_s *bank, char *buf, int buf_size);
  160. static uint32_t lpc2900_wait_status(flash_bank_t *bank, uint32_t mask, int timeout);
  161. static void lpc2900_setup(struct flash_bank_s *bank);
  162. static uint32_t lpc2900_is_ready(struct flash_bank_s *bank);
  163. static uint32_t lpc2900_read_security_status(struct flash_bank_s *bank);
  164. static uint32_t lpc2900_run_bist128(struct flash_bank_s *bank,
  165. uint32_t addr_from, uint32_t addr_to,
  166. uint32_t (*signature)[4] );
  167. static uint32_t lpc2900_address2sector(struct flash_bank_s *bank, uint32_t offset);
  168. static uint32_t lpc2900_calc_tr( uint32_t clock, uint32_t time );
  169. /*********************** Helper functions **************************/
  170. /**
  171. * Wait for an event in mask to occur in INT_STATUS.
  172. *
  173. * Return when an event occurs, or after a timeout.
  174. *
  175. * @param[in] bank Pointer to the flash bank descriptor
  176. * @param[in] mask Mask to be used for INT_STATUS
  177. * @param[in] timeout Timeout in ms
  178. */
  179. static uint32_t lpc2900_wait_status( flash_bank_t *bank,
  180. uint32_t mask,
  181. int timeout )
  182. {
  183. uint32_t int_status;
  184. target_t *target = bank->target;
  185. do
  186. {
  187. alive_sleep(1);
  188. timeout--;
  189. target_read_u32(target, INT_STATUS, &int_status);
  190. }
  191. while( ((int_status & mask) == 0) && (timeout != 0) );
  192. if (timeout == 0)
  193. {
  194. LOG_DEBUG("Timeout!");
  195. return ERROR_FLASH_OPERATION_FAILED;
  196. }
  197. return ERROR_OK;
  198. }
  199. /**
  200. * Set up the flash for erase/program operations.
  201. *
  202. * Enable the flash, and set the correct CRA clock of 66 kHz.
  203. *
  204. * @param bank Pointer to the flash bank descriptor
  205. */
  206. static void lpc2900_setup( struct flash_bank_s *bank )
  207. {
  208. uint32_t fcra;
  209. lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
  210. /* Power up the flash block */
  211. target_write_u32( bank->target, FCTR, FCTR_FS_WEB | FCTR_FS_CS );
  212. fcra = (lpc2900_info->clk_sys_fmc / (3 * 66000)) - 1;
  213. target_write_u32( bank->target, FCRA, fcra );
  214. }
  215. /**
  216. * Check if device is ready.
  217. *
  218. * Check if device is ready for flash operation:
  219. * Must have been successfully probed.
  220. * Must be halted.
  221. */
  222. static uint32_t lpc2900_is_ready( struct flash_bank_s *bank )
  223. {
  224. lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
  225. if( lpc2900_info->chipid != EXPECTED_CHIPID )
  226. {
  227. return ERROR_FLASH_BANK_NOT_PROBED;
  228. }
  229. if( bank->target->state != TARGET_HALTED )
  230. {
  231. LOG_ERROR( "Target not halted" );
  232. return ERROR_TARGET_NOT_HALTED;
  233. }
  234. return ERROR_OK;
  235. }
  236. /**
  237. * Read the status of sector security from the index sector.
  238. *
  239. * @param bank Pointer to the flash bank descriptor
  240. */
  241. static uint32_t lpc2900_read_security_status( struct flash_bank_s *bank )
  242. {
  243. uint32_t status;
  244. if( (status = lpc2900_is_ready( bank )) != ERROR_OK )
  245. {
  246. return status;
  247. }
  248. target_t *target = bank->target;
  249. /* Enable ISS access */
  250. target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB | FCTR_FS_ISS);
  251. /* Read the relevant block of memory from the ISS sector */
  252. uint32_t iss_secured_field[ 0x230/16 ][ 4 ];
  253. target_read_memory(target, bank->base + 0xC00, 4, 0x230/4,
  254. (uint8_t *)iss_secured_field);
  255. /* Disable ISS access */
  256. target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
  257. /* Check status of each sector. Note that the sector numbering in the LPC2900
  258. * is different from the logical sector numbers used in OpenOCD!
  259. * Refer to the user manual for details.
  260. *
  261. * All zeros (16x 0x00) are treated as a secured sector (is_protected = 1)
  262. * All ones (16x 0xFF) are treated as a non-secured sector (is_protected = 0)
  263. * Anything else is undefined (is_protected = -1). This is treated as
  264. * a protected sector!
  265. */
  266. int sector;
  267. int index;
  268. for( sector = 0; sector < bank->num_sectors; sector++ )
  269. {
  270. /* Convert logical sector number to physical sector number */
  271. if( sector <= 4 )
  272. {
  273. index = sector + 11;
  274. }
  275. else if( sector <= 7 )
  276. {
  277. index = sector + 27;
  278. }
  279. else
  280. {
  281. index = sector - 8;
  282. }
  283. bank->sectors[sector].is_protected = -1;
  284. if (
  285. (iss_secured_field[index][0] == 0x00000000) &&
  286. (iss_secured_field[index][1] == 0x00000000) &&
  287. (iss_secured_field[index][2] == 0x00000000) &&
  288. (iss_secured_field[index][3] == 0x00000000) )
  289. {
  290. bank->sectors[sector].is_protected = 1;
  291. }
  292. if (
  293. (iss_secured_field[index][0] == 0xFFFFFFFF) &&
  294. (iss_secured_field[index][1] == 0xFFFFFFFF) &&
  295. (iss_secured_field[index][2] == 0xFFFFFFFF) &&
  296. (iss_secured_field[index][3] == 0xFFFFFFFF) )
  297. {
  298. bank->sectors[sector].is_protected = 0;
  299. }
  300. }
  301. return ERROR_OK;
  302. }
  303. /**
  304. * Use BIST to calculate a 128-bit hash value over a range of flash.
  305. *
  306. * @param bank Pointer to the flash bank descriptor
  307. * @param addr_from
  308. * @param addr_to
  309. * @param signature
  310. */
  311. static uint32_t lpc2900_run_bist128(struct flash_bank_s *bank,
  312. uint32_t addr_from,
  313. uint32_t addr_to,
  314. uint32_t (*signature)[4] )
  315. {
  316. target_t *target = bank->target;
  317. /* Clear END_OF_MISR interrupt status */
  318. target_write_u32( target, INT_CLR_STATUS, INTSRC_END_OF_MISR );
  319. /* Start address */
  320. target_write_u32( target, FMSSTART, addr_from >> 4);
  321. /* End address, and issue start command */
  322. target_write_u32( target, FMSSTOP, (addr_to >> 4) | FMSSTOP_MISR_START );
  323. /* Poll for end of operation. Calculate a reasonable timeout. */
  324. if( lpc2900_wait_status( bank, INTSRC_END_OF_MISR, 1000 ) != ERROR_OK )
  325. {
  326. return ERROR_FLASH_OPERATION_FAILED;
  327. }
  328. /* Return the signature */
  329. target_read_memory( target, FMSW0, 4, 4, (uint8_t *)signature );
  330. return ERROR_OK;
  331. }
  332. /**
  333. * Return sector number for given address.
  334. *
  335. * Return the (logical) sector number for a given relative address.
  336. * No sanity check is done. It assumed that the address is valid.
  337. *
  338. * @param bank Pointer to the flash bank descriptor
  339. * @param offset Offset address relative to bank start
  340. */
  341. static uint32_t lpc2900_address2sector( struct flash_bank_s *bank,
  342. uint32_t offset )
  343. {
  344. uint32_t address = bank->base + offset;
  345. /* Run through all sectors of this bank */
  346. int sector;
  347. for( sector = 0; sector < bank->num_sectors; sector++ )
  348. {
  349. /* Return immediately if address is within the current sector */
  350. if( address < (bank->sectors[sector].offset + bank->sectors[sector].size) )
  351. {
  352. return sector;
  353. }
  354. }
  355. /* We should never come here. If we do, return an arbitrary sector number. */
  356. return 0;
  357. }
  358. /**
  359. * Write one page to the index sector.
  360. *
  361. * @param bank Pointer to the flash bank descriptor
  362. * @param pagenum Page number (0...7)
  363. * @param page Page array (FLASH_PAGE_SIZE bytes)
  364. */
  365. static int lpc2900_write_index_page( struct flash_bank_s *bank,
  366. int pagenum,
  367. uint8_t (*page)[FLASH_PAGE_SIZE] )
  368. {
  369. /* Only pages 4...7 are user writable */
  370. if ((pagenum < 4) || (pagenum > 7))
  371. {
  372. LOG_ERROR("Refuse to burn index sector page %d", pagenum);
  373. return ERROR_COMMAND_ARGUMENT_INVALID;
  374. }
  375. /* Get target, and check if it's halted */
  376. target_t *target = bank->target;
  377. if( target->state != TARGET_HALTED )
  378. {
  379. LOG_ERROR( "Target not halted" );
  380. return ERROR_TARGET_NOT_HALTED;
  381. }
  382. /* Private info */
  383. lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
  384. /* Enable flash block and set the correct CRA clock of 66 kHz */
  385. lpc2900_setup( bank );
  386. /* Un-protect the index sector */
  387. target_write_u32( target, bank->base, 0 );
  388. target_write_u32( target, FCTR,
  389. FCTR_FS_LOADREQ | FCTR_FS_WPB | FCTR_FS_ISS |
  390. FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS );
  391. /* Set latch load mode */
  392. target_write_u32( target, FCTR,
  393. FCTR_FS_ISS | FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS );
  394. /* Write whole page to flash data latches */
  395. if( target_write_memory( target,
  396. bank->base + pagenum * FLASH_PAGE_SIZE,
  397. 4, FLASH_PAGE_SIZE / 4, (uint8_t *)page) != ERROR_OK )
  398. {
  399. LOG_ERROR("Index sector write failed @ page %d", pagenum);
  400. target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB );
  401. return ERROR_FLASH_OPERATION_FAILED;
  402. }
  403. /* Clear END_OF_BURN interrupt status */
  404. target_write_u32( target, INT_CLR_STATUS, INTSRC_END_OF_BURN );
  405. /* Set the program/erase time to FLASH_PROGRAM_TIME */
  406. target_write_u32(target, FPTR,
  407. FPTR_EN_T | lpc2900_calc_tr( lpc2900_info->clk_sys_fmc,
  408. FLASH_PROGRAM_TIME ));
  409. /* Trigger flash write */
  410. target_write_u32( target, FCTR,
  411. FCTR_FS_PROGREQ | FCTR_FS_ISS |
  412. FCTR_FS_WPB | FCTR_FS_WRE | FCTR_FS_CS );
  413. /* Wait for the end of the write operation. If it's not over after one
  414. * second, something went dreadfully wrong... :-(
  415. */
  416. if (lpc2900_wait_status(bank, INTSRC_END_OF_BURN, 1000) != ERROR_OK)
  417. {
  418. LOG_ERROR("Index sector write failed @ page %d", pagenum);
  419. target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
  420. return ERROR_FLASH_OPERATION_FAILED;
  421. }
  422. target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB );
  423. return ERROR_OK;
  424. }
  425. /**
  426. * Calculate FPTR.TR register value for desired program/erase time.
  427. *
  428. * @param clock System clock in Hz
  429. * @param time Program/erase time in µs
  430. */
  431. static uint32_t lpc2900_calc_tr( uint32_t clock, uint32_t time )
  432. {
  433. /* ((time[µs]/1e6) * f[Hz]) + 511
  434. * FPTR.TR = -------------------------------
  435. * 512
  436. *
  437. * The result is the
  438. */
  439. uint32_t tr_val = (uint32_t)((((time / 1e6) * clock) + 511.0) / 512.0);
  440. return tr_val;
  441. }
  442. /*********************** Private flash commands **************************/
  443. /**
  444. * Command to determine the signature of the whole flash.
  445. *
  446. * Uses the Built-In-Self-Test (BIST) to generate a 128-bit hash value
  447. * of the flash content.
  448. *
  449. * @param cmd_ctx
  450. * @param cmd
  451. * @param args
  452. * @param argc
  453. */
  454. static int lpc2900_handle_signature_command( struct command_context_s *cmd_ctx,
  455. char *cmd, char **args, int argc )
  456. {
  457. flash_bank_t *bank;
  458. uint32_t status;
  459. uint32_t signature[4];
  460. if( argc < 1 )
  461. {
  462. LOG_WARNING( "Too few arguments. Call: lpc2900 signature <bank#>" );
  463. return ERROR_FLASH_BANK_INVALID;
  464. }
  465. /* Get the bank descriptor */
  466. bank = get_flash_bank_by_num( strtoul(args[0], NULL, 0) );
  467. if( !bank )
  468. {
  469. command_print( cmd_ctx, "flash bank '#%s' is out of bounds", args[0] );
  470. return ERROR_OK;
  471. }
  472. if( bank->target->state != TARGET_HALTED )
  473. {
  474. LOG_ERROR( "Target not halted" );
  475. return ERROR_TARGET_NOT_HALTED;
  476. }
  477. /* Run BIST over whole flash range */
  478. if( (status = lpc2900_run_bist128( bank,
  479. bank->base,
  480. bank->base + (bank->size - 1),
  481. &signature)
  482. ) != ERROR_OK )
  483. {
  484. return status;
  485. }
  486. command_print( cmd_ctx, "signature: 0x%8.8" PRIx32
  487. ":0x%8.8" PRIx32
  488. ":0x%8.8" PRIx32
  489. ":0x%8.8" PRIx32,
  490. signature[3], signature[2], signature[1], signature[0] );
  491. return ERROR_OK;
  492. }
  493. /**
  494. * Store customer info in file.
  495. *
  496. * Read customer info from index sector, and store that block of data into
  497. * a disk file. The format is binary.
  498. *
  499. * @param cmd_ctx
  500. * @param cmd
  501. * @param args
  502. * @param argc
  503. */
  504. static int lpc2900_handle_read_custom_command( struct command_context_s *cmd_ctx,
  505. char *cmd, char **args, int argc )
  506. {
  507. flash_bank_t *bank;
  508. if( argc < 2 )
  509. {
  510. return ERROR_COMMAND_SYNTAX_ERROR;
  511. }
  512. /* Get the bank descriptor */
  513. bank = get_flash_bank_by_num( strtoul(args[0], NULL, 0) );
  514. if( !bank )
  515. {
  516. command_print( cmd_ctx, "flash bank '#%s' is out of bounds", args[0] );
  517. return ERROR_OK;
  518. }
  519. lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
  520. lpc2900_info->risky = 0;
  521. /* Get target, and check if it's halted */
  522. target_t *target = bank->target;
  523. if( target->state != TARGET_HALTED )
  524. {
  525. LOG_ERROR( "Target not halted" );
  526. return ERROR_TARGET_NOT_HALTED;
  527. }
  528. /* Storage for customer info. Read in two parts */
  529. uint32_t customer[ ISS_CUSTOMER_NWORDS1 + ISS_CUSTOMER_NWORDS2 ];
  530. /* Enable access to index sector */
  531. target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB | FCTR_FS_ISS );
  532. /* Read two parts */
  533. target_read_memory( target, bank->base+ISS_CUSTOMER_START1, 4,
  534. ISS_CUSTOMER_NWORDS1,
  535. (uint8_t *)&customer[0] );
  536. target_read_memory( target, bank->base+ISS_CUSTOMER_START2, 4,
  537. ISS_CUSTOMER_NWORDS2,
  538. (uint8_t *)&customer[ISS_CUSTOMER_NWORDS1] );
  539. /* Deactivate access to index sector */
  540. target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB );
  541. /* Try and open the file */
  542. fileio_t fileio;
  543. char *filename = args[1];
  544. int ret = fileio_open( &fileio, filename, FILEIO_WRITE, FILEIO_BINARY );
  545. if( ret != ERROR_OK )
  546. {
  547. LOG_WARNING( "Could not open file %s", filename );
  548. return ret;
  549. }
  550. uint32_t nwritten;
  551. ret = fileio_write( &fileio, sizeof(customer),
  552. (const uint8_t *)customer, &nwritten );
  553. if( ret != ERROR_OK )
  554. {
  555. LOG_ERROR( "Write operation to file %s failed", filename );
  556. fileio_close( &fileio );
  557. return ret;
  558. }
  559. fileio_close( &fileio );
  560. return ERROR_OK;
  561. }
  562. /**
  563. * Enter password to enable potentially dangerous options.
  564. *
  565. * @param cmd_ctx
  566. * @param cmd
  567. * @param args
  568. * @param argc
  569. */
  570. static int lpc2900_handle_password_command(struct command_context_s *cmd_ctx,
  571. char *cmd, char **args, int argc)
  572. {
  573. flash_bank_t *bank;
  574. if (argc < 2)
  575. {
  576. return ERROR_COMMAND_SYNTAX_ERROR;
  577. }
  578. /* Get the bank descriptor */
  579. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  580. if (!bank)
  581. {
  582. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  583. return ERROR_OK;
  584. }
  585. lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
  586. #define ISS_PASSWORD "I_know_what_I_am_doing"
  587. lpc2900_info->risky = !strcmp( args[1], ISS_PASSWORD );
  588. if( !lpc2900_info->risky )
  589. {
  590. command_print(cmd_ctx, "Wrong password (use '%s')", ISS_PASSWORD);
  591. return ERROR_COMMAND_ARGUMENT_INVALID;
  592. }
  593. command_print(cmd_ctx,
  594. "Potentially dangerous operation allowed in next command!");
  595. return ERROR_OK;
  596. }
  597. /**
  598. * Write customer info from file to the index sector.
  599. *
  600. * @param cmd_ctx
  601. * @param cmd
  602. * @param args
  603. * @param argc
  604. */
  605. static int lpc2900_handle_write_custom_command( struct command_context_s *cmd_ctx,
  606. char *cmd, char **args, int argc )
  607. {
  608. if (argc < 2)
  609. {
  610. return ERROR_COMMAND_SYNTAX_ERROR;
  611. }
  612. /* Get the bank descriptor */
  613. flash_bank_t *bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  614. if (!bank)
  615. {
  616. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  617. return ERROR_OK;
  618. }
  619. lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
  620. /* Check if command execution is allowed. */
  621. if( !lpc2900_info->risky )
  622. {
  623. command_print( cmd_ctx, "Command execution not allowed!" );
  624. return ERROR_COMMAND_ARGUMENT_INVALID;
  625. }
  626. lpc2900_info->risky = 0;
  627. /* Get target, and check if it's halted */
  628. target_t *target = bank->target;
  629. if (target->state != TARGET_HALTED)
  630. {
  631. LOG_ERROR("Target not halted");
  632. return ERROR_TARGET_NOT_HALTED;
  633. }
  634. /* The image will always start at offset 0 */
  635. image_t image;
  636. image.base_address_set = 1;
  637. image.base_address = 0;
  638. image.start_address_set = 0;
  639. char *filename = args[1];
  640. char *type = (argc >= 3) ? args[2] : NULL;
  641. int retval = image_open(&image, filename, type);
  642. if (retval != ERROR_OK)
  643. {
  644. return retval;
  645. }
  646. /* Do a sanity check: The image must be exactly the size of the customer
  647. programmable area. Any other size is rejected. */
  648. if( image.num_sections != 1 )
  649. {
  650. LOG_ERROR("Only one section allowed in image file.");
  651. return ERROR_COMMAND_SYNTAX_ERROR;
  652. }
  653. if( (image.sections[0].base_address != 0) ||
  654. (image.sections[0].size != ISS_CUSTOMER_SIZE) )
  655. {
  656. LOG_ERROR("Incorrect image file size. Expected %d, "
  657. "got %" PRIu32,
  658. ISS_CUSTOMER_SIZE, image.sections[0].size);
  659. return ERROR_COMMAND_SYNTAX_ERROR;
  660. }
  661. /* Well boys, I reckon this is it... */
  662. /* Customer info is split into two blocks in pages 4 and 5. */
  663. uint8_t page[FLASH_PAGE_SIZE];
  664. /* Page 4 */
  665. uint32_t offset = ISS_CUSTOMER_START1 % FLASH_PAGE_SIZE;
  666. memset( page, 0xff, FLASH_PAGE_SIZE );
  667. uint32_t size_read;
  668. retval = image_read_section( &image, 0, 0,
  669. ISS_CUSTOMER_SIZE1, &page[offset], &size_read);
  670. if( retval != ERROR_OK )
  671. {
  672. LOG_ERROR("couldn't read from file '%s'", filename);
  673. image_close(&image);
  674. return retval;
  675. }
  676. if( (retval = lpc2900_write_index_page( bank, 4, &page )) != ERROR_OK )
  677. {
  678. image_close(&image);
  679. return retval;
  680. }
  681. /* Page 5 */
  682. offset = ISS_CUSTOMER_START2 % FLASH_PAGE_SIZE;
  683. memset( page, 0xff, FLASH_PAGE_SIZE );
  684. retval = image_read_section( &image, 0, ISS_CUSTOMER_SIZE1,
  685. ISS_CUSTOMER_SIZE2, &page[offset], &size_read);
  686. if( retval != ERROR_OK )
  687. {
  688. LOG_ERROR("couldn't read from file '%s'", filename);
  689. image_close(&image);
  690. return retval;
  691. }
  692. if( (retval = lpc2900_write_index_page( bank, 5, &page )) != ERROR_OK )
  693. {
  694. image_close(&image);
  695. return retval;
  696. }
  697. image_close(&image);
  698. return ERROR_OK;
  699. }
  700. /**
  701. * Activate 'sector security' for a range of sectors.
  702. *
  703. * @param cmd_ctx
  704. * @param cmd
  705. * @param args
  706. * @param argc
  707. */
  708. static int lpc2900_handle_secure_sector_command(struct command_context_s *cmd_ctx,
  709. char *cmd, char **args, int argc)
  710. {
  711. if (argc < 3)
  712. {
  713. return ERROR_COMMAND_SYNTAX_ERROR;
  714. }
  715. /* Get the bank descriptor */
  716. flash_bank_t *bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  717. if (!bank)
  718. {
  719. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  720. return ERROR_OK;
  721. }
  722. lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
  723. /* Check if command execution is allowed. */
  724. if( !lpc2900_info->risky )
  725. {
  726. command_print( cmd_ctx, "Command execution not allowed! "
  727. "(use 'password' command first)");
  728. return ERROR_COMMAND_ARGUMENT_INVALID;
  729. }
  730. lpc2900_info->risky = 0;
  731. /* Read sector range, and do a sanity check. */
  732. int first = strtoul(args[1], NULL, 0);
  733. int last = strtoul(args[2], NULL, 0);
  734. if( (first >= bank->num_sectors) ||
  735. (last >= bank->num_sectors) ||
  736. (first > last) )
  737. {
  738. command_print( cmd_ctx, "Illegal sector range" );
  739. return ERROR_COMMAND_ARGUMENT_INVALID;
  740. }
  741. uint8_t page[FLASH_PAGE_SIZE];
  742. int sector;
  743. int retval;
  744. /* Sectors in page 6 */
  745. if( (first <= 4) || (last >= 8) )
  746. {
  747. memset( &page, 0xff, FLASH_PAGE_SIZE );
  748. for( sector = first; sector <= last; sector++ )
  749. {
  750. if( sector <= 4 )
  751. {
  752. memset( &page[0xB0 + 16*sector], 0, 16 );
  753. }
  754. else if( sector >= 8 )
  755. {
  756. memset( &page[0x00 + 16*(sector - 8)], 0, 16 );
  757. }
  758. }
  759. if( (retval = lpc2900_write_index_page( bank, 6, &page )) != ERROR_OK )
  760. {
  761. LOG_ERROR("failed to update index sector page 6");
  762. return retval;
  763. }
  764. }
  765. /* Sectors in page 7 */
  766. if( (first <= 7) && (last >= 5) )
  767. {
  768. memset( &page, 0xff, FLASH_PAGE_SIZE );
  769. for( sector = first; sector <= last; sector++ )
  770. {
  771. if( (sector >= 5) && (sector <= 7) )
  772. {
  773. memset( &page[0x00 + 16*(sector - 5)], 0, 16 );
  774. }
  775. }
  776. if( (retval = lpc2900_write_index_page( bank, 7, &page )) != ERROR_OK )
  777. {
  778. LOG_ERROR("failed to update index sector page 7");
  779. return retval;
  780. }
  781. }
  782. command_print( cmd_ctx,
  783. "Sectors security will become effective after next power cycle");
  784. /* Update the sector security status */
  785. if ( lpc2900_read_security_status(bank) != ERROR_OK )
  786. {
  787. LOG_ERROR( "Cannot determine sector security status" );
  788. return ERROR_FLASH_OPERATION_FAILED;
  789. }
  790. return ERROR_OK;
  791. }
  792. /**
  793. * Activate JTAG protection.
  794. *
  795. * @param cmd_ctx
  796. * @param cmd
  797. * @param args
  798. * @param argc
  799. */
  800. static int lpc2900_handle_secure_jtag_command(struct command_context_s *cmd_ctx,
  801. char *cmd, char **args, int argc)
  802. {
  803. if (argc < 1)
  804. {
  805. return ERROR_COMMAND_SYNTAX_ERROR;
  806. }
  807. /* Get the bank descriptor */
  808. flash_bank_t *bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  809. if (!bank)
  810. {
  811. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  812. return ERROR_OK;
  813. }
  814. lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
  815. /* Check if command execution is allowed. */
  816. if( !lpc2900_info->risky )
  817. {
  818. command_print( cmd_ctx, "Command execution not allowed! "
  819. "(use 'password' command first)");
  820. return ERROR_COMMAND_ARGUMENT_INVALID;
  821. }
  822. lpc2900_info->risky = 0;
  823. /* Prepare page */
  824. uint8_t page[FLASH_PAGE_SIZE];
  825. memset( &page, 0xff, FLASH_PAGE_SIZE );
  826. /* Insert "soft" protection word */
  827. page[0x30 + 15] = 0x7F;
  828. page[0x30 + 11] = 0x7F;
  829. page[0x30 + 7] = 0x7F;
  830. page[0x30 + 3] = 0x7F;
  831. /* Write to page 5 */
  832. int retval;
  833. if( (retval = lpc2900_write_index_page( bank, 5, &page ))
  834. != ERROR_OK )
  835. {
  836. LOG_ERROR("failed to update index sector page 5");
  837. return retval;
  838. }
  839. LOG_INFO("JTAG security set. Good bye!");
  840. return ERROR_OK;
  841. }
  842. /*********************** Flash interface functions **************************/
  843. /**
  844. * Register private command handlers.
  845. *
  846. * @param cmd_ctx
  847. */
  848. static int lpc2900_register_commands(struct command_context_s *cmd_ctx)
  849. {
  850. command_t *lpc2900_cmd = register_command(cmd_ctx, NULL, "lpc2900",
  851. NULL, COMMAND_ANY, NULL);
  852. register_command(
  853. cmd_ctx,
  854. lpc2900_cmd,
  855. "signature",
  856. lpc2900_handle_signature_command,
  857. COMMAND_EXEC,
  858. "<bank> | "
  859. "print device signature of flash bank");
  860. register_command(
  861. cmd_ctx,
  862. lpc2900_cmd,
  863. "read_custom",
  864. lpc2900_handle_read_custom_command,
  865. COMMAND_EXEC,
  866. "<bank> <filename> | "
  867. "read customer information from index sector to file");
  868. register_command(
  869. cmd_ctx,
  870. lpc2900_cmd,
  871. "password",
  872. lpc2900_handle_password_command,
  873. COMMAND_EXEC,
  874. "<bank> <password> | "
  875. "enter password to enable 'dangerous' options");
  876. register_command(
  877. cmd_ctx,
  878. lpc2900_cmd,
  879. "write_custom",
  880. lpc2900_handle_write_custom_command,
  881. COMMAND_EXEC,
  882. "<bank> <filename> [<type>] | "
  883. "write customer info from file to index sector");
  884. register_command(
  885. cmd_ctx,
  886. lpc2900_cmd,
  887. "secure_sector",
  888. lpc2900_handle_secure_sector_command,
  889. COMMAND_EXEC,
  890. "<bank> <first> <last> | "
  891. "activate sector security for a range of sectors");
  892. register_command(
  893. cmd_ctx,
  894. lpc2900_cmd,
  895. "secure_jtag",
  896. lpc2900_handle_secure_jtag_command,
  897. COMMAND_EXEC,
  898. "<bank> <level> | "
  899. "activate JTAG security");
  900. return ERROR_OK;
  901. }
  902. /**
  903. * Evaluate flash bank command.
  904. *
  905. * Syntax: flash bank lpc2900 0 0 0 0 target# system_base_clock
  906. *
  907. * @param cmd_ctx
  908. * @param cmd
  909. * @param args
  910. * @param argc
  911. * @param bank Pointer to the flash bank descriptor
  912. */
  913. static int lpc2900_flash_bank_command(struct command_context_s *cmd_ctx,
  914. char *cmd, char **args, int argc,
  915. struct flash_bank_s *bank)
  916. {
  917. lpc2900_flash_bank_t *lpc2900_info;
  918. if (argc < 6)
  919. {
  920. LOG_WARNING("incomplete flash_bank LPC2900 configuration");
  921. return ERROR_FLASH_BANK_INVALID;
  922. }
  923. lpc2900_info = malloc(sizeof(lpc2900_flash_bank_t));
  924. bank->driver_priv = lpc2900_info;
  925. /* Get flash clock.
  926. * Reject it if we can't meet the requirements for program time
  927. * (if clock too slow), or for erase time (clock too fast).
  928. */
  929. lpc2900_info->clk_sys_fmc = strtoul(args[6], NULL, 0) * 1000;
  930. uint32_t clock_limit;
  931. /* Check program time limit */
  932. clock_limit = 512000000l / FLASH_PROGRAM_TIME;
  933. if (lpc2900_info->clk_sys_fmc < clock_limit)
  934. {
  935. LOG_WARNING("flash clock must be at least %" PRIu32 " kHz",
  936. (clock_limit / 1000));
  937. return ERROR_FLASH_BANK_INVALID;
  938. }
  939. /* Check erase time limit */
  940. clock_limit = (uint32_t)((32767.0 * 512.0 * 1e6) / FLASH_ERASE_TIME);
  941. if (lpc2900_info->clk_sys_fmc > clock_limit)
  942. {
  943. LOG_WARNING("flash clock must be a maximum of %" PRIu32" kHz",
  944. (clock_limit / 1000));
  945. return ERROR_FLASH_BANK_INVALID;
  946. }
  947. /* Chip ID will be obtained by probing the device later */
  948. lpc2900_info->chipid = 0;
  949. return ERROR_OK;
  950. }
  951. /**
  952. * Erase sector(s).
  953. *
  954. * @param bank Pointer to the flash bank descriptor
  955. * @param first First sector to be erased
  956. * @param last Last sector (including) to be erased
  957. */
  958. static int lpc2900_erase(struct flash_bank_s *bank, int first, int last)
  959. {
  960. uint32_t status;
  961. int sector;
  962. int last_unsecured_sector;
  963. target_t *target = bank->target;
  964. lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
  965. status = lpc2900_is_ready(bank);
  966. if (status != ERROR_OK)
  967. {
  968. return status;
  969. }
  970. /* Sanity check on sector range */
  971. if ((first < 0) || (last < first) || (last >= bank->num_sectors))
  972. {
  973. LOG_INFO("Bad sector range");
  974. return ERROR_FLASH_SECTOR_INVALID;
  975. }
  976. /* Update the info about secured sectors */
  977. lpc2900_read_security_status( bank );
  978. /* The selected sector range might include secured sectors. An attempt
  979. * to erase such a sector will cause the erase to fail also for unsecured
  980. * sectors. It is necessary to determine the last unsecured sector now,
  981. * because we have to treat the last relevant sector in the list in
  982. * a special way.
  983. */
  984. last_unsecured_sector = -1;
  985. for (sector = first; sector <= last; sector++)
  986. {
  987. if ( !bank->sectors[sector].is_protected )
  988. {
  989. last_unsecured_sector = sector;
  990. }
  991. }
  992. /* Exit now, in case of the rare constellation where all sectors in range
  993. * are secured. This is regarded a success, since erasing/programming of
  994. * secured sectors shall be handled transparently.
  995. */
  996. if ( last_unsecured_sector == -1 )
  997. {
  998. return ERROR_OK;
  999. }
  1000. /* Enable flash block and set the correct CRA clock of 66 kHz */
  1001. lpc2900_setup(bank);
  1002. /* Clear END_OF_ERASE interrupt status */
  1003. target_write_u32(target, INT_CLR_STATUS, INTSRC_END_OF_ERASE);
  1004. /* Set the program/erase timer to FLASH_ERASE_TIME */
  1005. target_write_u32(target, FPTR,
  1006. FPTR_EN_T | lpc2900_calc_tr( lpc2900_info->clk_sys_fmc,
  1007. FLASH_ERASE_TIME ));
  1008. /* Sectors are marked for erasure, then erased all together */
  1009. for (sector = first; sector <= last_unsecured_sector; sector++)
  1010. {
  1011. /* Only mark sectors that aren't secured. Any attempt to erase a group
  1012. * of sectors will fail if any single one of them is secured!
  1013. */
  1014. if ( !bank->sectors[sector].is_protected )
  1015. {
  1016. /* Unprotect the sector */
  1017. target_write_u32(target, bank->sectors[sector].offset, 0);
  1018. target_write_u32(target, FCTR,
  1019. FCTR_FS_LOADREQ | FCTR_FS_WPB |
  1020. FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS);
  1021. /* Mark the sector for erasure. The last sector in the list
  1022. triggers the erasure. */
  1023. target_write_u32(target, bank->sectors[sector].offset, 0);
  1024. if ( sector == last_unsecured_sector )
  1025. {
  1026. target_write_u32(target, FCTR,
  1027. FCTR_FS_PROGREQ | FCTR_FS_WPB | FCTR_FS_CS);
  1028. }
  1029. else
  1030. {
  1031. target_write_u32(target, FCTR,
  1032. FCTR_FS_LOADREQ | FCTR_FS_WPB |
  1033. FCTR_FS_WEB | FCTR_FS_CS);
  1034. }
  1035. }
  1036. }
  1037. /* Wait for the end of the erase operation. If it's not over after two seconds,
  1038. * something went dreadfully wrong... :-(
  1039. */
  1040. if( lpc2900_wait_status(bank, INTSRC_END_OF_ERASE, 2000) != ERROR_OK )
  1041. {
  1042. return ERROR_FLASH_OPERATION_FAILED;
  1043. }
  1044. /* Normal flash operating mode */
  1045. target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
  1046. return ERROR_OK;
  1047. }
  1048. static int lpc2900_protect(struct flash_bank_s *bank, int set, int first, int last)
  1049. {
  1050. /* This command is not supported.
  1051. * "Protection" in LPC2900 terms is handled transparently. Sectors will
  1052. * automatically be unprotected as needed.
  1053. * Instead we use the concept of sector security. A secured sector is shown
  1054. * as "protected" in OpenOCD. Sector security is a permanent feature, and
  1055. * cannot be disabled once activated.
  1056. */
  1057. return ERROR_OK;
  1058. }
  1059. /**
  1060. * Write data to flash.
  1061. *
  1062. * @param bank Pointer to the flash bank descriptor
  1063. * @param buffer Buffer with data
  1064. * @param offset Start address (relative to bank start)
  1065. * @param count Number of bytes to be programmed
  1066. */
  1067. static int lpc2900_write(struct flash_bank_s *bank, uint8_t *buffer,
  1068. uint32_t offset, uint32_t count)
  1069. {
  1070. uint8_t page[FLASH_PAGE_SIZE];
  1071. uint32_t status;
  1072. uint32_t num_bytes;
  1073. target_t *target = bank->target;
  1074. lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
  1075. int sector;
  1076. int retval;
  1077. static const uint32_t write_target_code[] = {
  1078. /* Set auto latch mode: FCTR=CS|WRE|WEB */
  1079. 0xe3a0a007, /* loop mov r10, #0x007 */
  1080. 0xe583a000, /* str r10,[r3,#0] */
  1081. /* Load complete page into latches */
  1082. 0xe3a06020, /* mov r6,#(512/16) */
  1083. 0xe8b00f00, /* next ldmia r0!,{r8-r11} */
  1084. 0xe8a10f00, /* stmia r1!,{r8-r11} */
  1085. 0xe2566001, /* subs r6,#1 */
  1086. 0x1afffffb, /* bne next */
  1087. /* Clear END_OF_BURN interrupt status */
  1088. 0xe3a0a002, /* mov r10,#(1 << 1) */
  1089. 0xe583afe8, /* str r10,[r3,#0xfe8] */
  1090. /* Set the erase time to FLASH_PROGRAM_TIME */
  1091. 0xe5834008, /* str r4,[r3,#8] */
  1092. /* Trigger flash write
  1093. FCTR = CS | WRE | WPB | PROGREQ */
  1094. 0xe3a0a083, /* mov r10,#0x83 */
  1095. 0xe38aaa01, /* orr r10,#0x1000 */
  1096. 0xe583a000, /* str r10,[r3,#0] */
  1097. /* Wait for end of burn */
  1098. 0xe593afe0, /* wait ldr r10,[r3,#0xfe0] */
  1099. 0xe21aa002, /* ands r10,#(1 << 1) */
  1100. 0x0afffffc, /* beq wait */
  1101. /* End? */
  1102. 0xe2522001, /* subs r2,#1 */
  1103. 0x1affffed, /* bne loop */
  1104. 0xeafffffe /* done b done */
  1105. };
  1106. status = lpc2900_is_ready(bank);
  1107. if (status != ERROR_OK)
  1108. {
  1109. return status;
  1110. }
  1111. /* Enable flash block and set the correct CRA clock of 66 kHz */
  1112. lpc2900_setup(bank);
  1113. /* Update the info about secured sectors */
  1114. lpc2900_read_security_status( bank );
  1115. /* Unprotect all involved sectors */
  1116. for (sector = 0; sector < bank->num_sectors; sector++)
  1117. {
  1118. /* Start address in or before this sector? */
  1119. /* End address in or behind this sector? */
  1120. if ( ((bank->base + offset) <
  1121. (bank->sectors[sector].offset + bank->sectors[sector].size)) &&
  1122. ((bank->base + (offset + count - 1)) >= bank->sectors[sector].offset) )
  1123. {
  1124. /* This sector is involved and needs to be unprotected.
  1125. * Don't do it for secured sectors.
  1126. */
  1127. if ( !bank->sectors[sector].is_protected )
  1128. {
  1129. target_write_u32(target, bank->sectors[sector].offset, 0);
  1130. target_write_u32(target, FCTR,
  1131. FCTR_FS_LOADREQ | FCTR_FS_WPB |
  1132. FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS);
  1133. }
  1134. }
  1135. }
  1136. /* Set the program/erase time to FLASH_PROGRAM_TIME */
  1137. uint32_t prog_time = FPTR_EN_T | lpc2900_calc_tr( lpc2900_info->clk_sys_fmc,
  1138. FLASH_PROGRAM_TIME );
  1139. /* If there is a working area of reasonable size, use it to program via
  1140. a target algorithm. If not, fall back to host programming. */
  1141. /* We need some room for target code. */
  1142. uint32_t target_code_size = sizeof(write_target_code);
  1143. /* Try working area allocation. Start with a large buffer, and try with
  1144. reduced size if that fails. */
  1145. working_area_t *warea;
  1146. uint32_t buffer_size = lpc2900_info->max_ram_block - 1 * KiB;
  1147. while( (retval = target_alloc_working_area(target,
  1148. buffer_size + target_code_size,
  1149. &warea)) != ERROR_OK )
  1150. {
  1151. /* Try a smaller buffer now, and stop if it's too small. */
  1152. buffer_size -= 1 * KiB;
  1153. if (buffer_size < 2 * KiB)
  1154. {
  1155. LOG_INFO( "no (large enough) working area"
  1156. ", falling back to host mode" );
  1157. warea = NULL;
  1158. break;
  1159. }
  1160. };
  1161. if( warea )
  1162. {
  1163. reg_param_t reg_params[5];
  1164. armv4_5_algorithm_t armv4_5_info;
  1165. /* We can use target mode. Download the algorithm. */
  1166. retval = target_write_buffer( target,
  1167. (warea->address)+buffer_size,
  1168. target_code_size,
  1169. (uint8_t *)write_target_code);
  1170. if (retval != ERROR_OK)
  1171. {
  1172. LOG_ERROR("Unable to write block write code to target");
  1173. target_free_all_working_areas(target);
  1174. return ERROR_FLASH_OPERATION_FAILED;
  1175. }
  1176. init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
  1177. init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
  1178. init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT);
  1179. init_reg_param(&reg_params[3], "r3", 32, PARAM_OUT);
  1180. init_reg_param(&reg_params[4], "r4", 32, PARAM_OUT);
  1181. /* Write to flash in large blocks */
  1182. while ( count != 0 )
  1183. {
  1184. uint32_t this_npages;
  1185. uint8_t *this_buffer;
  1186. int start_sector = lpc2900_address2sector( bank, offset );
  1187. /* First page / last page / rest */
  1188. if( offset % FLASH_PAGE_SIZE )
  1189. {
  1190. /* Block doesn't start on page boundary.
  1191. Burn first partial page separately. */
  1192. memset( &page, 0xff, sizeof(page) );
  1193. memcpy( &page[offset % FLASH_PAGE_SIZE],
  1194. buffer,
  1195. FLASH_PAGE_SIZE - (offset % FLASH_PAGE_SIZE) );
  1196. this_npages = 1;
  1197. this_buffer = &page[0];
  1198. count = count + (offset % FLASH_PAGE_SIZE);
  1199. offset = offset - (offset % FLASH_PAGE_SIZE);
  1200. }
  1201. else if( count < FLASH_PAGE_SIZE )
  1202. {
  1203. /* Download last incomplete page separately. */
  1204. memset( &page, 0xff, sizeof(page) );
  1205. memcpy( &page, buffer, count );
  1206. this_npages = 1;
  1207. this_buffer = &page[0];
  1208. count = FLASH_PAGE_SIZE;
  1209. }
  1210. else
  1211. {
  1212. /* Download as many full pages as possible */
  1213. this_npages = (count < buffer_size) ?
  1214. count / FLASH_PAGE_SIZE :
  1215. buffer_size / FLASH_PAGE_SIZE;
  1216. this_buffer = buffer;
  1217. /* Make sure we stop at the next secured sector */
  1218. int sector = start_sector + 1;
  1219. while( sector < bank->num_sectors )
  1220. {
  1221. /* Secured? */
  1222. if( bank->sectors[sector].is_protected )
  1223. {
  1224. /* Is that next sector within the current block? */
  1225. if( (bank->sectors[sector].offset - bank->base) <
  1226. (offset + (this_npages * FLASH_PAGE_SIZE)) )
  1227. {
  1228. /* Yes! Split the block */
  1229. this_npages =
  1230. (bank->sectors[sector].offset - bank->base - offset)
  1231. / FLASH_PAGE_SIZE;
  1232. break;
  1233. }
  1234. }
  1235. sector++;
  1236. }
  1237. }
  1238. /* Skip the current sector if it is secured */
  1239. if (bank->sectors[start_sector].is_protected)
  1240. {
  1241. LOG_DEBUG("Skip secured sector %d",
  1242. start_sector);
  1243. /* Stop if this is the last sector */
  1244. if (start_sector == bank->num_sectors - 1)
  1245. {
  1246. break;
  1247. }
  1248. /* Skip */
  1249. uint32_t nskip = bank->sectors[start_sector].size -
  1250. (offset % bank->sectors[start_sector].size);
  1251. offset += nskip;
  1252. buffer += nskip;
  1253. count = (count >= nskip) ? (count - nskip) : 0;
  1254. continue;
  1255. }
  1256. /* Execute buffer download */
  1257. if ((retval = target_write_buffer(target,
  1258. warea->address,
  1259. this_npages * FLASH_PAGE_SIZE,
  1260. this_buffer)) != ERROR_OK)
  1261. {
  1262. LOG_ERROR("Unable to write data to target");
  1263. target_free_all_working_areas(target);
  1264. return ERROR_FLASH_OPERATION_FAILED;
  1265. }
  1266. /* Prepare registers */
  1267. buf_set_u32(reg_params[0].value, 0, 32, warea->address);
  1268. buf_set_u32(reg_params[1].value, 0, 32, offset);
  1269. buf_set_u32(reg_params[2].value, 0, 32, this_npages);
  1270. buf_set_u32(reg_params[3].value, 0, 32, FCTR);
  1271. buf_set_u32(reg_params[4].value, 0, 32, FPTR_EN_T | prog_time);
  1272. /* Execute algorithm, assume breakpoint for last instruction */
  1273. armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
  1274. armv4_5_info.core_mode = ARMV4_5_MODE_SVC;
  1275. armv4_5_info.core_state = ARMV4_5_STATE_ARM;
  1276. retval = target_run_algorithm(target, 0, NULL, 5, reg_params,
  1277. (warea->address) + buffer_size,
  1278. (warea->address) + buffer_size + target_code_size - 4,
  1279. 10000, /* 10s should be enough for max. 16 KiB of data */
  1280. &armv4_5_info);
  1281. if (retval != ERROR_OK)
  1282. {
  1283. LOG_ERROR("Execution of flash algorithm failed.");
  1284. target_free_all_working_areas(target);
  1285. retval = ERROR_FLASH_OPERATION_FAILED;
  1286. break;
  1287. }
  1288. count -= this_npages * FLASH_PAGE_SIZE;
  1289. buffer += this_npages * FLASH_PAGE_SIZE;
  1290. offset += this_npages * FLASH_PAGE_SIZE;
  1291. }
  1292. /* Free all resources */
  1293. destroy_reg_param(&reg_params[0]);
  1294. destroy_reg_param(&reg_params[1]);
  1295. destroy_reg_param(&reg_params[2]);
  1296. destroy_reg_param(&reg_params[3]);
  1297. destroy_reg_param(&reg_params[4]);
  1298. target_free_all_working_areas(target);
  1299. }
  1300. else
  1301. {
  1302. /* Write to flash memory page-wise */
  1303. while ( count != 0 )
  1304. {
  1305. /* How many bytes do we copy this time? */
  1306. num_bytes = (count >= FLASH_PAGE_SIZE) ?
  1307. FLASH_PAGE_SIZE - (offset % FLASH_PAGE_SIZE) :
  1308. count;
  1309. /* Don't do anything with it if the page is in a secured sector. */
  1310. if ( !bank->sectors[lpc2900_address2sector(bank, offset)].is_protected )
  1311. {
  1312. /* Set latch load mode */
  1313. target_write_u32(target, FCTR,
  1314. FCTR_FS_CS | FCTR_FS_WRE | FCTR_FS_WEB);
  1315. /* Always clear the buffer (a little overhead, but who cares) */
  1316. memset(page, 0xFF, FLASH_PAGE_SIZE);
  1317. /* Copy them to the buffer */
  1318. memcpy( &page[offset % FLASH_PAGE_SIZE],
  1319. &buffer[offset % FLASH_PAGE_SIZE],
  1320. num_bytes );
  1321. /* Write whole page to flash data latches */
  1322. if (target_write_memory(
  1323. target,
  1324. bank->base + (offset - (offset % FLASH_PAGE_SIZE)),
  1325. 4, FLASH_PAGE_SIZE / 4, page) != ERROR_OK)
  1326. {
  1327. LOG_ERROR("Write failed @ 0x%8.8" PRIx32, offset);
  1328. target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
  1329. return ERROR_FLASH_OPERATION_FAILED;
  1330. }
  1331. /* Clear END_OF_BURN interrupt status */
  1332. target_write_u32(target, INT_CLR_STATUS, INTSRC_END_OF_BURN);
  1333. /* Set the programming time */
  1334. target_write_u32(target, FPTR, FPTR_EN_T | prog_time);
  1335. /* Trigger flash write */
  1336. target_write_u32(target, FCTR,
  1337. FCTR_FS_CS | FCTR_FS_WRE | FCTR_FS_WPB | FCTR_FS_PROGREQ);
  1338. /* Wait for the end of the write operation. If it's not over
  1339. * after one second, something went dreadfully wrong... :-(
  1340. */
  1341. if (lpc2900_wait_status(bank, INTSRC_END_OF_BURN, 1000) != ERROR_OK)
  1342. {
  1343. LOG_ERROR("Write failed @ 0x%8.8" PRIx32, offset);
  1344. target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
  1345. return ERROR_FLASH_OPERATION_FAILED;
  1346. }
  1347. }
  1348. /* Update pointers and counters */
  1349. offset += num_bytes;
  1350. buffer += num_bytes;
  1351. count -= num_bytes;
  1352. }
  1353. retval = ERROR_OK;
  1354. }
  1355. /* Normal flash operating mode */
  1356. target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
  1357. return retval;
  1358. }
  1359. /**
  1360. * Try and identify the device.
  1361. *
  1362. * Determine type number and its memory layout.
  1363. *
  1364. * @param bank Pointer to the flash bank descriptor
  1365. */
  1366. static int lpc2900_probe(struct flash_bank_s *bank)
  1367. {
  1368. lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
  1369. target_t *target = bank->target;
  1370. int i = 0;
  1371. uint32_t offset;
  1372. if (target->state != TARGET_HALTED)
  1373. {
  1374. LOG_ERROR("Target not halted");
  1375. return ERROR_TARGET_NOT_HALTED;
  1376. }
  1377. /* We want to do this only once. Check if we already have a valid CHIPID,
  1378. * because then we will have already successfully probed the device.
  1379. */
  1380. if (lpc2900_info->chipid == EXPECTED_CHIPID)
  1381. {
  1382. return ERROR_OK;
  1383. }
  1384. /* Probing starts with reading the CHIPID register. We will continue only
  1385. * if this identifies as an LPC2900 device.
  1386. */
  1387. target_read_u32(target, CHIPID, &lpc2900_info->chipid);
  1388. if (lpc2900_info->chipid != EXPECTED_CHIPID)
  1389. {
  1390. LOG_WARNING("Device is not an LPC29xx");
  1391. return ERROR_FLASH_OPERATION_FAILED;
  1392. }
  1393. /* It's an LPC29xx device. Now read the feature register FEAT0...FEAT3. */
  1394. uint32_t feat0, feat1, feat2, feat3;
  1395. target_read_u32(target, FEAT0, &feat0);
  1396. target_read_u32(target, FEAT1, &feat1);
  1397. target_read_u32(target, FEAT2, &feat2);
  1398. target_read_u32(target, FEAT3, &feat3);
  1399. /* Base address */
  1400. bank->base = 0x20000000;
  1401. /* Determine flash layout from FEAT2 register */
  1402. uint32_t num_64k_sectors = (feat2 >> 16) & 0xFF;
  1403. uint32_t num_8k_sectors = (feat2 >> 0) & 0xFF;
  1404. bank->num_sectors = num_64k_sectors + num_8k_sectors;
  1405. bank->size = KiB * (64 * num_64k_sectors + 8 * num_8k_sectors);
  1406. /* Determine maximum contiguous RAM block */
  1407. lpc2900_info->max_ram_block = 16 * KiB;
  1408. if( (feat1 & 0x30) == 0x30 )
  1409. {
  1410. lpc2900_info->max_ram_block = 32 * KiB;
  1411. if( (feat1 & 0x0C) == 0x0C )
  1412. {
  1413. lpc2900_info->max_ram_block = 48 * KiB;
  1414. }
  1415. }
  1416. /* Determine package code and ITCM size */
  1417. uint32_t package_code = feat0 & 0x0F;
  1418. uint32_t itcm_code = (feat1 >> 16) & 0x1F;
  1419. /* Determine the exact type number. */
  1420. uint32_t found = 1;
  1421. if ( (package_code == 4) && (itcm_code == 5) )
  1422. {
  1423. /* Old LPC2917 or LPC2919 (non-/01 devices) */
  1424. lpc2900_info->target_name = (bank->size == 768*KiB) ? "LPC2919" : "LPC2917";
  1425. }
  1426. else
  1427. {
  1428. if ( package_code == 2 )
  1429. {
  1430. /* 100-pin package */
  1431. if ( bank->size == 128*KiB )
  1432. {
  1433. lpc2900_info->target_name = "LPC2921";
  1434. }
  1435. else if ( bank->size == 256*KiB )
  1436. {
  1437. lpc2900_info->target_name = "LPC2923";
  1438. }
  1439. else if ( bank->size == 512*KiB )
  1440. {
  1441. lpc2900_info->target_name = "LPC2925";
  1442. }
  1443. else
  1444. {
  1445. found = 0;
  1446. }
  1447. }
  1448. else if ( package_code == 4 )
  1449. {
  1450. /* 144-pin package */
  1451. if ( (bank->size == 512*KiB) && (feat3 == 0xFFFFFCF0) )
  1452. {
  1453. lpc2900_info->target_name = "LPC2917/01";
  1454. }
  1455. else if ( (bank->size == 512*KiB) && (feat3 == 0xFFFFFFF1) )
  1456. {
  1457. lpc2900_info->target_name = "LPC2927";
  1458. }
  1459. else if ( (bank->size == 768*KiB) && (feat3 == 0xFFFFFCF8) )
  1460. {
  1461. lpc2900_info->target_name = "LPC2919/01";
  1462. }
  1463. else if ( (bank->size == 768*KiB) && (feat3 == 0xFFFFFFF9) )
  1464. {
  1465. lpc2900_info->target_name = "LPC2929";
  1466. }
  1467. else
  1468. {
  1469. found = 0;
  1470. }
  1471. }
  1472. else if ( package_code == 5 )
  1473. {
  1474. /* 208-pin package */
  1475. lpc2900_info->target_name = (bank->size == 0) ? "LPC2930" : "LPC2939";
  1476. }
  1477. else
  1478. {
  1479. found = 0;
  1480. }
  1481. }
  1482. if ( !found )
  1483. {
  1484. LOG_WARNING("Unknown LPC29xx derivative");
  1485. return ERROR_FLASH_OPERATION_FAILED;
  1486. }
  1487. /* Show detected device */
  1488. LOG_INFO("Flash bank %d"
  1489. ": Device %s, %" PRIu32
  1490. " KiB in %d sectors",
  1491. bank->bank_number,
  1492. lpc2900_info->target_name, bank->size / KiB,
  1493. bank->num_sectors);
  1494. /* Flashless devices cannot be handled */
  1495. if ( bank->num_sectors == 0 )
  1496. {
  1497. LOG_WARNING("Flashless device cannot be handled");
  1498. return ERROR_FLASH_OPERATION_FAILED;
  1499. }
  1500. /* Sector layout.
  1501. * These are logical sector numbers. When doing real flash operations,
  1502. * the logical flash number are translated into the physical flash numbers
  1503. * of the device.
  1504. */
  1505. bank->sectors = malloc(sizeof(flash_sector_t) * bank->num_sectors);
  1506. offset = 0;
  1507. for (i = 0; i < bank->num_sectors; i++)
  1508. {
  1509. bank->sectors[i].offset = offset;
  1510. bank->sectors[i].is_erased = -1;
  1511. bank->sectors[i].is_protected = -1;
  1512. if ( i <= 7 )
  1513. {
  1514. bank->sectors[i].size = 8 * KiB;
  1515. }
  1516. else if ( i <= 18 )
  1517. {
  1518. bank->sectors[i].size = 64 * KiB;
  1519. }
  1520. else
  1521. {
  1522. /* We shouldn't come here. But there might be a new part out there
  1523. * that has more than 19 sectors. Politely ask for a fix then.
  1524. */
  1525. bank->sectors[i].size = 0;
  1526. LOG_ERROR("Never heard about sector %d", i);
  1527. }
  1528. offset += bank->sectors[i].size;
  1529. }
  1530. /* Read sector security status */
  1531. if ( lpc2900_read_security_status(bank) != ERROR_OK )
  1532. {
  1533. LOG_ERROR("Cannot determine sector security status");
  1534. return ERROR_FLASH_OPERATION_FAILED;
  1535. }
  1536. return ERROR_OK;
  1537. }
  1538. /**
  1539. * Run a blank check for each sector.
  1540. *
  1541. * For speed reasons, the device isn't read word by word.
  1542. * A hash value is calculated by the hardware ("BIST") for each sector.
  1543. * This value is then compared against the known hash of an empty sector.
  1544. *
  1545. * @param bank Pointer to the flash bank descriptor
  1546. */
  1547. static int lpc2900_erase_check(struct flash_bank_s *bank)
  1548. {
  1549. uint32_t status = lpc2900_is_ready(bank);
  1550. if (status != ERROR_OK)
  1551. {
  1552. LOG_INFO("Processor not halted/not probed");
  1553. return status;
  1554. }
  1555. /* Use the BIST (Built-In Selft Test) to generate a signature of each flash
  1556. * sector. Compare against the expected signature of an empty sector.
  1557. */
  1558. int sector;
  1559. for ( sector = 0; sector < bank->num_sectors; sector++ )
  1560. {
  1561. uint32_t signature[4];
  1562. if ( (status = lpc2900_run_bist128( bank,
  1563. bank->sectors[sector].offset,
  1564. bank->sectors[sector].offset +
  1565. (bank->sectors[sector].size - 1),
  1566. &signature)) != ERROR_OK )
  1567. {
  1568. return status;
  1569. }
  1570. /* The expected signatures for an empty sector are different
  1571. * for 8 KiB and 64 KiB sectors.
  1572. */
  1573. if ( bank->sectors[sector].size == 8*KiB )
  1574. {
  1575. bank->sectors[sector].is_erased =
  1576. (signature[3] == 0x01ABAAAA) &&
  1577. (signature[2] == 0xAAAAAAAA) &&
  1578. (signature[1] == 0xAAAAAAAA) &&
  1579. (signature[0] == 0xAAA00AAA);
  1580. }
  1581. if ( bank->sectors[sector].size == 64*KiB )
  1582. {
  1583. bank->sectors[sector].is_erased =
  1584. (signature[3] == 0x11801222) &&
  1585. (signature[2] == 0xB88844FF) &&
  1586. (signature[1] == 0x11A22008) &&
  1587. (signature[0] == 0x2B1BFE44);
  1588. }
  1589. }
  1590. return ERROR_OK;
  1591. }
  1592. /**
  1593. * Get protection (sector security) status.
  1594. *
  1595. * Determine the status of "sector security" for each sector.
  1596. * A secured sector is one that can never be erased/programmed again.
  1597. *
  1598. * @param bank Pointer to the flash bank descriptor
  1599. */
  1600. static int lpc2900_protect_check(struct flash_bank_s *bank)
  1601. {
  1602. return lpc2900_read_security_status(bank);
  1603. }
  1604. /**
  1605. * Print info about the driver (not the device).
  1606. *
  1607. * @param bank Pointer to the flash bank descriptor
  1608. * @param buf Buffer to take the string
  1609. * @param buf_size Maximum number of characters that the buffer can take
  1610. */
  1611. static int lpc2900_info(struct flash_bank_s *bank, char *buf, int buf_size)
  1612. {
  1613. snprintf(buf, buf_size, "lpc2900 flash driver");
  1614. return ERROR_OK;
  1615. }
  1616. flash_driver_t lpc2900_flash =
  1617. {
  1618. .name = "lpc2900",
  1619. .register_commands = lpc2900_register_commands,
  1620. .flash_bank_command = lpc2900_flash_bank_command,
  1621. .erase = lpc2900_erase,
  1622. .protect = lpc2900_protect,
  1623. .write = lpc2900_write,
  1624. .probe = lpc2900_probe,
  1625. .auto_probe = lpc2900_probe,
  1626. .erase_check = lpc2900_erase_check,
  1627. .protect_check = lpc2900_protect_check,
  1628. .info = lpc2900_info
  1629. };