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Add preliminary support for Freescale iMX53

Signed-off-by: Luca Ellero <lroluk@gmail.com>
tags/v0.5.0-rc1
Luca Ellero 13 years ago
committed by Øyvind Harboe
parent
commit
041953f3b1
1 changed files with 51 additions and 0 deletions
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    -0
      tcl/target/imx53.cfg

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tcl/target/imx53.cfg View File

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# Freescale i.MX53

if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME imx53
}

# CoreSight Debug Access Port
if { [info exists DAP_TAPID ] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x1ba00477
}

jtag newtap $_CHIPNAME DAP -irlen 4 -ircapture 0x1 -irmask 0xf \
-expected-id $_DAP_TAPID

# SDMA / no IDCODE
jtag newtap $_CHIPNAME SDMA -irlen 4 -ircapture 0x0 -irmask 0xf

# SJC
if { [info exists SJC_TAPID ] } {
set _SJC_TAPID SJC_TAPID
} else {
set _SJC_TAPID 0x0190d01d
}

jtag newtap $_CHIPNAME SJC -irlen 5 -ircapture 0x1 -irmask 0x1f \
-expected-id $_SJC_TAPID -ignore-version

# GDB target: Cortex-A8, using DAP
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_a8 -chain-position $_CHIPNAME.DAP

# some TCK tycles are required to activate the DEBUG power domain
jtag configure $_CHIPNAME.SJC -event post-reset "runtest 100"

# have the DAP "always" be active
jtag configure $_CHIPNAME.SJC -event setup "jtag tapenable $_CHIPNAME.DAP"

proc imx53_dbginit {target} {
# General Cortex A8 debug initialisation
cortex_a8 dbginit
}

# Slow speed to be sure it will work
jtag_rclk 1000
$_TARGETNAME configure -event "reset-start" { jtag_rclk 1000 }

$_TARGETNAME configure -event reset-assert-post "imx53_dbginit $_TARGETNAME"

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