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cfg: add TI am43xx devices

This adds support for the am43xx SoC and the AM437x GP EVM and AM438x
ePOS EVM.

Change-Id: I09cbb09072f38e0e08fdd520dedb6e67d45056be
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-on: http://openocd.zylin.com/2047
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
tags/v0.8.0-rc1
Felipe Balbi 10 years ago
committed by Paul Fertser
parent
commit
058163e32e
2 changed files with 61 additions and 0 deletions
  1. +10
    -0
      tcl/board/ti_am43xx_evm.cfg
  2. +51
    -0
      tcl/target/am437x.cfg

+ 10
- 0
tcl/board/ti_am43xx_evm.cfg View File

@@ -0,0 +1,10 @@
# Works on both AM437x GP EVM and AM438x ePOS EVM

# The JTAG interface is built directly on the board.
source [find interface/ftdi/xds100v2.cfg]

adapter_khz 16000

source [find target/am437x.cfg]

reset_config trst_and_srst

+ 51
- 0
tcl/target/am437x.cfg View File

@@ -0,0 +1,51 @@
source [find target/icepick.cfg]

if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME am437x
}

#
# M3 DAP
#
if { [info exists M3_DAP_TAPID] } {
set _M3_DAP_TAPID $M3_DAP_TAPID
} else {
set _M3_DAP_TAPID 0x4b6b902f
}
jtag newtap $_CHIPNAME m3_dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_M3_DAP_TAPID -disable
jtag configure $_CHIPNAME.m3_dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 11"

#
# Cortex A9 DAP
#
if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x4b6b902f
}
jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
jtag configure $_CHIPNAME.dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 12"

#
# ICEpick-D (JTAG route controller)
#
if { [info exists JRC_TAPID] } {
set _JRC_TAPID $JRC_TAPID
} else {
set _JRC_TAPID 0x0b98c02f
}
jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap"
# some TCK tycles are required to activate the DEBUG power domain
jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100"

#
# Cortex A9 target
#
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_a -chain-position $_CHIPNAME.dap

# SRAM: 64K at 0x4030.0000; use the first 16K
$_TARGETNAME configure -work-area-phys 0x40300000 -work-area-size 0x4000

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