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@@ -332,6 +332,18 @@ int arm_simulate_step_core(target_t *target, uint32_t *dry_run_pc, struct arm_si |
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return ERROR_OK; |
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} |
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/* Deal with 32-bit BL/BLX */ |
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if ((opcode & 0xf800) == 0xf000) { |
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uint32_t high = instruction.info.b_bl_bx_blx.target_address; |
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retval = target_read_u16(target, current_pc+2, &opcode); |
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if (retval != ERROR_OK) |
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return retval; |
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retval = thumb_evaluate_opcode(opcode, current_pc, &instruction); |
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if (retval != ERROR_OK) |
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return retval; |
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instruction.info.b_bl_bx_blx.target_address += high; |
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} |
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} |
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/* examine instruction type */ |
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