- fix build warning in cortex_m3 - code cleanup - remove trailing lf and convert c++ comments git-svn-id: svn://svn.berlios.de/openocd/trunk@1238 b42882b7-edfa-0310-969c-e2dbd0fdcd60tags/v0.1.0
@@ -148,10 +148,10 @@ typedef struct cfi_fixup_s | |||||
} cfi_fixup_t; | } cfi_fixup_t; | ||||
#define CFI_MFR_AMD 0x0001 | #define CFI_MFR_AMD 0x0001 | ||||
#define CFI_MFR_FUJITSU 0x0004 | |||||
#define CFI_MFR_FUJITSU 0x0004 | |||||
#define CFI_MFR_ATMEL 0x001F | #define CFI_MFR_ATMEL 0x001F | ||||
#define CFI_MFR_ST 0x0020 /* STMicroelectronics */ | #define CFI_MFR_ST 0x0020 /* STMicroelectronics */ | ||||
#define CFI_MFR_AMIC 0x0037 | |||||
#define CFI_MFR_AMIC 0x0037 | |||||
#define CFI_MFR_SST 0x00BF | #define CFI_MFR_SST 0x00BF | ||||
#define CFI_MFR_MX 0x00C2 | #define CFI_MFR_MX 0x00C2 | ||||
@@ -25,7 +25,6 @@ | |||||
#include "replacements.h" | #include "replacements.h" | ||||
#include "flash.h" | #include "flash.h" | ||||
#include "target.h" | #include "target.h" | ||||
@@ -37,8 +36,6 @@ | |||||
#include "../target/embeddedice.h" | #include "../target/embeddedice.h" | ||||
#include "types.h" | #include "types.h" | ||||
int ecosflash_register_commands(struct command_context_s *cmd_ctx); | int ecosflash_register_commands(struct command_context_s *cmd_ctx); | ||||
int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank); | int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank); | ||||
int ecosflash_erase(struct flash_bank_s *bank, int first, int last); | int ecosflash_erase(struct flash_bank_s *bank, int first, int last); | ||||
@@ -99,42 +96,41 @@ flash_errmsg(int err); | |||||
#define FLASH_ERR_DRV_WRONG_PART 0x0d /* Driver does not support device */ | #define FLASH_ERR_DRV_WRONG_PART 0x0d /* Driver does not support device */ | ||||
#define FLASH_ERR_LOW_VOLTAGE 0x0e /* Not enough juice to complete job */ | #define FLASH_ERR_LOW_VOLTAGE 0x0e /* Not enough juice to complete job */ | ||||
char * | char * | ||||
flash_errmsg(int err) | flash_errmsg(int err) | ||||
{ | { | ||||
switch (err) { | |||||
case FLASH_ERR_OK: | |||||
return "No error - operation complete"; | |||||
case FLASH_ERR_ERASE_SUSPEND: | |||||
return "Device is in erase suspend state"; | |||||
case FLASH_ERR_PROGRAM_SUSPEND: | |||||
return "Device is in program suspend state"; | |||||
case FLASH_ERR_INVALID: | |||||
return "Invalid FLASH address"; | |||||
case FLASH_ERR_ERASE: | |||||
return "Error trying to erase"; | |||||
case FLASH_ERR_LOCK: | |||||
return "Error trying to lock/unlock"; | |||||
case FLASH_ERR_PROGRAM: | |||||
return "Error trying to program"; | |||||
case FLASH_ERR_PROTOCOL: | |||||
return "Generic error"; | |||||
case FLASH_ERR_PROTECT: | |||||
return "Device/region is write-protected"; | |||||
case FLASH_ERR_NOT_INIT: | |||||
return "FLASH sub-system not initialized"; | |||||
case FLASH_ERR_DRV_VERIFY: | |||||
return "Data verify failed after operation"; | |||||
case FLASH_ERR_DRV_TIMEOUT: | |||||
return "Driver timed out waiting for device"; | |||||
case FLASH_ERR_DRV_WRONG_PART: | |||||
return "Driver does not support device"; | |||||
case FLASH_ERR_LOW_VOLTAGE: | |||||
return "Device reports low voltage"; | |||||
default: | |||||
return "Unknown error"; | |||||
} | |||||
switch (err) { | |||||
case FLASH_ERR_OK: | |||||
return "No error - operation complete"; | |||||
case FLASH_ERR_ERASE_SUSPEND: | |||||
return "Device is in erase suspend state"; | |||||
case FLASH_ERR_PROGRAM_SUSPEND: | |||||
return "Device is in program suspend state"; | |||||
case FLASH_ERR_INVALID: | |||||
return "Invalid FLASH address"; | |||||
case FLASH_ERR_ERASE: | |||||
return "Error trying to erase"; | |||||
case FLASH_ERR_LOCK: | |||||
return "Error trying to lock/unlock"; | |||||
case FLASH_ERR_PROGRAM: | |||||
return "Error trying to program"; | |||||
case FLASH_ERR_PROTOCOL: | |||||
return "Generic error"; | |||||
case FLASH_ERR_PROTECT: | |||||
return "Device/region is write-protected"; | |||||
case FLASH_ERR_NOT_INIT: | |||||
return "FLASH sub-system not initialized"; | |||||
case FLASH_ERR_DRV_VERIFY: | |||||
return "Data verify failed after operation"; | |||||
case FLASH_ERR_DRV_TIMEOUT: | |||||
return "Driver timed out waiting for device"; | |||||
case FLASH_ERR_DRV_WRONG_PART: | |||||
return "Driver does not support device"; | |||||
case FLASH_ERR_LOW_VOLTAGE: | |||||
return "Device reports low voltage"; | |||||
default: | |||||
return "Unknown error"; | |||||
} | |||||
} | } | ||||
#endif | #endif | ||||
@@ -185,7 +181,6 @@ int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, c | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int loadDriver(ecosflash_flash_bank_t *info) | int loadDriver(ecosflash_flash_bank_t *info) | ||||
{ | { | ||||
u32 buf_cnt; | u32 buf_cnt; | ||||
@@ -228,7 +223,6 @@ int loadDriver(ecosflash_flash_bank_t *info) | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
static int const OFFSET_ERASE=0x0; | static int const OFFSET_ERASE=0x0; | ||||
static int const OFFSET_ERASE_SIZE=0x8; | static int const OFFSET_ERASE_SIZE=0x8; | ||||
static int const OFFSET_FLASH=0xc; | static int const OFFSET_FLASH=0xc; | ||||
@@ -236,7 +230,6 @@ static int const OFFSET_FLASH_SIZE=0x8; | |||||
static int const OFFSET_GET_WORKAREA=0x18; | static int const OFFSET_GET_WORKAREA=0x18; | ||||
static int const OFFSET_GET_WORKAREA_SIZE=0x4; | static int const OFFSET_GET_WORKAREA_SIZE=0x4; | ||||
int runCode(ecosflash_flash_bank_t *info, | int runCode(ecosflash_flash_bank_t *info, | ||||
u32 codeStart, u32 codeStop, u32 r0, u32 r1, u32 r2, | u32 codeStart, u32 codeStop, u32 r0, u32 r1, u32 r2, | ||||
u32 *result, | u32 *result, | ||||
@@ -334,8 +327,8 @@ int eCosBoard_flash(ecosflash_flash_bank_t *info, void *data, u32 address, u32 l | |||||
int i; | int i; | ||||
for (i=0; i<len; i+=chunk) | |||||
{ | |||||
for (i=0; i<len; i+=chunk) | |||||
{ | |||||
int t=len-i; | int t=len-i; | ||||
if (t>chunk) | if (t>chunk) | ||||
{ | { | ||||
@@ -343,38 +336,36 @@ int eCosBoard_flash(ecosflash_flash_bank_t *info, void *data, u32 address, u32 l | |||||
} | } | ||||
int retval; | int retval; | ||||
retval=target_write_buffer(target, buffer, t, ((u8 *)data)+i); | |||||
if (retval != ERROR_OK) | |||||
return retval; | |||||
u32 flashErr; | |||||
retval=runCode(info, | |||||
info->start_address+OFFSET_FLASH, | |||||
info->start_address+OFFSET_FLASH+OFFSET_FLASH_SIZE, | |||||
buffer, | |||||
address+i, | |||||
t, | |||||
&flashErr, | |||||
timeout); | |||||
if (retval != ERROR_OK) | |||||
return retval; | |||||
retval=target_write_buffer(target, buffer, t, ((u8 *)data)+i); | |||||
if (retval != ERROR_OK) | |||||
return retval; | |||||
u32 flashErr; | |||||
retval=runCode(info, | |||||
info->start_address+OFFSET_FLASH, | |||||
info->start_address+OFFSET_FLASH+OFFSET_FLASH_SIZE, | |||||
buffer, | |||||
address+i, | |||||
t, | |||||
&flashErr, | |||||
timeout); | |||||
if (retval != ERROR_OK) | |||||
return retval; | |||||
if (flashErr != 0x0) | if (flashErr != 0x0) | ||||
{ | { | ||||
LOG_ERROR("Flash prog failed with %d (%s)\n", flashErr, flash_errmsg(flashErr)); | LOG_ERROR("Flash prog failed with %d (%s)\n", flashErr, flash_errmsg(flashErr)); | ||||
return ERROR_FAIL; | return ERROR_FAIL; | ||||
} | } | ||||
} | |||||
} | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int ecosflash_probe(struct flash_bank_s *bank) | int ecosflash_probe(struct flash_bank_s *bank) | ||||
{ | { | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int ecosflash_register_commands(struct command_context_s *cmd_ctx) | int ecosflash_register_commands(struct command_context_s *cmd_ctx) | ||||
{ | { | ||||
register_command(cmd_ctx, NULL, "ecosflash", NULL, COMMAND_ANY, NULL); | register_command(cmd_ctx, NULL, "ecosflash", NULL, COMMAND_ANY, NULL); | ||||
@@ -382,7 +373,7 @@ int ecosflash_register_commands(struct command_context_s *cmd_ctx) | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
/* | |||||
#if 0 | |||||
static void command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf) | static void command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf) | ||||
{ | { | ||||
ecosflash_flash_bank_t *info = bank->driver_priv; | ecosflash_flash_bank_t *info = bank->driver_priv; | ||||
@@ -403,7 +394,7 @@ static void command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf) | |||||
} | } | ||||
} | } | ||||
} | } | ||||
*/ | |||||
#endif | |||||
u32 ecosflash_address(struct flash_bank_s *bank, u32 address) | u32 ecosflash_address(struct flash_bank_s *bank, u32 address) | ||||
{ | { | ||||
@@ -421,7 +412,6 @@ u32 ecosflash_address(struct flash_bank_s *bank, u32 address) | |||||
return retval + bank->base; | return retval + bank->base; | ||||
} | } | ||||
int ecosflash_erase(struct flash_bank_s *bank, int first, int last) | int ecosflash_erase(struct flash_bank_s *bank, int first, int last) | ||||
{ | { | ||||
struct flash_bank_s *c=bank; | struct flash_bank_s *c=bank; | ||||
@@ -434,7 +424,6 @@ int ecosflash_protect(struct flash_bank_s *bank, int set, int first, int last) | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int ecosflash_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) | int ecosflash_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) | ||||
{ | { | ||||
ecosflash_flash_bank_t *info = bank->driver_priv; | ecosflash_flash_bank_t *info = bank->driver_priv; | ||||
@@ -442,7 +431,6 @@ int ecosflash_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count | |||||
return eCosBoard_flash(info, buffer, c->base+offset, count); | return eCosBoard_flash(info, buffer, c->base+offset, count); | ||||
} | } | ||||
int ecosflash_protect_check(struct flash_bank_s *bank) | int ecosflash_protect_check(struct flash_bank_s *bank) | ||||
{ | { | ||||
return ERROR_OK; | return ERROR_OK; | ||||
@@ -455,7 +443,6 @@ int ecosflash_info(struct flash_bank_s *bank, char *buf, int buf_size) | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
u32 ecosflash_get_flash_status(flash_bank_t *bank) | u32 ecosflash_get_flash_status(flash_bank_t *bank) | ||||
{ | { | ||||
return ERROR_OK; | return ERROR_OK; | ||||
@@ -475,7 +462,3 @@ int ecosflash_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, | |||||
{ | { | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -466,7 +466,6 @@ int handle_flash_erase_check_command(struct command_context_s *cmd_ctx, char *cm | |||||
j, p->sectors[j].offset, p->sectors[j].size, p->sectors[j].size>>10, | j, p->sectors[j].offset, p->sectors[j].size, p->sectors[j].size>>10, | ||||
erase_state); | erase_state); | ||||
} | } | ||||
} | } | ||||
return ERROR_OK; | return ERROR_OK; | ||||
@@ -658,7 +657,6 @@ int handle_flash_write_image_command(struct command_context_s *cmd_ctx, char *cm | |||||
command_print(cmd_ctx, "auto erase enabled"); | command_print(cmd_ctx, "auto erase enabled"); | ||||
} | } | ||||
if (argc < 1) | if (argc < 1) | ||||
{ | { | ||||
return ERROR_COMMAND_SYNTAX_ERROR; | return ERROR_COMMAND_SYNTAX_ERROR; | ||||
@@ -743,7 +741,6 @@ int handle_flash_fill_command(struct command_context_s *cmd_ctx, char *cmd, char | |||||
if(count == 0) | if(count == 0) | ||||
return ERROR_OK; | return ERROR_OK; | ||||
switch(cmd[4]) | switch(cmd[4]) | ||||
{ | { | ||||
case 'w': | case 'w': | ||||
@@ -804,7 +801,6 @@ int handle_flash_fill_command(struct command_context_s *cmd_ctx, char *cmd, char | |||||
return retval; | return retval; | ||||
} | } | ||||
if(err == ERROR_OK) | if(err == ERROR_OK) | ||||
{ | { | ||||
float speed; | float speed; | ||||
@@ -577,7 +577,7 @@ int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) | |||||
break; | break; | ||||
if (bytes_remaining >= thisrun_bytes) | if (bytes_remaining >= thisrun_bytes) | ||||
{ | |||||
{ | |||||
if ((retval = target_write_buffer(bank->target, download_area->address, thisrun_bytes, buffer + bytes_written)) != ERROR_OK) | if ((retval = target_write_buffer(bank->target, download_area->address, thisrun_bytes, buffer + bytes_written)) != ERROR_OK) | ||||
{ | { | ||||
retval = ERROR_FLASH_OPERATION_FAILED; | retval = ERROR_FLASH_OPERATION_FAILED; | ||||
@@ -126,7 +126,6 @@ flash_driver_t lpc288x_flash = | |||||
.info = lpc288x_info | .info = lpc288x_info | ||||
}; | }; | ||||
int lpc288x_register_commands(struct command_context_s *cmd_ctx) | int lpc288x_register_commands(struct command_context_s *cmd_ctx) | ||||
{ | { | ||||
return ERROR_OK; | return ERROR_OK; | ||||
@@ -204,7 +203,7 @@ int lpc288x_read_part_info(struct flash_bank_s *bank) | |||||
int lpc288x_protect_check(struct flash_bank_s *bank) | int lpc288x_protect_check(struct flash_bank_s *bank) | ||||
{ | { | ||||
return ERROR_OK; | |||||
return ERROR_OK; | |||||
} | } | ||||
/* flash_bank LPC288x 0 0 0 0 <target#> <cclk> */ | /* flash_bank LPC288x 0 0 0 0 <target#> <cclk> */ | ||||
@@ -69,7 +69,7 @@ nand_flash_controller_t lpc3180_nand_controller = | |||||
int lpc3180_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device) | int lpc3180_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device) | ||||
{ | { | ||||
lpc3180_nand_controller_t *lpc3180_info; | lpc3180_nand_controller_t *lpc3180_info; | ||||
if (argc < 3) | if (argc < 3) | ||||
{ | { | ||||
LOG_WARNING("incomplete 'lpc3180' nand flash configuration"); | LOG_WARNING("incomplete 'lpc3180' nand flash configuration"); | ||||
@@ -126,7 +126,7 @@ int lpc3180_pll(int fclkin, u32 pll_ctrl) | |||||
if (bypass && !direct) /* bypass mode */ | if (bypass && !direct) /* bypass mode */ | ||||
return fclkin / (2 * p); | return fclkin / (2 * p); | ||||
if (bypass & direct) /* direct bypass mode */ | if (bypass & direct) /* direct bypass mode */ | ||||
return fclkin; | return fclkin; | ||||
@@ -273,7 +273,7 @@ int lpc3180_init(struct nand_device_s *device) | |||||
trhz = ((30 / cycle) + 1); | trhz = ((30 / cycle) + 1); | ||||
trbwb = ((100 / cycle) + 1); | trbwb = ((100 / cycle) + 1); | ||||
tcea = ((45 / cycle) + 1); | tcea = ((45 / cycle) + 1); | ||||
/* MLC_LOCK = 0xa25e (unlock protected registers) */ | /* MLC_LOCK = 0xa25e (unlock protected registers) */ | ||||
target_write_u32(target, 0x200b8044, 0xa25e); | target_write_u32(target, 0x200b8044, 0xa25e); | ||||
@@ -80,7 +80,7 @@ static int pxa270_set_gpio_to_output (mflash_gpio_num_t gpio) | |||||
target_t *target = mflash_bank->target; | target_t *target = mflash_bank->target; | ||||
int ret; | int ret; | ||||
// remove alternate function. | |||||
/* remove alternate function. */ | |||||
mask = 0x3u << (gpio.num & 0xF)*2; | mask = 0x3u << (gpio.num & 0xF)*2; | ||||
addr = PXA270_GAFR0_L + (gpio.num >> 4) * 4; | addr = PXA270_GAFR0_L + (gpio.num >> 4) * 4; | ||||
@@ -95,7 +95,7 @@ static int pxa270_set_gpio_to_output (mflash_gpio_num_t gpio) | |||||
if ((ret = target_write_u32(target, addr, value)) != ERROR_OK) | if ((ret = target_write_u32(target, addr, value)) != ERROR_OK) | ||||
return ret; | return ret; | ||||
// set direction to output | |||||
/* set direction to output */ | |||||
mask = 0x1u << (gpio.num & 0x1F); | mask = 0x1u << (gpio.num & 0x1F); | ||||
addr = PXA270_GPDR0 + (gpio.num >> 5) * 4; | addr = PXA270_GPDR0 + (gpio.num >> 5) * 4; | ||||
@@ -261,75 +261,75 @@ static int mg_dsk_wait(mg_io_type_wait wait, u32 time) | |||||
duration_start_measure(&duration); | duration_start_measure(&duration); | ||||
while (time) { | |||||
target_read_u8(target, mg_task_reg + MG_REG_STATUS, &status); | |||||
if (status & mg_io_rbit_status_busy) | |||||
{ | |||||
if (wait == mg_io_wait_bsy) | |||||
return ERROR_OK; | |||||
} else { | |||||
switch(wait) | |||||
{ | |||||
case mg_io_wait_not_bsy: | |||||
return ERROR_OK; | |||||
case mg_io_wait_rdy_noerr: | |||||
if (status & mg_io_rbit_status_ready) | |||||
return ERROR_OK; | |||||
break; | |||||
case mg_io_wait_drq_noerr: | |||||
if (status & mg_io_rbit_status_data_req) | |||||
return ERROR_OK; | |||||
break; | |||||
default: | |||||
break; | |||||
} | |||||
// Now we check the error condition! | |||||
if (status & mg_io_rbit_status_error) | |||||
{ | |||||
target_read_u8(target, mg_task_reg + MG_REG_ERROR, &error); | |||||
if (error & mg_io_rbit_err_bad_sect_num) { | |||||
LOG_ERROR("sector not found"); | |||||
return ERROR_FAIL; | |||||
} | |||||
else if (error & (mg_io_rbit_err_bad_block | mg_io_rbit_err_uncorrectable)) { | |||||
LOG_ERROR("bad block"); | |||||
return ERROR_FAIL; | |||||
} else { | |||||
LOG_ERROR("disk operation fail"); | |||||
return ERROR_FAIL; | |||||
} | |||||
} | |||||
switch (wait) | |||||
{ | |||||
case mg_io_wait_rdy: | |||||
if (status & mg_io_rbit_status_ready) | |||||
return ERROR_OK; | |||||
case mg_io_wait_drq: | |||||
if (status & mg_io_rbit_status_data_req) | |||||
return ERROR_OK; | |||||
default: | |||||
break; | |||||
} | |||||
} | |||||
duration_stop_measure(&duration, NULL); | |||||
t=duration.duration.tv_usec/1000; | |||||
t+=duration.duration.tv_sec*1000; | |||||
while (time) { | |||||
target_read_u8(target, mg_task_reg + MG_REG_STATUS, &status); | |||||
if (status & mg_io_rbit_status_busy) | |||||
{ | |||||
if (wait == mg_io_wait_bsy) | |||||
return ERROR_OK; | |||||
} else { | |||||
switch(wait) | |||||
{ | |||||
case mg_io_wait_not_bsy: | |||||
return ERROR_OK; | |||||
case mg_io_wait_rdy_noerr: | |||||
if (status & mg_io_rbit_status_ready) | |||||
return ERROR_OK; | |||||
break; | |||||
case mg_io_wait_drq_noerr: | |||||
if (status & mg_io_rbit_status_data_req) | |||||
return ERROR_OK; | |||||
break; | |||||
default: | |||||
break; | |||||
} | |||||
/* Now we check the error condition! */ | |||||
if (status & mg_io_rbit_status_error) | |||||
{ | |||||
target_read_u8(target, mg_task_reg + MG_REG_ERROR, &error); | |||||
if (error & mg_io_rbit_err_bad_sect_num) { | |||||
LOG_ERROR("sector not found"); | |||||
return ERROR_FAIL; | |||||
} | |||||
else if (error & (mg_io_rbit_err_bad_block | mg_io_rbit_err_uncorrectable)) { | |||||
LOG_ERROR("bad block"); | |||||
return ERROR_FAIL; | |||||
} else { | |||||
LOG_ERROR("disk operation fail"); | |||||
return ERROR_FAIL; | |||||
} | |||||
} | |||||
switch (wait) | |||||
{ | |||||
case mg_io_wait_rdy: | |||||
if (status & mg_io_rbit_status_ready) | |||||
return ERROR_OK; | |||||
case mg_io_wait_drq: | |||||
if (status & mg_io_rbit_status_data_req) | |||||
return ERROR_OK; | |||||
default: | |||||
break; | |||||
} | |||||
} | |||||
duration_stop_measure(&duration, NULL); | |||||
t=duration.duration.tv_usec/1000; | |||||
t+=duration.duration.tv_sec*1000; | |||||
if (t > time) | if (t > time) | ||||
break; | |||||
} | |||||
break; | |||||
} | |||||
LOG_ERROR("timeout occured"); | |||||
return ERROR_FAIL; | |||||
LOG_ERROR("timeout occured"); | |||||
return ERROR_FAIL; | |||||
} | } | ||||
static int mg_dsk_srst(u8 on) | static int mg_dsk_srst(u8 on) | ||||
@@ -634,7 +634,6 @@ static int mg_mflash_read (u32 addr, u8 *buff, u32 len) | |||||
LOG_DEBUG("copies %u byte", end_addr - cur_addr); | LOG_DEBUG("copies %u byte", end_addr - cur_addr); | ||||
} | } | ||||
} | } | ||||
free(sect_buff); | free(sect_buff); | ||||
@@ -671,7 +670,6 @@ static int mg_mflash_write(u32 addr, u8 *buff, u32 len) | |||||
} | } | ||||
mg_mflash_write_sects(sect_buff, sect_num, 1); | mg_mflash_write_sects(sect_buff, sect_num, 1); | ||||
} | } | ||||
if (cur_addr < end_addr) { | if (cur_addr < end_addr) { | ||||
@@ -697,9 +695,7 @@ static int mg_mflash_write(u32 addr, u8 *buff, u32 len) | |||||
memcpy(sect_buff, buff_ptr, end_addr - cur_addr); | memcpy(sect_buff, buff_ptr, end_addr - cur_addr); | ||||
LOG_DEBUG("copies %u byte", end_addr - cur_addr); | LOG_DEBUG("copies %u byte", end_addr - cur_addr); | ||||
mg_mflash_write_sects(sect_buff, sect_num, 1); | mg_mflash_write_sects(sect_buff, sect_num, 1); | ||||
} | } | ||||
} | } | ||||
free(sect_buff); | free(sect_buff); | ||||
@@ -711,7 +707,7 @@ static int mflash_write_command(struct command_context_s *cmd_ctx, char *cmd, ch | |||||
{ | { | ||||
u32 address, buf_cnt; | u32 address, buf_cnt; | ||||
u8 *buffer; | u8 *buffer; | ||||
// TODO : multi-bank support, large file support | |||||
/* TODO : multi-bank support, large file support */ | |||||
fileio_t fileio; | fileio_t fileio; | ||||
duration_t duration; | duration_t duration; | ||||
char *duration_text; | char *duration_text; | ||||
@@ -727,7 +723,6 @@ static int mflash_write_command(struct command_context_s *cmd_ctx, char *cmd, ch | |||||
mg_mflash_probe(); | mg_mflash_probe(); | ||||
} | } | ||||
if (fileio_open(&fileio, args[1], FILEIO_READ, FILEIO_BINARY) != ERROR_OK) { | if (fileio_open(&fileio, args[1], FILEIO_READ, FILEIO_BINARY) != ERROR_OK) { | ||||
return ERROR_FAIL; | return ERROR_FAIL; | ||||
} | } | ||||
@@ -764,7 +759,7 @@ static int mflash_dump_command(struct command_context_s *cmd_ctx, char *cmd, cha | |||||
{ | { | ||||
u32 address, size_written, size; | u32 address, size_written, size; | ||||
u8 *buffer; | u8 *buffer; | ||||
// TODO : multi-bank support | |||||
/* TODO : multi-bank support */ | |||||
fileio_t fileio; | fileio_t fileio; | ||||
duration_t duration; | duration_t duration; | ||||
char *duration_text; | char *duration_text; | ||||
@@ -39,79 +39,79 @@ typedef struct mflash_gpio_drv_s | |||||
typedef struct _mg_io_type_drv_info { | typedef struct _mg_io_type_drv_info { | ||||
mg_io_uint16 general_configuration; // 00 | |||||
mg_io_uint16 number_of_cylinders; // 01 | |||||
mg_io_uint16 reserved1; // 02 | |||||
mg_io_uint16 number_of_heads; // 03 | |||||
mg_io_uint16 unformatted_bytes_per_track; // 04 | |||||
mg_io_uint16 unformatted_bytes_per_sector; // 05 | |||||
mg_io_uint16 sectors_per_track; // 06 | |||||
mg_io_uint8 vendor_unique1[6]; // 07/08/09 | |||||
mg_io_uint8 serial_number[20]; // 10~19 | |||||
mg_io_uint16 buffer_type; // 20 | |||||
mg_io_uint16 buffer_sector_size; // 21 | |||||
mg_io_uint16 number_of_ecc_bytes; // 22 | |||||
mg_io_uint8 firmware_revision[8]; // 23~26 | |||||
mg_io_uint8 model_number[40]; // 27 | |||||
mg_io_uint8 maximum_block_transfer; // 47 low byte | |||||
mg_io_uint8 vendor_unique2; // 47 high byte | |||||
mg_io_uint16 dword_io; // 48 | |||||
mg_io_uint16 capabilities; // 49 | |||||
mg_io_uint16 reserved2; // 50 | |||||
mg_io_uint8 vendor_unique3; // 51 low byte | |||||
mg_io_uint8 pio_cycle_timing_mode; // 51 high byte | |||||
mg_io_uint8 vendor_unique4; // 52 low byte | |||||
mg_io_uint8 dma_cycle_timing_mode; // 52 high byte | |||||
mg_io_uint16 translation_fields_valid; // 53 (low bit) | |||||
mg_io_uint16 number_of_current_cylinders; // 54 | |||||
mg_io_uint16 number_of_current_heads; // 55 | |||||
mg_io_uint16 current_sectors_per_track; // 56 | |||||
mg_io_uint16 current_sector_capacity_lo; // 57 & 58 | |||||
mg_io_uint16 current_sector_capacity_hi; // 57 & 58 | |||||
mg_io_uint8 multi_sector_count; // 59 low | |||||
mg_io_uint8 multi_sector_setting_valid; // 59 high (low bit) | |||||
mg_io_uint16 total_user_addressable_sectors_lo; // 60 & 61 | |||||
mg_io_uint16 total_user_addressable_sectors_hi; // 60 & 61 | |||||
mg_io_uint8 single_dma_modes_supported; // 62 low byte | |||||
mg_io_uint8 single_dma_transfer_active; // 62 high byte | |||||
mg_io_uint8 multi_dma_modes_supported; // 63 low byte | |||||
mg_io_uint8 multi_dma_transfer_active; // 63 high byte | |||||
mg_io_uint16 adv_pio_mode; | |||||
mg_io_uint16 min_dma_cyc; | |||||
mg_io_uint16 recommend_dma_cyc; | |||||
mg_io_uint16 min_pio_cyc_no_iordy; | |||||
mg_io_uint16 min_pio_cyc_with_iordy; | |||||
mg_io_uint8 reserved3[22]; | |||||
mg_io_uint16 major_ver_num; | |||||
mg_io_uint16 minor_ver_num; | |||||
mg_io_uint16 feature_cmd_set_suprt0; | |||||
mg_io_uint16 feature_cmd_set_suprt1; | |||||
mg_io_uint16 feature_cmd_set_suprt2; | |||||
mg_io_uint16 feature_cmd_set_en0; | |||||
mg_io_uint16 feature_cmd_set_en1; | |||||
mg_io_uint16 feature_cmd_set_en2; | |||||
mg_io_uint16 reserved4; | |||||
mg_io_uint16 req_time_for_security_er_done; | |||||
mg_io_uint16 req_time_for_enhan_security_er_done; | |||||
mg_io_uint16 adv_pwr_mgm_lvl_val; | |||||
mg_io_uint16 reserved5; | |||||
mg_io_uint16 re_of_hw_rst; | |||||
mg_io_uint8 reserved6[68]; | |||||
mg_io_uint16 security_stas; | |||||
mg_io_uint8 vendor_uniq_bytes[62]; | |||||
mg_io_uint16 cfa_pwr_mode; | |||||
mg_io_uint8 reserved7[186]; | |||||
mg_io_uint16 scts_per_secure_data_unit; | |||||
mg_io_uint16 integrity_word; | |||||
mg_io_uint16 general_configuration; /* 00 */ | |||||
mg_io_uint16 number_of_cylinders; /* 01 */ | |||||
mg_io_uint16 reserved1; /* 02 */ | |||||
mg_io_uint16 number_of_heads; /* 03 */ | |||||
mg_io_uint16 unformatted_bytes_per_track; /* 04 */ | |||||
mg_io_uint16 unformatted_bytes_per_sector; /* 05 */ | |||||
mg_io_uint16 sectors_per_track; /* 06 */ | |||||
mg_io_uint8 vendor_unique1[6]; /* 07/08/09 */ | |||||
mg_io_uint8 serial_number[20]; /* 10~19 */ | |||||
mg_io_uint16 buffer_type; /* 20 */ | |||||
mg_io_uint16 buffer_sector_size; /* 21 */ | |||||
mg_io_uint16 number_of_ecc_bytes; /* 22 */ | |||||
mg_io_uint8 firmware_revision[8]; /* 23~26 */ | |||||
mg_io_uint8 model_number[40]; /* 27 */ | |||||
mg_io_uint8 maximum_block_transfer; /* 47 low byte */ | |||||
mg_io_uint8 vendor_unique2; /* 47 high byte */ | |||||
mg_io_uint16 dword_io; /* 48 */ | |||||
mg_io_uint16 capabilities; /* 49 */ | |||||
mg_io_uint16 reserved2; /* 50 */ | |||||
mg_io_uint8 vendor_unique3; /* 51 low byte */ | |||||
mg_io_uint8 pio_cycle_timing_mode; /* 51 high byte */ | |||||
mg_io_uint8 vendor_unique4; /* 52 low byte */ | |||||
mg_io_uint8 dma_cycle_timing_mode; /* 52 high byte */ | |||||
mg_io_uint16 translation_fields_valid; /* 53 (low bit) */ | |||||
mg_io_uint16 number_of_current_cylinders; /* 54 */ | |||||
mg_io_uint16 number_of_current_heads; /* 55 */ | |||||
mg_io_uint16 current_sectors_per_track; /* 56 */ | |||||
mg_io_uint16 current_sector_capacity_lo; /* 57 & 58 */ | |||||
mg_io_uint16 current_sector_capacity_hi; /* 57 & 58 */ | |||||
mg_io_uint8 multi_sector_count; /* 59 low */ | |||||
mg_io_uint8 multi_sector_setting_valid; /* 59 high (low bit) */ | |||||
mg_io_uint16 total_user_addressable_sectors_lo; /* 60 & 61 */ | |||||
mg_io_uint16 total_user_addressable_sectors_hi; /* 60 & 61 */ | |||||
mg_io_uint8 single_dma_modes_supported; /* 62 low byte */ | |||||
mg_io_uint8 single_dma_transfer_active; /* 62 high byte */ | |||||
mg_io_uint8 multi_dma_modes_supported; /* 63 low byte */ | |||||
mg_io_uint8 multi_dma_transfer_active; /* 63 high byte */ | |||||
mg_io_uint16 adv_pio_mode; | |||||
mg_io_uint16 min_dma_cyc; | |||||
mg_io_uint16 recommend_dma_cyc; | |||||
mg_io_uint16 min_pio_cyc_no_iordy; | |||||
mg_io_uint16 min_pio_cyc_with_iordy; | |||||
mg_io_uint8 reserved3[22]; | |||||
mg_io_uint16 major_ver_num; | |||||
mg_io_uint16 minor_ver_num; | |||||
mg_io_uint16 feature_cmd_set_suprt0; | |||||
mg_io_uint16 feature_cmd_set_suprt1; | |||||
mg_io_uint16 feature_cmd_set_suprt2; | |||||
mg_io_uint16 feature_cmd_set_en0; | |||||
mg_io_uint16 feature_cmd_set_en1; | |||||
mg_io_uint16 feature_cmd_set_en2; | |||||
mg_io_uint16 reserved4; | |||||
mg_io_uint16 req_time_for_security_er_done; | |||||
mg_io_uint16 req_time_for_enhan_security_er_done; | |||||
mg_io_uint16 adv_pwr_mgm_lvl_val; | |||||
mg_io_uint16 reserved5; | |||||
mg_io_uint16 re_of_hw_rst; | |||||
mg_io_uint8 reserved6[68]; | |||||
mg_io_uint16 security_stas; | |||||
mg_io_uint8 vendor_uniq_bytes[62]; | |||||
mg_io_uint16 cfa_pwr_mode; | |||||
mg_io_uint8 reserved7[186]; | |||||
mg_io_uint16 scts_per_secure_data_unit; | |||||
mg_io_uint16 integrity_word; | |||||
} mg_io_type_drv_info; | } mg_io_type_drv_info; | ||||
@@ -140,105 +140,105 @@ typedef struct mflash_bank_s | |||||
extern int mflash_register_commands(struct command_context_s *cmd_ctx); | extern int mflash_register_commands(struct command_context_s *cmd_ctx); | ||||
extern int mflash_init_drivers(struct command_context_s *cmd_ctx); | extern int mflash_init_drivers(struct command_context_s *cmd_ctx); | ||||
#define MG_MFLASH_SECTOR_SIZE (0x200) //512Bytes = 2^9 | |||||
#define MG_MFLASH_SECTOR_SIZE_MASK (0x200-1) | |||||
#define MG_MFLASH_SECTOR_SIZE_SHIFT (9) | |||||
#define MG_MFLASH_SECTOR_SIZE (0x200) /* 512Bytes = 2^9 */ | |||||
#define MG_MFLASH_SECTOR_SIZE_MASK (0x200-1) | |||||
#define MG_MFLASH_SECTOR_SIZE_SHIFT (9) | |||||
#define MG_BUFFER_OFFSET 0x8000 | |||||
#define MG_BUFFER_OFFSET 0x8000 | |||||
#define MG_REG_OFFSET 0xC000 | #define MG_REG_OFFSET 0xC000 | ||||
#define MG_REG_FEATURE 0x2 // write case | |||||
#define MG_REG_ERROR 0x2 // read case | |||||
#define MG_REG_FEATURE 0x2 /* write case */ | |||||
#define MG_REG_ERROR 0x2 /* read case */ | |||||
#define MG_REG_SECT_CNT 0x4 | #define MG_REG_SECT_CNT 0x4 | ||||
#define MG_REG_SECT_NUM 0x6 | #define MG_REG_SECT_NUM 0x6 | ||||
#define MG_REG_CYL_LOW 0x8 | #define MG_REG_CYL_LOW 0x8 | ||||
#define MG_REG_CYL_HIGH 0xA | #define MG_REG_CYL_HIGH 0xA | ||||
#define MG_REG_DRV_HEAD 0xC | #define MG_REG_DRV_HEAD 0xC | ||||
#define MG_REG_COMMAND 0xE // write case | |||||
#define MG_REG_STATUS 0xE // read case | |||||
#define MG_REG_COMMAND 0xE /* write case */ | |||||
#define MG_REG_STATUS 0xE /* read case */ | |||||
#define MG_REG_DRV_CTRL 0x10 | #define MG_REG_DRV_CTRL 0x10 | ||||
#define MG_REG_BURST_CTRL 0x12 | #define MG_REG_BURST_CTRL 0x12 | ||||
#define MG_OEM_DISK_WAIT_TIME_LONG 15000 // msec | |||||
#define MG_OEM_DISK_WAIT_TIME_NORMAL 3000 // msec | |||||
#define MG_OEM_DISK_WAIT_TIME_SHORT 1000 // msec | |||||
#define MG_OEM_DISK_WAIT_TIME_LONG 15000 /* msec */ | |||||
#define MG_OEM_DISK_WAIT_TIME_NORMAL 3000 /* msec */ | |||||
#define MG_OEM_DISK_WAIT_TIME_SHORT 1000 /* msec */ | |||||
typedef enum _mg_io_type_wait{ | typedef enum _mg_io_type_wait{ | ||||
mg_io_wait_bsy = 1, | |||||
mg_io_wait_not_bsy = 2, | |||||
mg_io_wait_rdy = 3, | |||||
mg_io_wait_drq = 4, // wait for data request | |||||
mg_io_wait_drq_noerr = 5, // wait for DRQ but ignore the error status bit | |||||
mg_io_wait_rdy_noerr = 6 // wait for ready, but ignore error status bit | |||||
mg_io_wait_bsy = 1, | |||||
mg_io_wait_not_bsy = 2, | |||||
mg_io_wait_rdy = 3, | |||||
mg_io_wait_drq = 4, /* wait for data request */ | |||||
mg_io_wait_drq_noerr = 5, /* wait for DRQ but ignore the error status bit */ | |||||
mg_io_wait_rdy_noerr = 6 /* wait for ready, but ignore error status bit */ | |||||
} mg_io_type_wait; | } mg_io_type_wait; | ||||
//= "Status Register" bit masks. | |||||
/*= "Status Register" bit masks. */ | |||||
typedef enum _mg_io_type_rbit_status{ | typedef enum _mg_io_type_rbit_status{ | ||||
mg_io_rbit_status_error = 0x01, // error bit in status register | |||||
mg_io_rbit_status_corrected_error = 0x04, // corrected error in status register | |||||
mg_io_rbit_status_data_req = 0x08, // data request bit in status register | |||||
mg_io_rbit_status_seek_done = 0x10, // DSC - Drive Seek Complete | |||||
mg_io_rbit_status_write_fault = 0x20, // DWF - Drive Write Fault | |||||
mg_io_rbit_status_ready = 0x40, | |||||
mg_io_rbit_status_busy = 0x80 | |||||
mg_io_rbit_status_error = 0x01, /* error bit in status register */ | |||||
mg_io_rbit_status_corrected_error = 0x04, /* corrected error in status register */ | |||||
mg_io_rbit_status_data_req = 0x08, /* data request bit in status register */ | |||||
mg_io_rbit_status_seek_done = 0x10, /* DSC - Drive Seek Complete */ | |||||
mg_io_rbit_status_write_fault = 0x20, /* DWF - Drive Write Fault */ | |||||
mg_io_rbit_status_ready = 0x40, | |||||
mg_io_rbit_status_busy = 0x80 | |||||
} mg_io_type_rbit_status; | } mg_io_type_rbit_status; | ||||
//= "Error Register" bit masks. | |||||
/*= "Error Register" bit masks. */ | |||||
typedef enum _mg_io_type_rbit_error{ | typedef enum _mg_io_type_rbit_error{ | ||||
mg_io_rbit_err_general = 0x01, | |||||
mg_io_rbit_err_aborted = 0x04, | |||||
mg_io_rbit_err_bad_sect_num = 0x10, | |||||
mg_io_rbit_err_uncorrectable = 0x40, | |||||
mg_io_rbit_err_bad_block = 0x80 | |||||
mg_io_rbit_err_general = 0x01, | |||||
mg_io_rbit_err_aborted = 0x04, | |||||
mg_io_rbit_err_bad_sect_num = 0x10, | |||||
mg_io_rbit_err_uncorrectable = 0x40, | |||||
mg_io_rbit_err_bad_block = 0x80 | |||||
} mg_io_type_rbit_error; | } mg_io_type_rbit_error; | ||||
//= "Device Control Register" bit. | |||||
/* = "Device Control Register" bit. */ | |||||
typedef enum _mg_io_type_rbit_devc{ | typedef enum _mg_io_type_rbit_devc{ | ||||
mg_io_rbit_devc_intr = 0x02,// interrupt enable bit (1:disable, 0:enable) | |||||
mg_io_rbit_devc_srst = 0x04 // softwrae reset bit (1:assert, 0:de-assert) | |||||
mg_io_rbit_devc_intr = 0x02, /* interrupt enable bit (1:disable, 0:enable) */ | |||||
mg_io_rbit_devc_srst = 0x04 /* softwrae reset bit (1:assert, 0:de-assert) */ | |||||
} mg_io_type_rbit_devc; | } mg_io_type_rbit_devc; | ||||
// "Drive Select/Head Register" values. | |||||
/* "Drive Select/Head Register" values. */ | |||||
typedef enum _mg_io_type_rval_dev{ | typedef enum _mg_io_type_rval_dev{ | ||||
mg_io_rval_dev_must_be_on = 0x80, // These 1 bits are always on | |||||
mg_io_rval_dev_drv_master = (0x00 | mg_io_rval_dev_must_be_on),// Master | |||||
mg_io_rval_dev_drv_slave0 = (0x10 | mg_io_rval_dev_must_be_on),// Slave0 | |||||
mg_io_rval_dev_drv_slave1 = (0x20 | mg_io_rval_dev_must_be_on),// Slave1 | |||||
mg_io_rval_dev_drv_slave2 = (0x30 | mg_io_rval_dev_must_be_on),// Slave2 | |||||
mg_io_rval_dev_lba_mode = (0x40 | mg_io_rval_dev_must_be_on) | |||||
mg_io_rval_dev_must_be_on = 0x80, /* These 1 bits are always on */ | |||||
mg_io_rval_dev_drv_master = (0x00 | mg_io_rval_dev_must_be_on), /* Master */ | |||||
mg_io_rval_dev_drv_slave0 = (0x10 | mg_io_rval_dev_must_be_on), /* Slave0 */ | |||||
mg_io_rval_dev_drv_slave1 = (0x20 | mg_io_rval_dev_must_be_on), /* Slave1 */ | |||||
mg_io_rval_dev_drv_slave2 = (0x30 | mg_io_rval_dev_must_be_on), /* Slave2 */ | |||||
mg_io_rval_dev_lba_mode = (0x40 | mg_io_rval_dev_must_be_on) | |||||
} mg_io_type_rval_dev; | } mg_io_type_rval_dev; | ||||
typedef enum _mg_io_type_cmd | typedef enum _mg_io_type_cmd | ||||
{ | { | ||||
mg_io_cmd_read =0x20, | |||||
mg_io_cmd_write =0x30, | |||||
mg_io_cmd_read =0x20, | |||||
mg_io_cmd_write =0x30, | |||||
mg_io_cmd_setmul =0xC6, | |||||
mg_io_cmd_readmul =0xC4, | |||||
mg_io_cmd_writemul =0xC5, | |||||
mg_io_cmd_setmul =0xC6, | |||||
mg_io_cmd_readmul =0xC4, | |||||
mg_io_cmd_writemul =0xC5, | |||||
mg_io_cmd_idle =0x97,//0xE3 | |||||
mg_io_cmd_idle_immediate =0x95,//0xE1 | |||||
mg_io_cmd_idle =0x97, /* 0xE3 */ | |||||
mg_io_cmd_idle_immediate =0x95, /* 0xE1 */ | |||||
mg_io_cmd_setsleep =0x99,//0xE6 | |||||
mg_io_cmd_stdby =0x96,//0xE2 | |||||
mg_io_cmd_stdby_immediate =0x94,//0xE0 | |||||
mg_io_cmd_setsleep =0x99, /* 0xE6 */ | |||||
mg_io_cmd_stdby =0x96, /* 0xE2 */ | |||||
mg_io_cmd_stdby_immediate =0x94, /* 0xE0 */ | |||||
mg_io_cmd_identify =0xEC, | |||||
mg_io_cmd_set_feature =0xEF, | |||||
mg_io_cmd_identify =0xEC, | |||||
mg_io_cmd_set_feature =0xEF, | |||||
mg_io_cmd_confirm_write =0x3C, | |||||
mg_io_cmd_confirm_read =0x40, | |||||
mg_io_cmd_wakeup =0xC3 | |||||
mg_io_cmd_confirm_write =0x3C, | |||||
mg_io_cmd_confirm_read =0x40, | |||||
mg_io_cmd_wakeup =0xC3 | |||||
} mg_io_type_cmd; | } mg_io_type_cmd; | ||||
@@ -1524,4 +1524,3 @@ int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -85,11 +85,11 @@ | |||||
#define S3C2440_NFCONT_SPARE_ECCLOCK (1<<6) | #define S3C2440_NFCONT_SPARE_ECCLOCK (1<<6) | ||||
#define S3C2440_NFCONT_MAIN_ECCLOCK (1<<5) | #define S3C2440_NFCONT_MAIN_ECCLOCK (1<<5) | ||||
#define S3C2440_NFCONT_INITECC (1<<4) | #define S3C2440_NFCONT_INITECC (1<<4) | ||||
#define S3C2440_NFCONT_nFCE (1<<1) | |||||
#define S3C2440_NFCONT_nFCE (1<<1) | |||||
#define S3C2440_NFCONT_ENABLE (1<<0) | #define S3C2440_NFCONT_ENABLE (1<<0) | ||||
#define S3C2440_NFSTAT_READY (1<<0) | #define S3C2440_NFSTAT_READY (1<<0) | ||||
#define S3C2440_NFSTAT_nCE (1<<1) | |||||
#define S3C2440_NFSTAT_nCE (1<<1) | |||||
#define S3C2440_NFSTAT_RnB_CHANGE (1<<2) | #define S3C2440_NFSTAT_RnB_CHANGE (1<<2) | ||||
#define S3C2440_NFSTAT_ILLEGAL_ACCESS (1<<3) | #define S3C2440_NFSTAT_ILLEGAL_ACCESS (1<<3) | ||||
@@ -114,13 +114,13 @@ | |||||
#define S3C2412_NFSTAT_RnB_CHANGE (1<<4) | #define S3C2412_NFSTAT_RnB_CHANGE (1<<4) | ||||
#define S3C2412_NFSTAT_nFCE1 (1<<3) | #define S3C2412_NFSTAT_nFCE1 (1<<3) | ||||
#define S3C2412_NFSTAT_nFCE0 (1<<2) | #define S3C2412_NFSTAT_nFCE0 (1<<2) | ||||
#define S3C2412_NFSTAT_Res1 (1<<1) | |||||
#define S3C2412_NFSTAT_Res1 (1<<1) | |||||
#define S3C2412_NFSTAT_READY (1<<0) | #define S3C2412_NFSTAT_READY (1<<0) | ||||
#define S3C2412_NFECCERR_SERRDATA(x) (((x) >> 21) & 0xf) | #define S3C2412_NFECCERR_SERRDATA(x) (((x) >> 21) & 0xf) | ||||
#define S3C2412_NFECCERR_SERRBIT(x) (((x) >> 18) & 0x7) | |||||
#define S3C2412_NFECCERR_SERRBIT(x) (((x) >> 18) & 0x7) | |||||
#define S3C2412_NFECCERR_MERRDATA(x) (((x) >> 7) & 0x3ff) | #define S3C2412_NFECCERR_MERRDATA(x) (((x) >> 7) & 0x3ff) | ||||
#define S3C2412_NFECCERR_MERRBIT(x) (((x) >> 4) & 0x7) | |||||
#define S3C2412_NFECCERR_MERRBIT(x) (((x) >> 4) & 0x7) | |||||
#define S3C2412_NFECCERR_SPARE_ERR(x) (((x) >> 2) & 0x3) | #define S3C2412_NFECCERR_SPARE_ERR(x) (((x) >> 2) & 0x3) | ||||
#define S3C2412_NFECCERR_MAIN_ERR(x) (((x) >> 2) & 0x3) | #define S3C2412_NFECCERR_MAIN_ERR(x) (((x) >> 2) & 0x3) | ||||
#define S3C2412_NFECCERR_NONE (0) | #define S3C2412_NFECCERR_NONE (0) | ||||
@@ -83,7 +83,6 @@ typedef struct stellaris_flash_bank_s | |||||
#define AMASK 1 | #define AMASK 1 | ||||
#define PMASK 2 | #define PMASK 2 | ||||
/* Flash Controller Command bits */ | /* Flash Controller Command bits */ | ||||
#define FMC_WRKEY (0xA442<<16) | #define FMC_WRKEY (0xA442<<16) | ||||
#define FMC_COMT (1<<3) | #define FMC_COMT (1<<3) | ||||
@@ -100,4 +100,3 @@ typedef struct stm32x_mem_layout_s { | |||||
} stm32x_mem_layout_t; | } stm32x_mem_layout_t; | ||||
#endif /* STM32X_H */ | #endif /* STM32X_H */ | ||||
@@ -717,4 +717,3 @@ int str7x_handle_disable_jtag_command(struct command_context_s *cmd_ctx, char *c | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -109,4 +109,3 @@ typedef struct str7x_mem_layout_s { | |||||
} str7x_mem_layout_t; | } str7x_mem_layout_t; | ||||
#endif /* STR7X_H */ | #endif /* STR7X_H */ | ||||
@@ -50,7 +50,7 @@ enum str9x_status_codes | |||||
STR9X_BUSY = 11 | STR9X_BUSY = 11 | ||||
}; | }; | ||||
/* Flash registers */ | |||||
/* Flash registers */ | |||||
#define FLASH_BBSR 0x54000000 /* Boot Bank Size Register */ | #define FLASH_BBSR 0x54000000 /* Boot Bank Size Register */ | ||||
#define FLASH_NBBSR 0x54000004 /* Non-Boot Bank Size Register */ | #define FLASH_NBBSR 0x54000004 /* Non-Boot Bank Size Register */ | ||||
@@ -61,4 +61,3 @@ enum str9x_status_codes | |||||
#define FLASH_BCE5ADDR 0x54000020 /* BC Fifth Entry Target Address Register */ | #define FLASH_BCE5ADDR 0x54000020 /* BC Fifth Entry Target Address Register */ | ||||
#endif /* STR9X_H */ | #endif /* STR9X_H */ | ||||
@@ -73,7 +73,7 @@ const flash_sector_t TMS470R1A256_SECTORS[] = { | |||||
}; | }; | ||||
#define TMS470R1A256_NUM_SECTORS \ | #define TMS470R1A256_NUM_SECTORS \ | ||||
(sizeof(TMS470R1A256_SECTORS)/sizeof(TMS470R1A256_SECTORS[0])) | |||||
(sizeof(TMS470R1A256_SECTORS)/sizeof(TMS470R1A256_SECTORS[0])) | |||||
const flash_sector_t TMS470R1A288_BANK0_SECTORS[] = { | const flash_sector_t TMS470R1A288_BANK0_SECTORS[] = { | ||||
{0x00000000, 0x00002000, -1, -1}, | {0x00000000, 0x00002000, -1, -1}, | ||||
@@ -83,7 +83,7 @@ const flash_sector_t TMS470R1A288_BANK0_SECTORS[] = { | |||||
}; | }; | ||||
#define TMS470R1A288_BANK0_NUM_SECTORS \ | #define TMS470R1A288_BANK0_NUM_SECTORS \ | ||||
(sizeof(TMS470R1A288_BANK0_SECTORS)/sizeof(TMS470R1A288_BANK0_SECTORS[0])) | |||||
(sizeof(TMS470R1A288_BANK0_SECTORS)/sizeof(TMS470R1A288_BANK0_SECTORS[0])) | |||||
const flash_sector_t TMS470R1A288_BANK1_SECTORS[] = { | const flash_sector_t TMS470R1A288_BANK1_SECTORS[] = { | ||||
{0x00040000, 0x00010000, -1, -1}, | {0x00040000, 0x00010000, -1, -1}, | ||||
@@ -93,43 +93,43 @@ const flash_sector_t TMS470R1A288_BANK1_SECTORS[] = { | |||||
}; | }; | ||||
#define TMS470R1A288_BANK1_NUM_SECTORS \ | #define TMS470R1A288_BANK1_NUM_SECTORS \ | ||||
(sizeof(TMS470R1A288_BANK1_SECTORS)/sizeof(TMS470R1A288_BANK1_SECTORS[0])) | |||||
(sizeof(TMS470R1A288_BANK1_SECTORS)/sizeof(TMS470R1A288_BANK1_SECTORS[0])) | |||||
const flash_sector_t TMS470R1A384_BANK0_SECTORS[] = { | const flash_sector_t TMS470R1A384_BANK0_SECTORS[] = { | ||||
{0x00000000, 0x00002000, -1, -1}, | |||||
{0x00002000, 0x00002000, -1, -1}, | |||||
{0x00004000, 0x00004000, -1, -1}, | |||||
{0x00008000, 0x00004000, -1, -1}, | |||||
{0x0000C000, 0x00004000, -1, -1}, | |||||
{0x00010000, 0x00004000, -1, -1}, | |||||
{0x00014000, 0x00004000, -1, -1}, | |||||
{0x00018000, 0x00002000, -1, -1}, | |||||
{0x0001C000, 0x00002000, -1, -1}, | |||||
{0x0001E000, 0x00002000, -1, -1}, | |||||
{0x00000000, 0x00002000, -1, -1}, | |||||
{0x00002000, 0x00002000, -1, -1}, | |||||
{0x00004000, 0x00004000, -1, -1}, | |||||
{0x00008000, 0x00004000, -1, -1}, | |||||
{0x0000C000, 0x00004000, -1, -1}, | |||||
{0x00010000, 0x00004000, -1, -1}, | |||||
{0x00014000, 0x00004000, -1, -1}, | |||||
{0x00018000, 0x00002000, -1, -1}, | |||||
{0x0001C000, 0x00002000, -1, -1}, | |||||
{0x0001E000, 0x00002000, -1, -1}, | |||||
}; | }; | ||||
#define TMS470R1A384_BANK0_NUM_SECTORS \ | #define TMS470R1A384_BANK0_NUM_SECTORS \ | ||||
(sizeof(TMS470R1A384_BANK0_SECTORS)/sizeof(TMS470R1A384_BANK0_SECTORS[0])) | |||||
(sizeof(TMS470R1A384_BANK0_SECTORS)/sizeof(TMS470R1A384_BANK0_SECTORS[0])) | |||||
const flash_sector_t TMS470R1A384_BANK1_SECTORS[] = { | const flash_sector_t TMS470R1A384_BANK1_SECTORS[] = { | ||||
{0x00020000, 0x00008000, -1, -1}, | |||||
{0x00028000, 0x00008000, -1, -1}, | |||||
{0x00030000, 0x00008000, -1, -1}, | |||||
{0x00038000, 0x00008000, -1, -1}, | |||||
{0x00020000, 0x00008000, -1, -1}, | |||||
{0x00028000, 0x00008000, -1, -1}, | |||||
{0x00030000, 0x00008000, -1, -1}, | |||||
{0x00038000, 0x00008000, -1, -1}, | |||||
}; | }; | ||||
#define TMS470R1A384_BANK1_NUM_SECTORS \ | #define TMS470R1A384_BANK1_NUM_SECTORS \ | ||||
(sizeof(TMS470R1A384_BANK1_SECTORS)/sizeof(TMS470R1A384_BANK1_SECTORS[0])) | |||||
(sizeof(TMS470R1A384_BANK1_SECTORS)/sizeof(TMS470R1A384_BANK1_SECTORS[0])) | |||||
const flash_sector_t TMS470R1A384_BANK2_SECTORS[] = { | const flash_sector_t TMS470R1A384_BANK2_SECTORS[] = { | ||||
{0x00040000, 0x00008000, -1, -1}, | |||||
{0x00048000, 0x00008000, -1, -1}, | |||||
{0x00050000, 0x00008000, -1, -1}, | |||||
{0x00058000, 0x00008000, -1, -1}, | |||||
{0x00040000, 0x00008000, -1, -1}, | |||||
{0x00048000, 0x00008000, -1, -1}, | |||||
{0x00050000, 0x00008000, -1, -1}, | |||||
{0x00058000, 0x00008000, -1, -1}, | |||||
}; | }; | ||||
#define TMS470R1A384_BANK2_NUM_SECTORS \ | #define TMS470R1A384_BANK2_NUM_SECTORS \ | ||||
(sizeof(TMS470R1A384_BANK2_SECTORS)/sizeof(TMS470R1A384_BANK2_SECTORS[0])) | |||||
(sizeof(TMS470R1A384_BANK2_SECTORS)/sizeof(TMS470R1A384_BANK2_SECTORS[0])) | |||||
/* ---------------------------------------------------------------------- */ | /* ---------------------------------------------------------------------- */ | ||||
@@ -229,56 +229,56 @@ int tms470_read_part_info(struct flash_bank_s *bank) | |||||
} | } | ||||
break; | break; | ||||
case 0x2d: | |||||
part_name = "TMS470R1A384"; | |||||
if ((bank->base >= 0x00000000) && (bank->base < 0x00020000)) | |||||
{ | |||||
tms470_info->ordinal = 0; | |||||
bank->base = 0x00000000; | |||||
bank->size = 128 * 1024; | |||||
bank->num_sectors = TMS470R1A384_BANK0_NUM_SECTORS; | |||||
bank->sectors = malloc(sizeof(TMS470R1A384_BANK0_SECTORS)); | |||||
if (!bank->sectors) | |||||
{ | |||||
return ERROR_FLASH_OPERATION_FAILED; | |||||
} | |||||
(void)memcpy(bank->sectors, TMS470R1A384_BANK0_SECTORS, sizeof(TMS470R1A384_BANK0_SECTORS)); | |||||
} | |||||
else if ((bank->base >= 0x00020000) && (bank->base < 0x00040000)) | |||||
{ | |||||
tms470_info->ordinal = 1; | |||||
bank->base = 0x00020000; | |||||
bank->size = 128 * 1024; | |||||
bank->num_sectors = TMS470R1A384_BANK1_NUM_SECTORS; | |||||
bank->sectors = malloc(sizeof(TMS470R1A384_BANK1_SECTORS)); | |||||
if (!bank->sectors) | |||||
{ | |||||
return ERROR_FLASH_OPERATION_FAILED; | |||||
} | |||||
(void)memcpy(bank->sectors, TMS470R1A384_BANK1_SECTORS, sizeof(TMS470R1A384_BANK1_SECTORS)); | |||||
} | |||||
else if ((bank->base >= 0x00040000) && (bank->base < 0x00060000)) | |||||
{ | |||||
tms470_info->ordinal = 2; | |||||
bank->base = 0x00040000; | |||||
bank->size = 128 * 1024; | |||||
bank->num_sectors = TMS470R1A384_BANK2_NUM_SECTORS; | |||||
bank->sectors = malloc(sizeof(TMS470R1A384_BANK2_SECTORS)); | |||||
if (!bank->sectors) | |||||
{ | |||||
return ERROR_FLASH_OPERATION_FAILED; | |||||
} | |||||
(void)memcpy(bank->sectors, TMS470R1A384_BANK2_SECTORS, sizeof(TMS470R1A384_BANK2_SECTORS)); | |||||
} | |||||
else | |||||
{ | |||||
LOG_ERROR("No %s flash bank contains base address 0x%08x.", part_name, bank->base); | |||||
return ERROR_FLASH_OPERATION_FAILED; | |||||
} | |||||
break; | |||||
default: | |||||
case 0x2d: | |||||
part_name = "TMS470R1A384"; | |||||
if ((bank->base >= 0x00000000) && (bank->base < 0x00020000)) | |||||
{ | |||||
tms470_info->ordinal = 0; | |||||
bank->base = 0x00000000; | |||||
bank->size = 128 * 1024; | |||||
bank->num_sectors = TMS470R1A384_BANK0_NUM_SECTORS; | |||||
bank->sectors = malloc(sizeof(TMS470R1A384_BANK0_SECTORS)); | |||||
if (!bank->sectors) | |||||
{ | |||||
return ERROR_FLASH_OPERATION_FAILED; | |||||
} | |||||
(void)memcpy(bank->sectors, TMS470R1A384_BANK0_SECTORS, sizeof(TMS470R1A384_BANK0_SECTORS)); | |||||
} | |||||
else if ((bank->base >= 0x00020000) && (bank->base < 0x00040000)) | |||||
{ | |||||
tms470_info->ordinal = 1; | |||||
bank->base = 0x00020000; | |||||
bank->size = 128 * 1024; | |||||
bank->num_sectors = TMS470R1A384_BANK1_NUM_SECTORS; | |||||
bank->sectors = malloc(sizeof(TMS470R1A384_BANK1_SECTORS)); | |||||
if (!bank->sectors) | |||||
{ | |||||
return ERROR_FLASH_OPERATION_FAILED; | |||||
} | |||||
(void)memcpy(bank->sectors, TMS470R1A384_BANK1_SECTORS, sizeof(TMS470R1A384_BANK1_SECTORS)); | |||||
} | |||||
else if ((bank->base >= 0x00040000) && (bank->base < 0x00060000)) | |||||
{ | |||||
tms470_info->ordinal = 2; | |||||
bank->base = 0x00040000; | |||||
bank->size = 128 * 1024; | |||||
bank->num_sectors = TMS470R1A384_BANK2_NUM_SECTORS; | |||||
bank->sectors = malloc(sizeof(TMS470R1A384_BANK2_SECTORS)); | |||||
if (!bank->sectors) | |||||
{ | |||||
return ERROR_FLASH_OPERATION_FAILED; | |||||
} | |||||
(void)memcpy(bank->sectors, TMS470R1A384_BANK2_SECTORS, sizeof(TMS470R1A384_BANK2_SECTORS)); | |||||
} | |||||
else | |||||
{ | |||||
LOG_ERROR("No %s flash bank contains base address 0x%08x.", part_name, bank->base); | |||||
return ERROR_FLASH_OPERATION_FAILED; | |||||
} | |||||
break; | |||||
default: | |||||
LOG_WARNING("Could not identify part 0x%02x as a member of the TMS470 family.", part_number); | LOG_WARNING("Could not identify part 0x%02x as a member of the TMS470 family.", part_number); | ||||
return ERROR_FLASH_OPERATION_FAILED; | return ERROR_FLASH_OPERATION_FAILED; | ||||
} | } | ||||
@@ -30,7 +30,7 @@ int main(int argc, char **argv) | |||||
if (argc == 1) { | if (argc == 1) { | ||||
fprintf(stderr, "bin2char <varname>\n"); | fprintf(stderr, "bin2char <varname>\n"); | ||||
fprintf(stderr, "read from standard input and write a char" | fprintf(stderr, "read from standard input and write a char" | ||||
" array out to standard output\n"); | |||||
" array out to standard output\n"); | |||||
exit(1); | exit(1); | ||||
} | } | ||||
@@ -210,7 +210,7 @@ char* buf_to_str(const u8 *buf, int buf_len, int radix) | |||||
else if (radix == 10) | else if (radix == 10) | ||||
{ | { | ||||
factor = 2.40824; /* log(256) / log(10) = 2.40824 */ | factor = 2.40824; /* log(256) / log(10) = 2.40824 */ | ||||
} | |||||
} | |||||
else if (radix == 8) | else if (radix == 8) | ||||
{ | { | ||||
factor = 2.66667; /* log(256) / log(8) = 2.66667 */ | factor = 2.66667; /* log(256) / log(8) = 2.66667 */ | ||||
@@ -222,20 +222,20 @@ char* buf_to_str(const u8 *buf, int buf_len, int radix) | |||||
str = calloc(str_len + 1, 1); | str = calloc(str_len + 1, 1); | ||||
for (i = b256_len - 1; i >= 0; i--) | for (i = b256_len - 1; i >= 0; i--) | ||||
{ | |||||
tmp = buf[i]; | |||||
if ((i == (buf_len / 8)) && (buf_len % 8)) | |||||
tmp &= (0xff >> (8 - (buf_len % 8))); | |||||
for (j = str_len; j > 0; j--) | |||||
{ | |||||
tmp += (u32)str[j-1] * 256; | |||||
str[j-1] = (u8)(tmp % radix); | |||||
tmp /= radix; | |||||
} | |||||
} | |||||
for (j = 0; j < str_len; j++) | |||||
{ | |||||
tmp = buf[i]; | |||||
if ((i == (buf_len / 8)) && (buf_len % 8)) | |||||
tmp &= (0xff >> (8 - (buf_len % 8))); | |||||
for (j = str_len; j > 0; j--) | |||||
{ | |||||
tmp += (u32)str[j-1] * 256; | |||||
str[j-1] = (u8)(tmp % radix); | |||||
tmp /= radix; | |||||
} | |||||
} | |||||
for (j = 0; j < str_len; j++) | |||||
str[j] = DIGITS[(int)str[j]]; | str[j] = DIGITS[(int)str[j]]; | ||||
return str; | return str; | ||||
@@ -295,23 +295,23 @@ int str_to_buf(const char *str, int str_len, u8 *buf, int buf_len, int radix) | |||||
for (i = 0; charbuf[i]; i++) | for (i = 0; charbuf[i]; i++) | ||||
{ | { | ||||
tmp = charbuf[i]; | tmp = charbuf[i]; | ||||
if ((tmp >= '0') && (tmp <= '9')) | |||||
tmp = (tmp - '0'); | |||||
else if ((tmp >= 'a') && (tmp <= 'f')) | |||||
tmp = (tmp - 'a' + 10); | |||||
else if ((tmp >= 'A') && (tmp <= 'F')) | |||||
tmp = (tmp - 'A' + 10); | |||||
else continue; /* skip characters other than [0-9,a-f,A-F] */ | |||||
if ((tmp >= '0') && (tmp <= '9')) | |||||
tmp = (tmp - '0'); | |||||
else if ((tmp >= 'a') && (tmp <= 'f')) | |||||
tmp = (tmp - 'a' + 10); | |||||
else if ((tmp >= 'A') && (tmp <= 'F')) | |||||
tmp = (tmp - 'A' + 10); | |||||
else continue; /* skip characters other than [0-9,a-f,A-F] */ | |||||
if (tmp >= radix) | if (tmp >= radix) | ||||
continue; /* skip digits invalid for the current radix */ | continue; /* skip digits invalid for the current radix */ | ||||
for (j = 0; j < b256_len; j++) | for (j = 0; j < b256_len; j++) | ||||
{ | |||||
tmp += (u32)b256_buf[j] * radix; | |||||
b256_buf[j] = (u8)(tmp & 0xFF); | |||||
tmp >>= 8; | |||||
} | |||||
{ | |||||
tmp += (u32)b256_buf[j] * radix; | |||||
b256_buf[j] = (u8)(tmp & 0xFF); | |||||
tmp >>= 8; | |||||
} | |||||
} | } | ||||
@@ -229,9 +229,9 @@ command_t* register_command(command_context_t *context, command_t *parent, char | |||||
free((void *)override_name); | free((void *)override_name); | ||||
/* accumulate help text in Tcl helptext list. */ | /* accumulate help text in Tcl helptext list. */ | ||||
Jim_Obj *helptext=Jim_GetGlobalVariableStr(interp, "ocd_helptext", JIM_ERRMSG); | |||||
if (Jim_IsShared(helptext)) | |||||
helptext = Jim_DuplicateObj(interp, helptext); | |||||
Jim_Obj *helptext=Jim_GetGlobalVariableStr(interp, "ocd_helptext", JIM_ERRMSG); | |||||
if (Jim_IsShared(helptext)) | |||||
helptext = Jim_DuplicateObj(interp, helptext); | |||||
Jim_Obj *cmd_entry=Jim_NewListObj(interp, NULL, 0); | Jim_Obj *cmd_entry=Jim_NewListObj(interp, NULL, 0); | ||||
Jim_Obj *cmd_list=Jim_NewListObj(interp, NULL, 0); | Jim_Obj *cmd_list=Jim_NewListObj(interp, NULL, 0); | ||||
@@ -356,8 +356,8 @@ void command_print_n(command_context_t *context, char *format, ...) | |||||
* The latter bit isn't precisely neat, but will do for now. | * The latter bit isn't precisely neat, but will do for now. | ||||
*/ | */ | ||||
LOG_USER_N("%s", string); | LOG_USER_N("%s", string); | ||||
// We already printed it above | |||||
//command_output_text(context, string); | |||||
/* We already printed it above */ | |||||
/* command_output_text(context, string); */ | |||||
free(string); | free(string); | ||||
} | } | ||||
@@ -381,8 +381,8 @@ void command_print(command_context_t *context, char *format, ...) | |||||
* The latter bit isn't precisely neat, but will do for now. | * The latter bit isn't precisely neat, but will do for now. | ||||
*/ | */ | ||||
LOG_USER_N("%s", string); | LOG_USER_N("%s", string); | ||||
// We already printed it above | |||||
//command_output_text(context, string); | |||||
/* We already printed it above */ | |||||
/* command_output_text(context, string); */ | |||||
free(string); | free(string); | ||||
} | } | ||||
@@ -644,7 +644,6 @@ static char* openocd_jim_fgets(char *s, int size, void *cookie) | |||||
return NULL; | return NULL; | ||||
} | } | ||||
static int jim_capture(Jim_Interp *interp, int argc, Jim_Obj *const *argv) | static int jim_capture(Jim_Interp *interp, int argc, Jim_Obj *const *argv) | ||||
{ | { | ||||
if (argc != 2) | if (argc != 2) | ||||
@@ -801,7 +800,7 @@ void register_jim(struct command_context_s *cmd_ctx, const char *name, int (*cmd | |||||
Jim_CreateCommand(interp, name, cmd, NULL, NULL); | Jim_CreateCommand(interp, name, cmd, NULL, NULL); | ||||
/* FIX!!! it would be prettier to invoke add_help_text... | /* FIX!!! it would be prettier to invoke add_help_text... | ||||
accumulate help text in Tcl helptext list. */ | |||||
* accumulate help text in Tcl helptext list. */ | |||||
Jim_Obj *helptext=Jim_GetGlobalVariableStr(interp, "ocd_helptext", JIM_ERRMSG); | Jim_Obj *helptext=Jim_GetGlobalVariableStr(interp, "ocd_helptext", JIM_ERRMSG); | ||||
if (Jim_IsShared(helptext)) | if (Jim_IsShared(helptext)) | ||||
helptext = Jim_DuplicateObj(interp, helptext); | helptext = Jim_DuplicateObj(interp, helptext); | ||||
@@ -816,7 +815,6 @@ void register_jim(struct command_context_s *cmd_ctx, const char *name, int (*cmd | |||||
Jim_ListAppendElement(interp, helptext, cmd_entry); | Jim_ListAppendElement(interp, helptext, cmd_entry); | ||||
} | } | ||||
/* return global variable long value or 0 upon failure */ | /* return global variable long value or 0 upon failure */ | ||||
long jim_global_long(const char *variable) | long jim_global_long(const char *variable) | ||||
{ | { | ||||
@@ -91,7 +91,6 @@ char *find_file(const char *file) | |||||
return NULL; | return NULL; | ||||
} | } | ||||
FILE *open_file_from_path (char *file, char *mode) | FILE *open_file_from_path (char *file, char *mode) | ||||
{ | { | ||||
if (mode[0]!='r') | if (mode[0]!='r') | ||||
@@ -44,7 +44,6 @@ enum fileio_type | |||||
FILEIO_BINARY, | FILEIO_BINARY, | ||||
}; | }; | ||||
enum fileio_access | enum fileio_access | ||||
{ | { | ||||
FILEIO_READ, /* open for reading, position at beginning */ | FILEIO_READ, /* open for reading, position at beginning */ | ||||
@@ -71,7 +70,7 @@ extern int fileio_close(fileio_t *fileio); | |||||
extern int fileio_open(fileio_t *fileio, char *url, enum fileio_access access, enum fileio_type type); | extern int fileio_open(fileio_t *fileio, char *url, enum fileio_access access, enum fileio_type type); | ||||
extern int fileio_read_u32(fileio_t *fileio, u32 *data); | extern int fileio_read_u32(fileio_t *fileio, u32 *data); | ||||
extern int fileio_write_u32(fileio_t *fileio, u32 data); | extern int fileio_write_u32(fileio_t *fileio, u32 data); | ||||
#define ERROR_FILEIO_LOCATION_UNKNOWN (-1200) | #define ERROR_FILEIO_LOCATION_UNKNOWN (-1200) | ||||
#define ERROR_FILEIO_NOT_FOUND (-1201) | #define ERROR_FILEIO_NOT_FOUND (-1201) | ||||
#define ERROR_FILEIO_OPERATION_FAILED (-1202) | #define ERROR_FILEIO_OPERATION_FAILED (-1202) | ||||
@@ -413,7 +413,6 @@ void alive_sleep(int ms) | |||||
} | } | ||||
} | } | ||||
void busy_sleep(int ms) | void busy_sleep(int ms) | ||||
{ | { | ||||
long long then; | long long then; | ||||
@@ -124,6 +124,6 @@ extern int debug_level; | |||||
/* see "Error:" log entry for meaningful message to the user. The caller should | /* see "Error:" log entry for meaningful message to the user. The caller should | ||||
* make no assumptions about what went wrong and try to handle the problem. | * make no assumptions about what went wrong and try to handle the problem. | ||||
*/ | */ | ||||
#define ERROR_FAIL (-4) | |||||
#define ERROR_FAIL (-4) | |||||
#endif /* LOG_H */ | #endif /* LOG_H */ |
@@ -163,6 +163,5 @@ int parse_cmdline_args(struct command_context_s *cmd_ctx, int argc, char *argv[] | |||||
exit(-1); | exit(-1); | ||||
} | } | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } |
@@ -82,19 +82,19 @@ void *fill_malloc(size_t size) | |||||
int gettimeofday(struct timeval *tv, struct timezone *tz) | int gettimeofday(struct timeval *tv, struct timezone *tz) | ||||
{ | { | ||||
FILETIME ft; | |||||
LARGE_INTEGER li; | |||||
__int64 t; | |||||
static int tzflag; | |||||
FILETIME ft; | |||||
LARGE_INTEGER li; | |||||
__int64 t; | |||||
static int tzflag; | |||||
if (tv) | if (tv) | ||||
{ | { | ||||
GetSystemTimeAsFileTime(&ft); | GetSystemTimeAsFileTime(&ft); | ||||
li.LowPart = ft.dwLowDateTime; | li.LowPart = ft.dwLowDateTime; | ||||
li.HighPart = ft.dwHighDateTime; | li.HighPart = ft.dwHighDateTime; | ||||
t = li.QuadPart; /* In 100-nanosecond intervals */ | |||||
t -= EPOCHFILETIME; /* Offset to the Epoch time */ | |||||
t /= 10; /* In microseconds */ | |||||
t = li.QuadPart; /* In 100-nanosecond intervals */ | |||||
t -= EPOCHFILETIME; /* Offset to the Epoch time */ | |||||
t /= 10; /* In microseconds */ | |||||
tv->tv_sec = (long)(t / 1000000); | tv->tv_sec = (long)(t / 1000000); | ||||
tv->tv_usec = (long)(t % 1000000); | tv->tv_usec = (long)(t % 1000000); | ||||
} | } | ||||
@@ -87,7 +87,7 @@ struct timeval { | |||||
#ifdef _WIN32 | #ifdef _WIN32 | ||||
struct timezone { | struct timezone { | ||||
int tz_minuteswest; | |||||
int tz_minuteswest; | |||||
int tz_dsttime; | int tz_dsttime; | ||||
}; | }; | ||||
#endif | #endif | ||||
@@ -181,27 +181,27 @@ static __inline void outb(unsigned char value, unsigned short int port) | |||||
static __inline int write_socket( int handle, const void *buffer, unsigned int count ) | static __inline int write_socket( int handle, const void *buffer, unsigned int count ) | ||||
{ | { | ||||
#ifdef _WIN32 | #ifdef _WIN32 | ||||
return send(handle, buffer, count, 0); | |||||
return send(handle, buffer, count, 0); | |||||
#else | #else | ||||
return write(handle, buffer, count); | |||||
return write(handle, buffer, count); | |||||
#endif | #endif | ||||
} | } | ||||
static __inline int read_socket( int handle, void *buffer, unsigned int count ) | static __inline int read_socket( int handle, void *buffer, unsigned int count ) | ||||
{ | { | ||||
#ifdef _WIN32 | #ifdef _WIN32 | ||||
return recv(handle, buffer, count, 0); | |||||
return recv(handle, buffer, count, 0); | |||||
#else | #else | ||||
return read(handle, buffer, count); | |||||
return read(handle, buffer, count); | |||||
#endif | #endif | ||||
} | } | ||||
static __inline int close_socket(int sock) | static __inline int close_socket(int sock) | ||||
{ | { | ||||
#ifdef _WIN32 | #ifdef _WIN32 | ||||
return closesocket(sock); | |||||
return closesocket(sock); | |||||
#else | #else | ||||
return close(sock); | |||||
return close(sock); | |||||
#endif | #endif | ||||
} | } | ||||
@@ -229,9 +229,9 @@ typedef struct | |||||
u32 e_shoff; /* Section header table file offset */ | u32 e_shoff; /* Section header table file offset */ | ||||
u32 e_flags; /* Processor-specific flags */ | u32 e_flags; /* Processor-specific flags */ | ||||
u16 e_ehsize; /* ELF header size in bytes */ | u16 e_ehsize; /* ELF header size in bytes */ | ||||
u16 e_phentsize; /* Program header table entry size */ | |||||
u16 e_phentsize; /* Program header table entry size */ | |||||
u16 e_phnum; /* Program header table entry count */ | u16 e_phnum; /* Program header table entry count */ | ||||
u16 e_shentsize; /* Section header table entry size */ | |||||
u16 e_shentsize; /* Section header table entry size */ | |||||
u16 e_shnum; /* Section header table entry count */ | u16 e_shnum; /* Section header table entry count */ | ||||
u16 e_shstrndx; /* Section header string table index */ | u16 e_shstrndx; /* Section header string table index */ | ||||
} Elf32_Ehdr; | } Elf32_Ehdr; | ||||
@@ -525,7 +525,6 @@ static int jim_flash_banks(Jim_Interp *interp, int argc, Jim_Obj *const *argv) | |||||
return JIM_OK; | return JIM_OK; | ||||
} | } | ||||
int tclapi_register_commands() | int tclapi_register_commands() | ||||
{ | { | ||||
register_jim("ocd_mem2array", jim_mem2array, "read memory and return as a TCL array for script processing"); | register_jim("ocd_mem2array", jim_mem2array, "read memory and return as a TCL array for script processing"); | ||||
@@ -43,10 +43,8 @@ typedef unsigned int u32; | |||||
typedef unsigned long long u64; | typedef unsigned long long u64; | ||||
#endif | #endif | ||||
typedef struct jtag_tap_s jtag_tap_t; | typedef struct jtag_tap_s jtag_tap_t; | ||||
/* DANGER!!!! here be dragons! Note that the pointer in | /* DANGER!!!! here be dragons! Note that the pointer in | ||||
* memory might be unaligned. On some CPU's, i.e. ARM7, | * memory might be unaligned. On some CPU's, i.e. ARM7, | ||||
* the 2 lsb are ignored for 32 bit access, on others | * the 2 lsb are ignored for 32 bit access, on others | ||||
@@ -59,26 +57,25 @@ typedef struct jtag_tap_s jtag_tap_t; | |||||
#define be_to_h_u16(x) ((u16)((x)[1] | (x)[0] << 8)) | #define be_to_h_u16(x) ((u16)((x)[1] | (x)[0] << 8)) | ||||
#define h_u32_to_le(buf, val) do {\ | #define h_u32_to_le(buf, val) do {\ | ||||
(buf)[3] = ((val) & 0xff000000) >> 24;\ | |||||
(buf)[2] = ((val) & 0x00ff0000) >> 16;\ | |||||
(buf)[1] = ((val) & 0x0000ff00) >> 8;\ | |||||
(buf)[0] = ((val) & 0x000000ff);\ | |||||
(buf)[3] = ((val) & 0xff000000) >> 24;\ | |||||
(buf)[2] = ((val) & 0x00ff0000) >> 16;\ | |||||
(buf)[1] = ((val) & 0x0000ff00) >> 8;\ | |||||
(buf)[0] = ((val) & 0x000000ff);\ | |||||
} while (0) | } while (0) | ||||
#define h_u32_to_be(buf, val) do {\ | #define h_u32_to_be(buf, val) do {\ | ||||
(buf)[0] = ((val) & 0xff000000) >> 24;\ | |||||
(buf)[1] = ((val) & 0x00ff0000) >> 16;\ | |||||
(buf)[2] = ((val) & 0x0000ff00) >> 8;\ | |||||
(buf)[3] = ((val) & 0x000000ff);\ | |||||
(buf)[0] = ((val) & 0xff000000) >> 24;\ | |||||
(buf)[1] = ((val) & 0x00ff0000) >> 16;\ | |||||
(buf)[2] = ((val) & 0x0000ff00) >> 8;\ | |||||
(buf)[3] = ((val) & 0x000000ff);\ | |||||
} while (0) | } while (0) | ||||
#define h_u16_to_le(buf, val) do {\ | #define h_u16_to_le(buf, val) do {\ | ||||
(buf)[1] = ((val) & 0xff00) >> 8;\ | |||||
(buf)[0] = ((val) & 0x00ff) >> 0;\ | |||||
(buf)[1] = ((val) & 0xff00) >> 8;\ | |||||
(buf)[0] = ((val) & 0x00ff) >> 0;\ | |||||
} while (0) | } while (0) | ||||
#define h_u16_to_be(buf, val) do {\ | #define h_u16_to_be(buf, val) do {\ | ||||
(buf)[0] = ((val) & 0xff00) >> 8;\ | |||||
(buf)[1] = ((val) & 0x00ff) >> 0;\ | |||||
(buf)[0] = ((val) & 0xff00) >> 8;\ | |||||
(buf)[1] = ((val) & 0x00ff) >> 0;\ | |||||
} while (0) | } while (0) | ||||
#endif /* TYPES_H */ | #endif /* TYPES_H */ |
@@ -39,7 +39,6 @@ | |||||
bitbang_interface_t *bitbang_interface; | bitbang_interface_t *bitbang_interface; | ||||
/* DANGER!!!! clock absolutely *MUST* be 0 in idle or reset won't work! | /* DANGER!!!! clock absolutely *MUST* be 0 in idle or reset won't work! | ||||
* | * | ||||
* Set this to 1 and str912 reset halt will fail. | * Set this to 1 and str912 reset halt will fail. | ||||
@@ -316,4 +315,3 @@ int bitbang_execute_queue(void) | |||||
return retval; | return retval; | ||||
} | } | ||||
@@ -34,7 +34,6 @@ | |||||
#include <stdlib.h> | #include <stdlib.h> | ||||
#include <unistd.h> | #include <unistd.h> | ||||
bitq_interface_t *bitq_interface; /* low level bit queue interface */ | bitq_interface_t *bitq_interface; /* low level bit queue interface */ | ||||
bitq_state_t bitq_in_state; /* state of input queue */ | bitq_state_t bitq_in_state; /* state of input queue */ | ||||
@@ -42,7 +41,6 @@ bitq_state_t bitq_in_state; /* state of input queue */ | |||||
u8 *bitq_in_buffer; /* buffer dynamically reallocated as needed */ | u8 *bitq_in_buffer; /* buffer dynamically reallocated as needed */ | ||||
unsigned long bitq_in_bufsize=32; /* min. buffer size */ | unsigned long bitq_in_bufsize=32; /* min. buffer size */ | ||||
/* | /* | ||||
* input queue processing does not use jtag_read_buffer() to avoid unnecessary overhead | * input queue processing does not use jtag_read_buffer() to avoid unnecessary overhead | ||||
* also the buffer for incomming data is reallocated only if necessary | * also the buffer for incomming data is reallocated only if necessary | ||||
@@ -129,8 +127,6 @@ void bitq_in_proc(void) | |||||
} | } | ||||
} | } | ||||
void bitq_io(int tms, int tdi, int tdo_req) | void bitq_io(int tms, int tdi, int tdo_req) | ||||
{ | { | ||||
bitq_interface->out(tms, tdi, tdo_req); | bitq_interface->out(tms, tdi, tdo_req); | ||||
@@ -138,7 +134,6 @@ void bitq_io(int tms, int tdi, int tdo_req) | |||||
if (bitq_interface->in_rdy()) bitq_in_proc(); | if (bitq_interface->in_rdy()) bitq_in_proc(); | ||||
} | } | ||||
void bitq_end_state(enum tap_state state) | void bitq_end_state(enum tap_state state) | ||||
{ | { | ||||
if (state==-1) return; | if (state==-1) return; | ||||
@@ -149,7 +144,6 @@ void bitq_end_state(enum tap_state state) | |||||
end_state = state; | end_state = state; | ||||
} | } | ||||
void bitq_state_move(enum tap_state new_state) | void bitq_state_move(enum tap_state new_state) | ||||
{ | { | ||||
int i=0; | int i=0; | ||||
@@ -170,7 +164,6 @@ void bitq_state_move(enum tap_state new_state) | |||||
cur_state = new_state; | cur_state = new_state; | ||||
} | } | ||||
void bitq_path_move(pathmove_command_t *cmd) | void bitq_path_move(pathmove_command_t *cmd) | ||||
{ | { | ||||
int i; | int i; | ||||
@@ -189,7 +182,6 @@ void bitq_path_move(pathmove_command_t *cmd) | |||||
end_state = cur_state; | end_state = cur_state; | ||||
} | } | ||||
void bitq_runtest(int num_cycles) | void bitq_runtest(int num_cycles) | ||||
{ | { | ||||
int i; | int i; | ||||
@@ -205,7 +197,6 @@ void bitq_runtest(int num_cycles) | |||||
if (cur_state != end_state) bitq_state_move(end_state); | if (cur_state != end_state) bitq_state_move(end_state); | ||||
} | } | ||||
void bitq_scan_field(scan_field_t *field, int pause) | void bitq_scan_field(scan_field_t *field, int pause) | ||||
{ | { | ||||
int bit_cnt; | int bit_cnt; | ||||
@@ -245,7 +236,6 @@ void bitq_scan_field(scan_field_t *field, int pause) | |||||
} | } | ||||
} | } | ||||
void bitq_scan(scan_command_t *cmd) | void bitq_scan(scan_command_t *cmd) | ||||
{ | { | ||||
int i; | int i; | ||||
@@ -258,7 +248,6 @@ void bitq_scan(scan_command_t *cmd) | |||||
bitq_scan_field(&cmd->fields[i], 1); | bitq_scan_field(&cmd->fields[i], 1); | ||||
} | } | ||||
int bitq_execute_queue(void) | int bitq_execute_queue(void) | ||||
{ | { | ||||
jtag_command_t *cmd = jtag_command_queue; /* currently processed command */ | jtag_command_t *cmd = jtag_command_queue; /* currently processed command */ | ||||
@@ -356,7 +345,6 @@ int bitq_execute_queue(void) | |||||
return bitq_in_state.status; | return bitq_in_state.status; | ||||
} | } | ||||
void bitq_cleanup(void) | void bitq_cleanup(void) | ||||
{ | { | ||||
if (bitq_in_buffer!=NULL) | if (bitq_in_buffer!=NULL) | ||||
@@ -26,7 +26,6 @@ | |||||
#include "jtag.h" | #include "jtag.h" | ||||
#include "bitbang.h" | #include "bitbang.h" | ||||
int dummy_speed(int speed); | int dummy_speed(int speed); | ||||
int dummy_register_commands(struct command_context_s *cmd_ctx); | int dummy_register_commands(struct command_context_s *cmd_ctx); | ||||
int dummy_init(void); | int dummy_init(void); | ||||
@@ -65,7 +64,6 @@ int dummy_read(void) | |||||
return 1; | return 1; | ||||
} | } | ||||
void dummy_write(int tck, int tms, int tdi) | void dummy_write(int tck, int tms, int tdi) | ||||
{ | { | ||||
} | } | ||||
@@ -73,7 +71,6 @@ void dummy_write(int tck, int tms, int tdi) | |||||
void dummy_reset(int trst, int srst) | void dummy_reset(int trst, int srst) | ||||
{ | { | ||||
} | } | ||||
int dummy_speed(int speed) | int dummy_speed(int speed) | ||||
{ | { | ||||
@@ -85,7 +82,6 @@ int dummy_register_commands(struct command_context_s *cmd_ctx) | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int dummy_init(void) | int dummy_init(void) | ||||
{ | { | ||||
bitbang_interface = &dummy_bitbang; | bitbang_interface = &dummy_bitbang; | ||||
@@ -98,8 +94,6 @@ int dummy_quit(void) | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
void dummy_led(int on) | void dummy_led(int on) | ||||
{ | { | ||||
} | } | ||||
@@ -64,7 +64,7 @@ struct timespec ep93xx_zzzz; | |||||
jtag_interface_t ep93xx_interface = | jtag_interface_t ep93xx_interface = | ||||
{ | { | ||||
.name = "ep93xx", | .name = "ep93xx", | ||||
.execute_queue = bitbang_execute_queue, | .execute_queue = bitbang_execute_queue, | ||||
.speed = ep93xx_speed, | .speed = ep93xx_speed, | ||||
@@ -126,7 +126,7 @@ void ep93xx_reset(int trst, int srst) | |||||
int ep93xx_speed(int speed) | int ep93xx_speed(int speed) | ||||
{ | { | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -438,26 +438,26 @@ int gw16012_execute_queue(void) | |||||
#if PARPORT_USE_GIVEIO == 1 | #if PARPORT_USE_GIVEIO == 1 | ||||
int gw16012_get_giveio_access() | int gw16012_get_giveio_access() | ||||
{ | { | ||||
HANDLE h; | |||||
OSVERSIONINFO version; | |||||
version.dwOSVersionInfoSize = sizeof version; | |||||
if (!GetVersionEx( &version )) { | |||||
errno = EINVAL; | |||||
return -1; | |||||
} | |||||
if (version.dwPlatformId != VER_PLATFORM_WIN32_NT) | |||||
return 0; | |||||
HANDLE h; | |||||
OSVERSIONINFO version; | |||||
h = CreateFile( "\\\\.\\giveio", GENERIC_READ, 0, NULL, OPEN_EXISTING, FILE_ATTRIBUTE_NORMAL, NULL ); | |||||
if (h == INVALID_HANDLE_VALUE) { | |||||
errno = ENODEV; | |||||
return -1; | |||||
} | |||||
version.dwOSVersionInfoSize = sizeof version; | |||||
if (!GetVersionEx( &version )) { | |||||
errno = EINVAL; | |||||
return -1; | |||||
} | |||||
if (version.dwPlatformId != VER_PLATFORM_WIN32_NT) | |||||
return 0; | |||||
CloseHandle( h ); | |||||
h = CreateFile( "\\\\.\\giveio", GENERIC_READ, 0, NULL, OPEN_EXISTING, FILE_ATTRIBUTE_NORMAL, NULL ); | |||||
if (h == INVALID_HANDLE_VALUE) { | |||||
errno = ENODEV; | |||||
return -1; | |||||
} | |||||
return 0; | |||||
CloseHandle( h ); | |||||
return 0; | |||||
} | } | ||||
#endif | #endif | ||||
@@ -250,8 +250,6 @@ jtag_interface_t *jtag = NULL; | |||||
jtag_interface_t *jtag_interface = NULL; | jtag_interface_t *jtag_interface = NULL; | ||||
int jtag_speed = 0; | int jtag_speed = 0; | ||||
/* forward declarations */ | /* forward declarations */ | ||||
void jtag_add_pathmove(int num_states, enum tap_state *path); | void jtag_add_pathmove(int num_states, enum tap_state *path); | ||||
void jtag_add_runtest(int num_cycles, enum tap_state endstate); | void jtag_add_runtest(int num_cycles, enum tap_state endstate); | ||||
@@ -279,14 +277,12 @@ int Jim_Command_drscan(Jim_Interp *interp, int argc, Jim_Obj *const *argv); | |||||
int handle_verify_ircapture_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); | int handle_verify_ircapture_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); | ||||
jtag_tap_t *jtag_AllTaps(void) | jtag_tap_t *jtag_AllTaps(void) | ||||
{ | { | ||||
return jtag_all_taps; | |||||
return jtag_all_taps; | |||||
}; | }; | ||||
int | |||||
jtag_NumTotalTaps(void) | |||||
int jtag_NumTotalTaps(void) | |||||
{ | { | ||||
jtag_tap_t *t; | jtag_tap_t *t; | ||||
int n; | int n; | ||||
@@ -300,8 +296,7 @@ jtag_NumTotalTaps(void) | |||||
return n; | return n; | ||||
} | } | ||||
int | |||||
jtag_NumEnabledTaps(void) | |||||
int jtag_NumEnabledTaps(void) | |||||
{ | { | ||||
jtag_tap_t *t; | jtag_tap_t *t; | ||||
int n; | int n; | ||||
@@ -345,8 +340,7 @@ jtag_tap_t *jtag_TapByString( const char *s ) | |||||
return t; | return t; | ||||
} | } | ||||
jtag_tap_t * | |||||
jtag_TapByJimObj( Jim_Interp *interp, Jim_Obj *o ) | |||||
jtag_tap_t * jtag_TapByJimObj( Jim_Interp *interp, Jim_Obj *o ) | |||||
{ | { | ||||
jtag_tap_t *t; | jtag_tap_t *t; | ||||
const char *cp; | const char *cp; | ||||
@@ -365,8 +359,7 @@ jtag_TapByJimObj( Jim_Interp *interp, Jim_Obj *o ) | |||||
} | } | ||||
/* returns a pointer to the n-th device in the scan chain */ | /* returns a pointer to the n-th device in the scan chain */ | ||||
jtag_tap_t * | |||||
jtag_TapByAbsPosition( int n ) | |||||
jtag_tap_t * jtag_TapByAbsPosition( int n ) | |||||
{ | { | ||||
int orig_n; | int orig_n; | ||||
jtag_tap_t *t; | jtag_tap_t *t; | ||||
@@ -377,11 +370,10 @@ jtag_TapByAbsPosition( int n ) | |||||
while( t && (n > 0)) { | while( t && (n > 0)) { | ||||
n--; | n--; | ||||
t = t->next_tap; | t = t->next_tap; | ||||
} | |||||
} | |||||
return t; | return t; | ||||
} | } | ||||
int jtag_register_event_callback(int (*callback)(enum jtag_event event, void *priv), void *priv) | int jtag_register_event_callback(int (*callback)(enum jtag_event event, void *priv), void *priv) | ||||
{ | { | ||||
jtag_event_callback_t **callbacks_p = &jtag_event_callbacks; | jtag_event_callback_t **callbacks_p = &jtag_event_callbacks; | ||||
@@ -463,7 +455,6 @@ jtag_command_t** jtag_get_last_command_p(void) | |||||
return last_comand_pointer; | return last_comand_pointer; | ||||
} | } | ||||
void* cmd_queue_alloc(size_t size) | void* cmd_queue_alloc(size_t size) | ||||
{ | { | ||||
cmd_queue_page_t **p_page = &cmd_queue_pages; | cmd_queue_page_t **p_page = &cmd_queue_pages; | ||||
@@ -491,17 +482,16 @@ void* cmd_queue_alloc(size_t size) | |||||
* | * | ||||
*/ | */ | ||||
union worse_case_align { | union worse_case_align { | ||||
int i; | |||||
long l; | |||||
float f; | |||||
void *v; | |||||
int i; | |||||
long l; | |||||
float f; | |||||
void *v; | |||||
}; | }; | ||||
#define ALIGN_SIZE (sizeof(union worse_case_align)) | #define ALIGN_SIZE (sizeof(union worse_case_align)) | ||||
// The alignment process. | |||||
/* The alignment process. */ | |||||
size = (size + ALIGN_SIZE -1) & (~(ALIGN_SIZE-1)); | size = (size + ALIGN_SIZE -1) & (~(ALIGN_SIZE-1)); | ||||
// Done... | |||||
/* Done... */ | |||||
if (*p_page) | if (*p_page) | ||||
{ | { | ||||
@@ -652,7 +642,6 @@ int MINIDRIVER(interface_jtag_add_ir_scan)(int num_fields, scan_field_t *fields, | |||||
(*last_cmd)->cmd.scan->fields[nth_tap].out_value = buf_set_ones(cmd_queue_alloc(CEIL(scan_size, 8)), scan_size); | (*last_cmd)->cmd.scan->fields[nth_tap].out_value = buf_set_ones(cmd_queue_alloc(CEIL(scan_size, 8)), scan_size); | ||||
(*last_cmd)->cmd.scan->fields[nth_tap].out_mask = NULL; | (*last_cmd)->cmd.scan->fields[nth_tap].out_mask = NULL; | ||||
tap->bypass = 1; | tap->bypass = 1; | ||||
} | } | ||||
/* update device information */ | /* update device information */ | ||||
@@ -1023,7 +1012,6 @@ void jtag_add_pathmove(int num_states, enum tap_state *path) | |||||
jtag_prelude1(); | jtag_prelude1(); | ||||
retval=interface_jtag_add_pathmove(num_states, path); | retval=interface_jtag_add_pathmove(num_states, path); | ||||
cmd_queue_cur_state = path[num_states - 1]; | cmd_queue_cur_state = path[num_states - 1]; | ||||
if (retval!=ERROR_OK) | if (retval!=ERROR_OK) | ||||
@@ -1805,8 +1793,7 @@ jtag_tap_configure_cmd( Jim_GetOptInfo *goi, | |||||
return JIM_OK; | return JIM_OK; | ||||
} | } | ||||
static int | |||||
jim_newtap_cmd( Jim_GetOptInfo *goi ) | |||||
static int jim_newtap_cmd( Jim_GetOptInfo *goi ) | |||||
{ | { | ||||
jtag_tap_t *pTap; | jtag_tap_t *pTap; | ||||
jtag_tap_t **ppTap; | jtag_tap_t **ppTap; | ||||
@@ -1824,24 +1811,23 @@ jim_newtap_cmd( Jim_GetOptInfo *goi ) | |||||
#define NTAP_OPT_IRCAPTURE 2 | #define NTAP_OPT_IRCAPTURE 2 | ||||
{ .name = "-ircapture" , .value = NTAP_OPT_IRCAPTURE }, | { .name = "-ircapture" , .value = NTAP_OPT_IRCAPTURE }, | ||||
#define NTAP_OPT_ENABLED 3 | #define NTAP_OPT_ENABLED 3 | ||||
{ .name = "-enable" , .value = NTAP_OPT_ENABLED }, | |||||
{ .name = "-enable" , .value = NTAP_OPT_ENABLED }, | |||||
#define NTAP_OPT_DISABLED 4 | #define NTAP_OPT_DISABLED 4 | ||||
{ .name = "-disable" , .value = NTAP_OPT_DISABLED }, | |||||
{ .name = "-disable" , .value = NTAP_OPT_DISABLED }, | |||||
#define NTAP_OPT_EXPECTED_ID 5 | #define NTAP_OPT_EXPECTED_ID 5 | ||||
{ .name = "-expected-id" , .value = NTAP_OPT_EXPECTED_ID }, | |||||
{ .name = NULL , .value = -1 }, | |||||
{ .name = "-expected-id" , .value = NTAP_OPT_EXPECTED_ID }, | |||||
{ .name = NULL , .value = -1 }, | |||||
}; | }; | ||||
pTap = malloc( sizeof(jtag_tap_t) ); | pTap = malloc( sizeof(jtag_tap_t) ); | ||||
memset( pTap, 0, sizeof(*pTap) ); | memset( pTap, 0, sizeof(*pTap) ); | ||||
if( !pTap ){ | if( !pTap ){ | ||||
Jim_SetResult_sprintf( goi->interp, "no memory"); | Jim_SetResult_sprintf( goi->interp, "no memory"); | ||||
return JIM_ERR; | return JIM_ERR; | ||||
} | } | ||||
// | |||||
// we expect CHIP + TAP + OPTIONS | |||||
// | |||||
/* | |||||
* we expect CHIP + TAP + OPTIONS | |||||
* */ | |||||
if( goi->argc < 3 ){ | if( goi->argc < 3 ){ | ||||
Jim_SetResult_sprintf(goi->interp, "Missing CHIP TAP OPTIONS ...."); | Jim_SetResult_sprintf(goi->interp, "Missing CHIP TAP OPTIONS ...."); | ||||
return JIM_ERR; | return JIM_ERR; | ||||
@@ -1852,7 +1838,7 @@ jim_newtap_cmd( Jim_GetOptInfo *goi ) | |||||
Jim_GetOpt_String( goi, &cp, NULL ); | Jim_GetOpt_String( goi, &cp, NULL ); | ||||
pTap->tapname = strdup(cp); | pTap->tapname = strdup(cp); | ||||
// name + dot + name + null | |||||
/* name + dot + name + null */ | |||||
x = strlen(pTap->chip) + 1 + strlen(pTap->tapname) + 1; | x = strlen(pTap->chip) + 1 + strlen(pTap->tapname) + 1; | ||||
cp = malloc( x ); | cp = malloc( x ); | ||||
sprintf( cp, "%s.%s", pTap->chip, pTap->tapname ); | sprintf( cp, "%s.%s", pTap->chip, pTap->tapname ); | ||||
@@ -1861,16 +1847,15 @@ jim_newtap_cmd( Jim_GetOptInfo *goi ) | |||||
LOG_DEBUG("Creating New Tap, Chip: %s, Tap: %s, Dotted: %s, %d params", | LOG_DEBUG("Creating New Tap, Chip: %s, Tap: %s, Dotted: %s, %d params", | ||||
pTap->chip, pTap->tapname, pTap->dotted_name, goi->argc); | pTap->chip, pTap->tapname, pTap->dotted_name, goi->argc); | ||||
// default is enabled | |||||
/* default is enabled */ | |||||
pTap->enabled = 1; | pTap->enabled = 1; | ||||
// deal with options | |||||
/* deal with options */ | |||||
#define NTREQ_IRLEN 1 | #define NTREQ_IRLEN 1 | ||||
#define NTREQ_IRCAPTURE 2 | #define NTREQ_IRCAPTURE 2 | ||||
#define NTREQ_IRMASK 4 | #define NTREQ_IRMASK 4 | ||||
// clear them as we find them | |||||
/* clear them as we find them */ | |||||
reqbits = (NTREQ_IRLEN | NTREQ_IRCAPTURE | NTREQ_IRMASK); | reqbits = (NTREQ_IRLEN | NTREQ_IRCAPTURE | NTREQ_IRMASK); | ||||
while( goi->argc ){ | while( goi->argc ){ | ||||
@@ -1921,7 +1906,7 @@ jim_newtap_cmd( Jim_GetOptInfo *goi ) | |||||
return e; | return e; | ||||
} | } | ||||
if( (w < 0) || (w > 0xffff) ){ | if( (w < 0) || (w > 0xffff) ){ | ||||
// wacky value | |||||
/* wacky value */ | |||||
Jim_SetResult_sprintf( goi->interp, "option: %s - wacky value: %d (0x%x)", | Jim_SetResult_sprintf( goi->interp, "option: %s - wacky value: %d (0x%x)", | ||||
n->name, (int)(w), (int)(w)); | n->name, (int)(w), (int)(w)); | ||||
return JIM_ERR; | return JIM_ERR; | ||||
@@ -1940,17 +1925,17 @@ jim_newtap_cmd( Jim_GetOptInfo *goi ) | |||||
reqbits &= (~(NTREQ_IRCAPTURE)); | reqbits &= (~(NTREQ_IRCAPTURE)); | ||||
break; | break; | ||||
} | } | ||||
} // switch(n->value) | |||||
} // while( goi->argc ) | |||||
} /* switch(n->value) */ | |||||
} /* while( goi->argc ) */ | |||||
// Did we get all the options? | |||||
/* Did we get all the options? */ | |||||
if( reqbits ){ | if( reqbits ){ | ||||
// no | // no | ||||
Jim_SetResult_sprintf( goi->interp, | Jim_SetResult_sprintf( goi->interp, | ||||
"newtap: %s missing required parameters", | "newtap: %s missing required parameters", | ||||
pTap->dotted_name); | pTap->dotted_name); | ||||
// fixme: Tell user what is missing :-( | |||||
// no memory leaks pelase | |||||
/* TODO: Tell user what is missing :-( */ | |||||
/* no memory leaks pelase */ | |||||
free(((void *)(pTap->expected_ids))); | free(((void *)(pTap->expected_ids))); | ||||
free(((void *)(pTap->chip))); | free(((void *)(pTap->chip))); | ||||
free(((void *)(pTap->tapname))); | free(((void *)(pTap->tapname))); | ||||
@@ -1976,7 +1961,6 @@ jim_newtap_cmd( Jim_GetOptInfo *goi ) | |||||
pTap->bypass = 1; | pTap->bypass = 1; | ||||
jtag_register_event_callback(jtag_reset_callback, pTap ); | jtag_register_event_callback(jtag_reset_callback, pTap ); | ||||
ppTap = &(jtag_all_taps); | ppTap = &(jtag_all_taps); | ||||
@@ -1989,19 +1973,16 @@ jim_newtap_cmd( Jim_GetOptInfo *goi ) | |||||
pTap->abs_chain_position = n_taps++; | pTap->abs_chain_position = n_taps++; | ||||
} | } | ||||
LOG_DEBUG( "Created Tap: %s @ abs position %d, irlen %d, capture: 0x%x mask: 0x%x", | LOG_DEBUG( "Created Tap: %s @ abs position %d, irlen %d, capture: 0x%x mask: 0x%x", | ||||
(*ppTap)->dotted_name, | |||||
(*ppTap)->abs_chain_position, | |||||
(*ppTap)->ir_length, | |||||
(*ppTap)->ir_capture_value, | |||||
(*ppTap)->ir_capture_mask ); | |||||
(*ppTap)->dotted_name, | |||||
(*ppTap)->abs_chain_position, | |||||
(*ppTap)->ir_length, | |||||
(*ppTap)->ir_capture_value, | |||||
(*ppTap)->ir_capture_mask ); | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
static int | |||||
jim_jtag_command( Jim_Interp *interp, int argc, Jim_Obj *const *argv ) | |||||
static int jim_jtag_command( Jim_Interp *interp, int argc, Jim_Obj *const *argv ) | |||||
{ | { | ||||
Jim_GetOptInfo goi; | Jim_GetOptInfo goi; | ||||
int e; | int e; | ||||
@@ -2034,7 +2015,7 @@ jim_jtag_command( Jim_Interp *interp, int argc, Jim_Obj *const *argv ) | |||||
}; | }; | ||||
context = Jim_GetAssocData(interp, "context"); | context = Jim_GetAssocData(interp, "context"); | ||||
// go past the command | |||||
/* go past the command */ | |||||
Jim_GetOpt_Setup( &goi, interp, argc-1, argv+1 ); | Jim_GetOpt_Setup( &goi, interp, argc-1, argv+1 ); | ||||
e = Jim_GetOpt_Nvp( &goi, jtag_cmds, &n ); | e = Jim_GetOpt_Nvp( &goi, jtag_cmds, &n ); | ||||
@@ -2045,9 +2026,9 @@ jim_jtag_command( Jim_Interp *interp, int argc, Jim_Obj *const *argv ) | |||||
Jim_SetEmptyResult( goi.interp ); | Jim_SetEmptyResult( goi.interp ); | ||||
switch( n->value ){ | switch( n->value ){ | ||||
case JTAG_CMD_INTERFACE: | case JTAG_CMD_INTERFACE: | ||||
// return the name of the interface | |||||
// TCL code might need to know the exact type... | |||||
// FUTURE: we allow this as a means to "set" the interface. | |||||
/* return the name of the interface */ | |||||
/* TCL code might need to know the exact type... */ | |||||
/* FUTURE: we allow this as a means to "set" the interface. */ | |||||
if( goi.argc != 0 ){ | if( goi.argc != 0 ){ | ||||
Jim_WrongNumArgs( goi.interp, 1, goi.argv-1, "(no params)"); | Jim_WrongNumArgs( goi.interp, 1, goi.argv-1, "(no params)"); | ||||
return JIM_ERR; | return JIM_ERR; | ||||
@@ -2142,7 +2123,6 @@ jim_jtag_command( Jim_Interp *interp, int argc, Jim_Obj *const *argv ) | |||||
} | } | ||||
} | } | ||||
return JIM_ERR; | return JIM_ERR; | ||||
} | } | ||||
@@ -2203,8 +2183,6 @@ int jtag_interface_init(struct command_context_s *cmd_ctx) | |||||
if (jtag_interface->init() != ERROR_OK) | if (jtag_interface->init() != ERROR_OK) | ||||
return ERROR_JTAG_INIT_FAILED; | return ERROR_JTAG_INIT_FAILED; | ||||
jtag = jtag_interface; | jtag = jtag_interface; | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -2216,7 +2194,6 @@ static int jtag_init_inner(struct command_context_s *cmd_ctx) | |||||
LOG_DEBUG("Init JTAG chain"); | LOG_DEBUG("Init JTAG chain"); | ||||
tap = jtag_NextEnabledTap(NULL); | tap = jtag_NextEnabledTap(NULL); | ||||
if( tap == NULL ){ | if( tap == NULL ){ | ||||
LOG_ERROR("There are no enabled taps?"); | LOG_ERROR("There are no enabled taps?"); | ||||
@@ -2390,14 +2367,14 @@ int handle_jtag_device_command(struct command_context_s *cmd_ctx, char *cmd, cha | |||||
int e; | int e; | ||||
char buf[1024]; | char buf[1024]; | ||||
Jim_Obj *newargs[ 10 ]; | Jim_Obj *newargs[ 10 ]; | ||||
// | |||||
// CONVERT SYNTAX | |||||
// | |||||
// argv[-1] = command | |||||
// argv[ 0] = ir length | |||||
// argv[ 1] = ir capture | |||||
// argv[ 2] = ir mask | |||||
// argv[ 3] = not actually used by anything but in the docs | |||||
/* | |||||
* CONVERT SYNTAX | |||||
* argv[-1] = command | |||||
* argv[ 0] = ir length | |||||
* argv[ 1] = ir capture | |||||
* argv[ 2] = ir mask | |||||
* argv[ 3] = not actually used by anything but in the docs | |||||
*/ | |||||
if( argc < 4 ){ | if( argc < 4 ){ | ||||
command_print( cmd_ctx, "OLD DEPRECATED SYNTAX: Please use the NEW syntax"); | command_print( cmd_ctx, "OLD DEPRECATED SYNTAX: Please use the NEW syntax"); | ||||
@@ -2413,8 +2390,6 @@ int handle_jtag_device_command(struct command_context_s *cmd_ctx, char *cmd, cha | |||||
command_print( cmd_ctx, "jtag newtap stm32 boundry ....., and the tap: \"stm32.boundery\""); | command_print( cmd_ctx, "jtag newtap stm32 boundry ....., and the tap: \"stm32.boundery\""); | ||||
command_print( cmd_ctx, "And then refer to the taps by the dotted name."); | command_print( cmd_ctx, "And then refer to the taps by the dotted name."); | ||||
newargs[0] = Jim_NewStringObj( interp, "jtag", -1 ); | newargs[0] = Jim_NewStringObj( interp, "jtag", -1 ); | ||||
newargs[1] = Jim_NewStringObj( interp, "newtap", -1 ); | newargs[1] = Jim_NewStringObj( interp, "newtap", -1 ); | ||||
sprintf( buf, "chip%d", jtag_NumTotalTaps() ); | sprintf( buf, "chip%d", jtag_NumTotalTaps() ); | ||||
@@ -2441,8 +2416,6 @@ int handle_jtag_device_command(struct command_context_s *cmd_ctx, char *cmd, cha | |||||
Jim_GetString( newargs[8], NULL ), | Jim_GetString( newargs[8], NULL ), | ||||
Jim_GetString( newargs[9], NULL ) ); | Jim_GetString( newargs[9], NULL ) ); | ||||
e = jim_jtag_command( interp, 10, newargs ); | e = jim_jtag_command( interp, 10, newargs ); | ||||
if( e != JIM_OK ){ | if( e != JIM_OK ){ | ||||
command_print( cmd_ctx, "%s", Jim_GetString( Jim_GetResult(interp), NULL ) ); | command_print( cmd_ctx, "%s", Jim_GetString( Jim_GetResult(interp), NULL ) ); | ||||
@@ -2450,7 +2423,6 @@ int handle_jtag_device_command(struct command_context_s *cmd_ctx, char *cmd, cha | |||||
return e; | return e; | ||||
} | } | ||||
int handle_scan_chain_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) | int handle_scan_chain_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) | ||||
{ | { | ||||
jtag_tap_t *tap; | jtag_tap_t *tap; | ||||
@@ -2835,7 +2807,6 @@ int Jim_Command_drscan(Jim_Interp *interp, int argc, Jim_Obj *const *args) | |||||
Jim_GetLong(interp, args[i], &bits); | Jim_GetLong(interp, args[i], &bits); | ||||
str = Jim_GetString(args[i+1], &len); | str = Jim_GetString(args[i+1], &len); | ||||
fields[field_count].tap = tap; | fields[field_count].tap = tap; | ||||
fields[field_count].num_bits = bits; | fields[field_count].num_bits = bits; | ||||
fields[field_count].out_value = malloc(CEIL(bits, 8)); | fields[field_count].out_value = malloc(CEIL(bits, 8)); | ||||
@@ -2904,7 +2875,6 @@ int handle_verify_ircapture_command(struct command_context_s *cmd_ctx, char *cmd | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int jtag_power_dropout(int *dropout) | int jtag_power_dropout(int *dropout) | ||||
{ | { | ||||
return jtag->power_dropout(dropout); | return jtag->power_dropout(dropout); | ||||
@@ -2945,4 +2915,3 @@ void jtag_tap_handle_event( jtag_tap_t * tap, enum jtag_tap_event e) | |||||
Jim_Nvp_value2name_simple( nvp_jtag_tap_event, e)->name); | Jim_Nvp_value2name_simple( nvp_jtag_tap_event, e)->name); | ||||
} | } | ||||
} | } | ||||
@@ -78,11 +78,10 @@ typedef struct scan_field_s | |||||
/* in_check_value/mask, in_handler_error_handler, in_handler_priv can be used by the in handler, otherwise they contain garbage */ | /* in_check_value/mask, in_handler_error_handler, in_handler_priv can be used by the in handler, otherwise they contain garbage */ | ||||
u8 *in_check_value; /* used to validate scan results */ | u8 *in_check_value; /* used to validate scan results */ | ||||
u8 *in_check_mask; /* check specified bits against check_value */ | u8 *in_check_mask; /* check specified bits against check_value */ | ||||
in_handler_t in_handler; /* process received buffer using this handler */ | |||||
in_handler_t in_handler;/* process received buffer using this handler */ | |||||
void *in_handler_priv; /* additional information for the in_handler */ | void *in_handler_priv; /* additional information for the in_handler */ | ||||
} scan_field_t; | } scan_field_t; | ||||
enum scan_type | enum scan_type | ||||
{ | { | ||||
/* IN: from device to host, OUT: from host to device */ | /* IN: from device to host, OUT: from host to device */ | ||||
@@ -158,12 +157,12 @@ typedef struct jtag_command_s | |||||
extern jtag_command_t *jtag_command_queue; | extern jtag_command_t *jtag_command_queue; | ||||
// forward declaration | |||||
/* forward declaration */ | |||||
typedef struct jtag_tap_event_action_s jtag_tap_event_action_t; | typedef struct jtag_tap_event_action_s jtag_tap_event_action_t; | ||||
// this is really: typedef jtag_tap_t | |||||
// But - the typedef is done in "types.h" | |||||
// due to "forward decloration reasons" | |||||
/* this is really: typedef jtag_tap_t */ | |||||
/* But - the typedef is done in "types.h" */ | |||||
/* due to "forward decloration reasons" */ | |||||
struct jtag_tap_s | struct jtag_tap_s | ||||
{ | { | ||||
const char *chip; | const char *chip; | ||||
@@ -188,22 +187,21 @@ struct jtag_tap_s | |||||
}; | }; | ||||
extern jtag_tap_t *jtag_AllTaps(void); | extern jtag_tap_t *jtag_AllTaps(void); | ||||
extern jtag_tap_t *jtag_TapByPosition(int n); | extern jtag_tap_t *jtag_TapByPosition(int n); | ||||
extern jtag_tap_t *jtag_TapByPosition( int n ); | |||||
extern jtag_tap_t *jtag_TapByString( const char *dotted_name ); | |||||
extern jtag_tap_t *jtag_TapByJimObj( Jim_Interp *interp, Jim_Obj *obj ); | |||||
extern jtag_tap_t *jtag_TapByAbsPosition( int abs_position ); | |||||
extern int jtag_NumEnabledTaps(void); | |||||
extern int jtag_NumTotalTaps(void); | |||||
extern jtag_tap_t *jtag_TapByPosition(int n); | |||||
extern jtag_tap_t *jtag_TapByString(const char *dotted_name); | |||||
extern jtag_tap_t *jtag_TapByJimObj(Jim_Interp *interp, Jim_Obj *obj); | |||||
extern jtag_tap_t *jtag_TapByAbsPosition(int abs_position); | |||||
extern int jtag_NumEnabledTaps(void); | |||||
extern int jtag_NumTotalTaps(void); | |||||
static __inline__ jtag_tap_t * | static __inline__ jtag_tap_t * | ||||
jtag_NextEnabledTap( jtag_tap_t *p ) | jtag_NextEnabledTap( jtag_tap_t *p ) | ||||
{ | { | ||||
if( p == NULL ){ | if( p == NULL ){ | ||||
// start at the head of list | |||||
/* start at the head of list */ | |||||
p = jtag_AllTaps(); | p = jtag_AllTaps(); | ||||
} else { | } else { | ||||
// start *after* this one | |||||
/* start *after* this one */ | |||||
p = p->next_tap; | p = p->next_tap; | ||||
} | } | ||||
while( p ){ | while( p ){ | ||||
@@ -216,9 +214,6 @@ jtag_NextEnabledTap( jtag_tap_t *p ) | |||||
return p; | return p; | ||||
} | } | ||||
enum reset_line_mode | enum reset_line_mode | ||||
{ | { | ||||
LINE_OPEN_DRAIN = 0x0, | LINE_OPEN_DRAIN = 0x0, | ||||
@@ -440,8 +435,6 @@ extern int interface_jtag_add_end_state(enum tap_state endstate); | |||||
extern void jtag_add_sleep(u32 us); | extern void jtag_add_sleep(u32 us); | ||||
extern int interface_jtag_add_sleep(u32 us); | extern int interface_jtag_add_sleep(u32 us); | ||||
/* | /* | ||||
* For software FIFO implementations, the queued commands can be executed | * For software FIFO implementations, the queued commands can be executed | ||||
* during this call or earlier. A sw queue might decide to push out | * during this call or earlier. A sw queue might decide to push out | ||||
@@ -468,7 +461,6 @@ extern int interface_jtag_execute_queue(void); | |||||
extern int jtag_power_dropout(int *dropout); | extern int jtag_power_dropout(int *dropout); | ||||
extern int jtag_srst_asserted(int *srst_asserted); | extern int jtag_srst_asserted(int *srst_asserted); | ||||
/* JTAG support functions */ | /* JTAG support functions */ | ||||
extern void jtag_set_check_value(scan_field_t *field, u8 *value, u8 *mask, error_handler_t *in_error_handler); | extern void jtag_set_check_value(scan_field_t *field, u8 *value, u8 *mask, error_handler_t *in_error_handler); | ||||
extern enum scan_type jtag_scan_type(scan_command_t *cmd); | extern enum scan_type jtag_scan_type(scan_command_t *cmd); | ||||
@@ -494,8 +486,6 @@ void jtag_tap_handle_event( jtag_tap_t * tap, enum jtag_tap_event e); | |||||
#define ERROR_JTAG_QUEUE_FAILED (-104) | #define ERROR_JTAG_QUEUE_FAILED (-104) | ||||
#define ERROR_JTAG_DEVICE_ERROR (-107) | #define ERROR_JTAG_DEVICE_ERROR (-107) | ||||
/* this allows JTAG devices to implement the entire jtag_xxx() layer in hw/sw */ | /* this allows JTAG devices to implement the entire jtag_xxx() layer in hw/sw */ | ||||
#ifdef HAVE_JTAG_MINIDRIVER_H | #ifdef HAVE_JTAG_MINIDRIVER_H | ||||
/* Here a #define MINIDRIVER() and an inline version of hw fifo interface_jtag_add_dr_out can be defined */ | /* Here a #define MINIDRIVER() and an inline version of hw fifo interface_jtag_add_dr_out can be defined */ | ||||
@@ -527,9 +517,6 @@ extern void interface_jtag_add_dr_out(jtag_tap_t *tap, | |||||
enum tap_state end_state); | enum tap_state end_state); | ||||
#endif | #endif | ||||
static __inline__ void jtag_add_dr_out(jtag_tap_t *tap, | static __inline__ void jtag_add_dr_out(jtag_tap_t *tap, | ||||
int num_fields, | int num_fields, | ||||
const int *num_bits, | const int *num_bits, | ||||
@@ -542,5 +529,4 @@ static __inline__ void jtag_add_dr_out(jtag_tap_t *tap, | |||||
interface_jtag_add_dr_out(tap, num_fields, num_bits, value, cmd_queue_end_state); | interface_jtag_add_dr_out(tap, num_fields, num_bits, value, cmd_queue_end_state); | ||||
} | } | ||||
#endif /* JTAG_H */ | #endif /* JTAG_H */ |
@@ -49,7 +49,6 @@ | |||||
#error "BUG: either FTD2XX and LIBFTDI has to be used" | #error "BUG: either FTD2XX and LIBFTDI has to be used" | ||||
#endif | #endif | ||||
int presto_jtag_speed(int speed); | int presto_jtag_speed(int speed); | ||||
int presto_jtag_khz(int khz, int *jtag_speed); | int presto_jtag_khz(int khz, int *jtag_speed); | ||||
int presto_jtag_speed_div(int speed, int *khz); | int presto_jtag_speed_div(int speed, int *khz); | ||||
@@ -69,7 +68,6 @@ jtag_interface_t presto_interface = | |||||
.quit = presto_jtag_quit, | .quit = presto_jtag_quit, | ||||
}; | }; | ||||
int presto_bitq_out(int tms, int tdi, int tdo_req); | int presto_bitq_out(int tms, int tdi, int tdo_req); | ||||
int presto_bitq_flush(void); | int presto_bitq_flush(void); | ||||
int presto_bitq_sleep(unsigned long us); | int presto_bitq_sleep(unsigned long us); | ||||
@@ -87,10 +85,8 @@ bitq_interface_t presto_bitq = | |||||
.in = presto_bitq_in, | .in = presto_bitq_in, | ||||
}; | }; | ||||
/* -------------------------------------------------------------------------- */ | /* -------------------------------------------------------------------------- */ | ||||
#define FT_DEVICE_NAME_LEN 64 | #define FT_DEVICE_NAME_LEN 64 | ||||
#define FT_DEVICE_SERNUM_LEN 64 | #define FT_DEVICE_SERNUM_LEN 64 | ||||
@@ -486,7 +482,6 @@ int presto_close(void) | |||||
return result; | return result; | ||||
} | } | ||||
int presto_flush(void) | int presto_flush(void) | ||||
{ | { | ||||
if (presto->buff_out_pos == 0) | if (presto->buff_out_pos == 0) | ||||
@@ -530,7 +525,6 @@ int presto_flush(void) | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int presto_sendbyte(int data) | int presto_sendbyte(int data) | ||||
{ | { | ||||
if (data == EOF) return presto_flush(); | if (data == EOF) return presto_flush(); | ||||
@@ -555,7 +549,6 @@ int presto_sendbyte(int data) | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int presto_getbyte(void) | int presto_getbyte(void) | ||||
{ | { | ||||
if (presto->buff_in_pos < presto->buff_in_len) | if (presto->buff_in_pos < presto->buff_in_len) | ||||
@@ -573,10 +566,8 @@ int presto_getbyte(void) | |||||
return -1; | return -1; | ||||
} | } | ||||
/* -------------------------------------------------------------------------- */ | /* -------------------------------------------------------------------------- */ | ||||
int presto_tdi_flush(void) | int presto_tdi_flush(void) | ||||
{ | { | ||||
if (presto->jtag_tdi_count == 0) | if (presto->jtag_tdi_count == 0) | ||||
@@ -596,7 +587,6 @@ int presto_tdi_flush(void) | |||||
return 0; | return 0; | ||||
} | } | ||||
int presto_tck_idle(void) | int presto_tck_idle(void) | ||||
{ | { | ||||
if (presto->jtag_tck == 1) | if (presto->jtag_tck == 1) | ||||
@@ -608,10 +598,8 @@ int presto_tck_idle(void) | |||||
return 0; | return 0; | ||||
} | } | ||||
/* -------------------------------------------------------------------------- */ | /* -------------------------------------------------------------------------- */ | ||||
int presto_bitq_out(int tms, int tdi, int tdo_req) | int presto_bitq_out(int tms, int tdi, int tdo_req) | ||||
{ | { | ||||
int i; | int i; | ||||
@@ -658,7 +646,6 @@ int presto_bitq_out(int tms, int tdi, int tdo_req) | |||||
return 0; | return 0; | ||||
} | } | ||||
int presto_bitq_flush(void) | int presto_bitq_flush(void) | ||||
{ | { | ||||
presto_tdi_flush(); | presto_tdi_flush(); | ||||
@@ -669,7 +656,6 @@ int presto_bitq_flush(void) | |||||
return presto_flush(); | return presto_flush(); | ||||
} | } | ||||
int presto_bitq_in_rdy(void) | int presto_bitq_in_rdy(void) | ||||
{ | { | ||||
if (presto->buff_in_pos>=presto->buff_in_len) | if (presto->buff_in_pos>=presto->buff_in_len) | ||||
@@ -677,7 +663,6 @@ int presto_bitq_in_rdy(void) | |||||
return presto->buff_in_len-presto->buff_in_pos; | return presto->buff_in_len-presto->buff_in_pos; | ||||
} | } | ||||
int presto_bitq_in(void) | int presto_bitq_in(void) | ||||
{ | { | ||||
if (presto->buff_in_pos>=presto->buff_in_len) | if (presto->buff_in_pos>=presto->buff_in_len) | ||||
@@ -686,7 +671,6 @@ int presto_bitq_in(void) | |||||
return 0; | return 0; | ||||
} | } | ||||
int presto_bitq_sleep(unsigned long us) | int presto_bitq_sleep(unsigned long us) | ||||
{ | { | ||||
long waits; | long waits; | ||||
@@ -708,7 +692,6 @@ int presto_bitq_sleep(unsigned long us) | |||||
return 0; | return 0; | ||||
} | } | ||||
int presto_bitq_reset(int trst, int srst) | int presto_bitq_reset(int trst, int srst) | ||||
{ | { | ||||
presto_tdi_flush(); | presto_tdi_flush(); | ||||
@@ -724,10 +707,8 @@ int presto_bitq_reset(int trst, int srst) | |||||
return 0; | return 0; | ||||
} | } | ||||
/* -------------------------------------------------------------------------- */ | /* -------------------------------------------------------------------------- */ | ||||
int presto_jtag_khz(int khz, int *jtag_speed) | int presto_jtag_khz(int khz, int *jtag_speed) | ||||
{ | { | ||||
if (khz < 0) | if (khz < 0) | ||||
@@ -742,7 +723,6 @@ int presto_jtag_khz(int khz, int *jtag_speed) | |||||
return 0; | return 0; | ||||
} | } | ||||
int presto_jtag_speed_div(int speed, int *khz) | int presto_jtag_speed_div(int speed, int *khz) | ||||
{ | { | ||||
if ((speed < 0) || (speed > 1000)) | if ((speed < 0) || (speed > 1000)) | ||||
@@ -757,7 +737,6 @@ int presto_jtag_speed_div(int speed, int *khz) | |||||
return 0; | return 0; | ||||
} | } | ||||
int presto_jtag_speed(int speed) | int presto_jtag_speed(int speed) | ||||
{ | { | ||||
int khz; | int khz; | ||||
@@ -777,7 +756,6 @@ int presto_jtag_speed(int speed) | |||||
return 0; | return 0; | ||||
} | } | ||||
char *presto_serial; | char *presto_serial; | ||||
int presto_handle_serial_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) | int presto_handle_serial_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) | ||||
@@ -796,7 +774,6 @@ int presto_handle_serial_command(struct command_context_s *cmd_ctx, char *cmd, c | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int presto_jtag_register_commands(struct command_context_s *cmd_ctx) | int presto_jtag_register_commands(struct command_context_s *cmd_ctx) | ||||
{ | { | ||||
register_command(cmd_ctx, NULL, "presto_serial", presto_handle_serial_command, | register_command(cmd_ctx, NULL, "presto_serial", presto_handle_serial_command, | ||||
@@ -804,7 +781,6 @@ int presto_jtag_register_commands(struct command_context_s *cmd_ctx) | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int presto_jtag_init(void) | int presto_jtag_init(void) | ||||
{ | { | ||||
if (presto_open(presto_serial) != ERROR_OK) | if (presto_open(presto_serial) != ERROR_OK) | ||||
@@ -825,7 +801,6 @@ int presto_jtag_init(void) | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int presto_jtag_quit(void) | int presto_jtag_quit(void) | ||||
{ | { | ||||
bitq_cleanup(); | bitq_cleanup(); | ||||
@@ -47,10 +47,10 @@ | |||||
#define PID 0x0c63 | #define PID 0x0c63 | ||||
/* Pins at usbprog */ | /* Pins at usbprog */ | ||||
#define TDO_BIT 0 | |||||
#define TDI_BIT 3 | |||||
#define TCK_BIT 2 | |||||
#define TMS_BIT 1 | |||||
#define TDO_BIT 0 | |||||
#define TDI_BIT 3 | |||||
#define TCK_BIT 2 | |||||
#define TMS_BIT 1 | |||||
int usbprog_execute_queue(void); | int usbprog_execute_queue(void); | ||||
int usbprog_speed(int speed); | int usbprog_speed(int speed); | ||||
@@ -74,17 +74,17 @@ jtag_interface_t usbprog_interface = | |||||
.quit = usbprog_quit | .quit = usbprog_quit | ||||
}; | }; | ||||
#define UNKOWN_COMMAND 0x00 | |||||
#define PORT_DIRECTION 0x01 | |||||
#define PORT_SET 0x02 | |||||
#define PORT_GET 0x03 | |||||
#define PORT_SETBIT 0x04 | |||||
#define PORT_GETBIT 0x05 | |||||
#define WRITE_TDI 0x06 | |||||
#define READ_TDO 0x07 | |||||
#define WRITE_AND_READ 0x08 | |||||
#define WRITE_TMS 0x09 | |||||
#define WRITE_TMS_CHAIN 0x0A | |||||
#define UNKOWN_COMMAND 0x00 | |||||
#define PORT_DIRECTION 0x01 | |||||
#define PORT_SET 0x02 | |||||
#define PORT_GET 0x03 | |||||
#define PORT_SETBIT 0x04 | |||||
#define PORT_GETBIT 0x05 | |||||
#define WRITE_TDI 0x06 | |||||
#define READ_TDO 0x07 | |||||
#define WRITE_AND_READ 0x08 | |||||
#define WRITE_TMS 0x09 | |||||
#define WRITE_TMS_CHAIN 0x0A | |||||
struct usbprog_jtag | struct usbprog_jtag | ||||
{ | { | ||||
@@ -71,7 +71,7 @@ void print_version(void) | |||||
/* DANGER!!! make sure that the line below does not appear in a patch, do not remove */ | /* DANGER!!! make sure that the line below does not appear in a patch, do not remove */ | ||||
/* DANGER!!! make sure that the line below does not appear in a patch, do not remove */ | /* DANGER!!! make sure that the line below does not appear in a patch, do not remove */ | ||||
/* DANGER!!! make sure that the line below does not appear in a patch, do not remove */ | /* DANGER!!! make sure that the line below does not appear in a patch, do not remove */ | ||||
LOG_OUTPUT( "$URL$\n"); | |||||
LOG_OUTPUT("$URL$\n"); | |||||
/* DANGER!!! make sure that the line above does not appear in a patch, do not remove */ | /* DANGER!!! make sure that the line above does not appear in a patch, do not remove */ | ||||
/* DANGER!!! make sure that the line above does not appear in a patch, do not remove */ | /* DANGER!!! make sure that the line above does not appear in a patch, do not remove */ | ||||
/* DANGER!!! make sure that the line above does not appear in a patch, do not remove */ | /* DANGER!!! make sure that the line above does not appear in a patch, do not remove */ | ||||
@@ -79,14 +79,6 @@ void print_version(void) | |||||
/* DANGER!!! make sure that the line above does not appear in a patch, do not remove */ | /* DANGER!!! make sure that the line above does not appear in a patch, do not remove */ | ||||
} | } | ||||
/* Give TELNET a way to find out what version this is */ | /* Give TELNET a way to find out what version this is */ | ||||
int handle_version_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) | int handle_version_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) | ||||
{ | { | ||||
@@ -240,7 +232,7 @@ int openocd_main(int argc, char *argv[]) | |||||
cmd_ctx = setup_command_handler(); | cmd_ctx = setup_command_handler(); | ||||
LOG_OUTPUT( "\n\nBUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS\n\n\n"); | |||||
LOG_OUTPUT("\n\nBUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS\n\n\n"); | |||||
print_version(); | print_version(); | ||||
@@ -307,7 +307,7 @@ int gdb_put_packet_inner(connection_t *connection, char *buffer, int len) | |||||
if ((retval = gdb_get_char(connection, &reply)) != ERROR_OK) | if ((retval = gdb_get_char(connection, &reply)) != ERROR_OK) | ||||
return retval; | return retval; | ||||
if( reply == '$' ){ | if( reply == '$' ){ | ||||
// fix a problem with some IAR tools | |||||
/* fix a problem with some IAR tools */ | |||||
gdb_putback_char( connection, reply ); | gdb_putback_char( connection, reply ); | ||||
LOG_DEBUG("Unexpected start of new packet"); | LOG_DEBUG("Unexpected start of new packet"); | ||||
break; | break; | ||||
@@ -719,7 +719,6 @@ int gdb_target_callback_event_handler(struct target_s *target, enum target_event | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int gdb_new_connection(connection_t *connection) | int gdb_new_connection(connection_t *connection) | ||||
{ | { | ||||
gdb_connection_t *gdb_connection = malloc(sizeof(gdb_connection_t)); | gdb_connection_t *gdb_connection = malloc(sizeof(gdb_connection_t)); | ||||
@@ -847,7 +846,6 @@ int gdb_last_signal_packet(connection_t *connection, target_t *target, char* pac | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
static int gdb_reg_pos(target_t *target, int pos, int len) | static int gdb_reg_pos(target_t *target, int pos, int len) | ||||
{ | { | ||||
if (target->endianness == TARGET_LITTLE_ENDIAN) | if (target->endianness == TARGET_LITTLE_ENDIAN) | ||||
@@ -2354,7 +2352,6 @@ int handle_gdb_breakpoint_override_command(struct command_context_s *cmd_ctx, ch | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int gdb_register_commands(command_context_t *command_context) | int gdb_register_commands(command_context_t *command_context) | ||||
{ | { | ||||
register_command(command_context, NULL, "gdb_port", handle_gdb_port_command, | register_command(command_context, NULL, "gdb_port", handle_gdb_port_command, | ||||
@@ -429,12 +429,12 @@ int server_loop(command_context_t *command_context) | |||||
#ifdef _WIN32 | #ifdef _WIN32 | ||||
BOOL WINAPI ControlHandler(DWORD dwCtrlType) | BOOL WINAPI ControlHandler(DWORD dwCtrlType) | ||||
{ | { | ||||
shutdown_openocd = 1; | |||||
return TRUE; | |||||
shutdown_openocd = 1; | |||||
return TRUE; | |||||
} | } | ||||
void sig_handler(int sig) { | void sig_handler(int sig) { | ||||
shutdown_openocd = 1; | |||||
shutdown_openocd = 1; | |||||
} | } | ||||
#endif | #endif | ||||
@@ -491,5 +491,3 @@ int handle_shutdown_command(struct command_context_s *cmd_ctx, char *cmd, char * | |||||
return ERROR_COMMAND_CLOSE_CONNECTION; | return ERROR_COMMAND_CLOSE_CONNECTION; | ||||
} | } | ||||
@@ -188,8 +188,6 @@ int telnet_new_connection(connection_t *connection) | |||||
log_add_callback(telnet_log_callback, connection); | log_add_callback(telnet_log_callback, connection); | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -447,21 +447,19 @@ int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *targ | |||||
arm7tdmi_init_target(cmd_ctx, target); | arm7tdmi_init_target(cmd_ctx, target); | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int arm720t_quit(void) | int arm720t_quit(void) | ||||
{ | { | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int arm720t_init_arch_info(target_t *target, arm720t_common_t *arm720t, jtag_tap_t *tap, const char *variant) | |||||
int arm720t_init_arch_info(target_t *target, arm720t_common_t *arm720t, jtag_tap_t *tap) | |||||
{ | { | ||||
arm7tdmi_common_t *arm7tdmi = &arm720t->arm7tdmi_common; | arm7tdmi_common_t *arm7tdmi = &arm720t->arm7tdmi_common; | ||||
arm7_9_common_t *arm7_9 = &arm7tdmi->arm7_9_common; | arm7_9_common_t *arm7_9 = &arm7tdmi->arm7_9_common; | ||||
arm7tdmi_init_arch_info(target, arm7tdmi, tap, variant); | |||||
arm7tdmi_init_arch_info(target, arm7tdmi, tap); | |||||
arm7tdmi->arch_info = arm720t; | arm7tdmi->arch_info = arm720t; | ||||
arm720t->common_magic = ARM720T_COMMON_MAGIC; | arm720t->common_magic = ARM720T_COMMON_MAGIC; | ||||
@@ -485,7 +483,7 @@ int arm720t_target_create(struct target_s *target, Jim_Interp *interp) | |||||
{ | { | ||||
arm720t_common_t *arm720t = calloc(1,sizeof(arm720t_common_t)); | arm720t_common_t *arm720t = calloc(1,sizeof(arm720t_common_t)); | ||||
arm720t_init_arch_info(target, arm720t, target->tap, target->variant); | |||||
arm720t_init_arch_info(target, arm720t, target->tap); | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -66,7 +66,6 @@ int handle_arm7_9_fast_memory_access_command(struct command_context_s *cmd_ctx, | |||||
int handle_arm7_9_dcc_downloads_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); | int handle_arm7_9_dcc_downloads_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); | ||||
int handle_arm7_9_etm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); | int handle_arm7_9_etm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); | ||||
static int arm7_9_clear_watchpoints(arm7_9_common_t *arm7_9) | static int arm7_9_clear_watchpoints(arm7_9_common_t *arm7_9) | ||||
{ | { | ||||
embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_VALUE], 0x0); | embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_VALUE], 0x0); | ||||
@@ -143,7 +142,6 @@ int arm7_9_setup(target_t *target) | |||||
return arm7_9_clear_watchpoints(arm7_9); | return arm7_9_clear_watchpoints(arm7_9); | ||||
} | } | ||||
int arm7_9_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p) | int arm7_9_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p) | ||||
{ | { | ||||
armv4_5_common_t *armv4_5 = target->arch_info; | armv4_5_common_t *armv4_5 = target->arch_info; | ||||
@@ -269,7 +267,6 @@ int arm7_9_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) | |||||
} | } | ||||
return retval; | return retval; | ||||
} | } | ||||
int arm7_9_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) | int arm7_9_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) | ||||
@@ -388,7 +385,6 @@ int arm7_9_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint) | |||||
} | } | ||||
} | } | ||||
arm7_9->breakpoint_count++; | arm7_9->breakpoint_count++; | ||||
return arm7_9_set_breakpoint(target, breakpoint); | return arm7_9_set_breakpoint(target, breakpoint); | ||||
@@ -571,9 +567,6 @@ int arm7_9_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint) | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int arm7_9_execute_sys_speed(struct target_s *target) | int arm7_9_execute_sys_speed(struct target_s *target) | ||||
{ | { | ||||
int retval; | int retval; | ||||
@@ -642,9 +635,9 @@ int arm7_9_execute_fast_sys_speed(struct target_s *target) | |||||
/* check for DBGACK and SYSCOMP set (others don't care) */ | /* check for DBGACK and SYSCOMP set (others don't care) */ | ||||
/* NB! These are constants that must be available until after next jtag_execute() and | /* NB! These are constants that must be available until after next jtag_execute() and | ||||
we evaluate the values upon first execution in lieu of setting up these constants | |||||
during early setup. | |||||
*/ | |||||
* we evaluate the values upon first execution in lieu of setting up these constants | |||||
* during early setup. | |||||
* */ | |||||
buf_set_u32(check_value, 0, 32, 0x9); | buf_set_u32(check_value, 0, 32, 0x9); | ||||
buf_set_u32(check_mask, 0, 32, 0x9); | buf_set_u32(check_mask, 0, 32, 0x9); | ||||
set=1; | set=1; | ||||
@@ -689,7 +682,6 @@ int arm7_9_handle_target_request(void *priv) | |||||
arm_jtag_t *jtag_info = &arm7_9->jtag_info; | arm_jtag_t *jtag_info = &arm7_9->jtag_info; | ||||
reg_t *dcc_control = &arm7_9->eice_cache->reg_list[EICE_COMMS_CTRL]; | reg_t *dcc_control = &arm7_9->eice_cache->reg_list[EICE_COMMS_CTRL]; | ||||
if (!target->dbg_msg_enabled) | if (!target->dbg_msg_enabled) | ||||
return ERROR_OK; | return ERROR_OK; | ||||
@@ -857,28 +849,25 @@ int arm7_9_assert_reset(target_t *target) | |||||
jtag_add_reset(0, 1); | jtag_add_reset(0, 1); | ||||
} | } | ||||
target->state = TARGET_RESET; | target->state = TARGET_RESET; | ||||
jtag_add_sleep(50000); | jtag_add_sleep(50000); | ||||
armv4_5_invalidate_core_regs(target); | armv4_5_invalidate_core_regs(target); | ||||
if ((target->reset_halt)&&((jtag_reset_config & RESET_SRST_PULLS_TRST)==0)) | |||||
if ((target->reset_halt)&&((jtag_reset_config & RESET_SRST_PULLS_TRST)==0)) | |||||
{ | { | ||||
/* debug entry was already prepared in arm7_9_assert_reset() */ | /* debug entry was already prepared in arm7_9_assert_reset() */ | ||||
target->debug_reason = DBG_REASON_DBGRQ; | target->debug_reason = DBG_REASON_DBGRQ; | ||||
} | } | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int arm7_9_deassert_reset(target_t *target) | int arm7_9_deassert_reset(target_t *target) | ||||
{ | { | ||||
int retval=ERROR_OK; | int retval=ERROR_OK; | ||||
LOG_DEBUG("target->state: %s", | LOG_DEBUG("target->state: %s", | ||||
Jim_Nvp_value2name_simple( nvp_target_state,target->state)->name); | |||||
Jim_Nvp_value2name_simple( nvp_target_state,target->state)->name); | |||||
/* deassert reset lines */ | /* deassert reset lines */ | ||||
jtag_add_reset(0, 0); | jtag_add_reset(0, 0); | ||||
@@ -1527,7 +1516,6 @@ void arm7_9_enable_breakpoints(struct target_s *target) | |||||
} | } | ||||
} | } | ||||
int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution) | int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution) | ||||
{ | { | ||||
armv4_5_common_t *armv4_5 = target->arch_info; | armv4_5_common_t *armv4_5 = target->arch_info; | ||||
@@ -1833,7 +1821,6 @@ int arm7_9_step(struct target_s *target, int current, u32 address, int handle_br | |||||
} | } | ||||
return err; | return err; | ||||
} | } | ||||
int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mode) | int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mode) | ||||
@@ -1900,7 +1887,6 @@ int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mod | |||||
} | } | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int arm7_9_write_core_reg(struct target_s *target, int num, enum armv4_5_mode mode, u32 value) | int arm7_9_write_core_reg(struct target_s *target, int num, enum armv4_5_mode mode, u32 value) | ||||
@@ -2326,7 +2312,6 @@ int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 coun | |||||
static int dcc_count; | static int dcc_count; | ||||
static u8 *dcc_buffer; | static u8 *dcc_buffer; | ||||
static int arm7_9_dcc_completion(struct target_s *target, u32 exit_point, int timeout_ms, void *arch_info) | static int arm7_9_dcc_completion(struct target_s *target, u32 exit_point, int timeout_ms, void *arch_info) | ||||
{ | { | ||||
int retval = ERROR_OK; | int retval = ERROR_OK; | ||||
@@ -2342,8 +2327,7 @@ static int arm7_9_dcc_completion(struct target_s *target, u32 exit_point, int ti | |||||
if (count>2) | if (count>2) | ||||
{ | { | ||||
/* Handle first & last using standard embeddedice_write_reg and the middle ones w/the | /* Handle first & last using standard embeddedice_write_reg and the middle ones w/the | ||||
core function repeated. | |||||
*/ | |||||
* core function repeated. */ | |||||
embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], fast_target_buffer_get_u32(buffer, little)); | embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], fast_target_buffer_get_u32(buffer, little)); | ||||
buffer+=4; | buffer+=4; | ||||
@@ -2373,7 +2357,6 @@ static int arm7_9_dcc_completion(struct target_s *target, u32 exit_point, int ti | |||||
return target_wait_state(target, TARGET_HALTED, 500); | return target_wait_state(target, TARGET_HALTED, 500); | ||||
} | } | ||||
static const u32 dcc_code[] = | static const u32 dcc_code[] = | ||||
{ | { | ||||
/* MRC TST BNE MRC STR B */ | /* MRC TST BNE MRC STR B */ | ||||
@@ -2382,7 +2365,6 @@ static const u32 dcc_code[] = | |||||
int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, u32 exit_point, int timeout_ms, void *arch_info)); | int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, u32 exit_point, int timeout_ms, void *arch_info)); | ||||
int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer) | int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer) | ||||
{ | { | ||||
int retval; | int retval; | ||||
@@ -2429,8 +2411,6 @@ int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffe | |||||
buf_set_u32(reg_params[0].value, 0, 32, address); | buf_set_u32(reg_params[0].value, 0, 32, address); | ||||
//armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem_param_t *mem_params, | |||||
// int num_reg_params, reg_param_t *reg_params, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, u32 exit_point, int timeout_ms, void *arch_info)) | |||||
dcc_count=count; | dcc_count=count; | ||||
dcc_buffer=buffer; | dcc_buffer=buffer; | ||||
retval = armv4_5_run_algorithm_inner(target, 0, NULL, 1, reg_params, | retval = armv4_5_run_algorithm_inner(target, 0, NULL, 1, reg_params, | ||||
@@ -2741,10 +2721,8 @@ int handle_arm7_9_write_core_reg_command(struct command_context_s *cmd_ctx, char | |||||
value = strtoul(args[2], NULL, 0); | value = strtoul(args[2], NULL, 0); | ||||
return arm7_9_write_core_reg(target, num, mode, value); | return arm7_9_write_core_reg(target, num, mode, value); | ||||
} | } | ||||
int handle_arm7_9_dbgrq_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) | int handle_arm7_9_dbgrq_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) | ||||
{ | { | ||||
target_t *target = get_current_target(cmd_ctx); | target_t *target = get_current_target(cmd_ctx); | ||||
@@ -154,5 +154,4 @@ int arm7_9_execute_sys_speed(struct target_s *target); | |||||
int arm7_9_init_arch_info(target_t *target, arm7_9_common_t *arm7_9); | int arm7_9_init_arch_info(target_t *target, arm7_9_common_t *arm7_9); | ||||
int arm7_9_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p); | int arm7_9_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p); | ||||
#endif /* ARM7_9_COMMON_H */ | #endif /* ARM7_9_COMMON_H */ |
@@ -364,7 +364,6 @@ void arm7tdmi_change_to_arm(target_t *target, u32 *r0, u32 *pc) | |||||
* reading PC in Thumb state gives address of instruction + 4 | * reading PC in Thumb state gives address of instruction + 4 | ||||
*/ | */ | ||||
*pc -= 0xa; | *pc -= 0xa; | ||||
} | } | ||||
void arm7tdmi_read_core_regs(target_t *target, u32 mask, u32* core_regs[16]) | void arm7tdmi_read_core_regs(target_t *target, u32 mask, u32* core_regs[16]) | ||||
@@ -391,7 +390,6 @@ void arm7tdmi_read_core_regs(target_t *target, u32 mask, u32* core_regs[16]) | |||||
/* nothing fetched, STM still in EXECUTE (1+i cycle) */ | /* nothing fetched, STM still in EXECUTE (1+i cycle) */ | ||||
arm7tdmi_clock_data_in(jtag_info, core_regs[i]); | arm7tdmi_clock_data_in(jtag_info, core_regs[i]); | ||||
} | } | ||||
} | } | ||||
void arm7tdmi_read_core_regs_target_buffer(target_t *target, u32 mask, void* buffer, int size) | void arm7tdmi_read_core_regs_target_buffer(target_t *target, u32 mask, void* buffer, int size) | ||||
@@ -435,7 +433,6 @@ void arm7tdmi_read_core_regs_target_buffer(target_t *target, u32 mask, void* buf | |||||
} | } | ||||
} | } | ||||
} | } | ||||
} | } | ||||
void arm7tdmi_read_xpsr(target_t *target, u32 *xpsr, int spsr) | void arm7tdmi_read_xpsr(target_t *target, u32 *xpsr, int spsr) | ||||
@@ -456,7 +453,6 @@ void arm7tdmi_read_xpsr(target_t *target, u32 *xpsr, int spsr) | |||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); | arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); | ||||
/* nothing fetched, STR still in EXECUTE (2nd cycle) */ | /* nothing fetched, STR still in EXECUTE (2nd cycle) */ | ||||
arm7tdmi_clock_data_in(jtag_info, xpsr); | arm7tdmi_clock_data_in(jtag_info, xpsr); | ||||
} | } | ||||
void arm7tdmi_write_xpsr(target_t *target, u32 xpsr, int spsr) | void arm7tdmi_write_xpsr(target_t *target, u32 xpsr, int spsr) | ||||
@@ -507,7 +503,6 @@ void arm7tdmi_write_xpsr_im8(target_t *target, u8 xpsr_im, int rot, int spsr) | |||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); | arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); | ||||
/* nothing fetched, MSR in EXECUTE (2) */ | /* nothing fetched, MSR in EXECUTE (2) */ | ||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); | arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); | ||||
} | } | ||||
void arm7tdmi_write_core_regs(target_t *target, u32 mask, u32 core_regs[16]) | void arm7tdmi_write_core_regs(target_t *target, u32 mask, u32 core_regs[16]) | ||||
@@ -535,7 +530,6 @@ void arm7tdmi_write_core_regs(target_t *target, u32 mask, u32 core_regs[16]) | |||||
arm7tdmi_clock_out_inner(jtag_info, core_regs[i], 0); | arm7tdmi_clock_out_inner(jtag_info, core_regs[i], 0); | ||||
} | } | ||||
arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0); | arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0); | ||||
} | } | ||||
void arm7tdmi_load_word_regs(target_t *target, u32 mask) | void arm7tdmi_load_word_regs(target_t *target, u32 mask) | ||||
@@ -549,7 +543,6 @@ void arm7tdmi_load_word_regs(target_t *target, u32 mask) | |||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); | arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); | ||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 1); | arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 1); | ||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_LDMIA(0, mask & 0xffff, 0, 1), NULL, 0); | arm7tdmi_clock_out(jtag_info, ARMV4_5_LDMIA(0, mask & 0xffff, 0, 1), NULL, 0); | ||||
} | } | ||||
void arm7tdmi_load_hword_reg(target_t *target, int num) | void arm7tdmi_load_hword_reg(target_t *target, int num) | ||||
@@ -563,7 +556,6 @@ void arm7tdmi_load_hword_reg(target_t *target, int num) | |||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); | arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); | ||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 1); | arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 1); | ||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_LDRH_IP(num, 0), NULL, 0); | arm7tdmi_clock_out(jtag_info, ARMV4_5_LDRH_IP(num, 0), NULL, 0); | ||||
} | } | ||||
void arm7tdmi_load_byte_reg(target_t *target, int num) | void arm7tdmi_load_byte_reg(target_t *target, int num) | ||||
@@ -577,7 +569,6 @@ void arm7tdmi_load_byte_reg(target_t *target, int num) | |||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); | arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); | ||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 1); | arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 1); | ||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_LDRB_IP(num, 0), NULL, 0); | arm7tdmi_clock_out(jtag_info, ARMV4_5_LDRB_IP(num, 0), NULL, 0); | ||||
} | } | ||||
void arm7tdmi_store_word_regs(target_t *target, u32 mask) | void arm7tdmi_store_word_regs(target_t *target, u32 mask) | ||||
@@ -591,7 +582,6 @@ void arm7tdmi_store_word_regs(target_t *target, u32 mask) | |||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); | arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); | ||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 1); | arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 1); | ||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_STMIA(0, mask, 0, 1), NULL, 0); | arm7tdmi_clock_out(jtag_info, ARMV4_5_STMIA(0, mask, 0, 1), NULL, 0); | ||||
} | } | ||||
void arm7tdmi_store_hword_reg(target_t *target, int num) | void arm7tdmi_store_hword_reg(target_t *target, int num) | ||||
@@ -605,7 +595,6 @@ void arm7tdmi_store_hword_reg(target_t *target, int num) | |||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); | arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); | ||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 1); | arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 1); | ||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_STRH_IP(num, 0), NULL, 0); | arm7tdmi_clock_out(jtag_info, ARMV4_5_STRH_IP(num, 0), NULL, 0); | ||||
} | } | ||||
void arm7tdmi_store_byte_reg(target_t *target, int num) | void arm7tdmi_store_byte_reg(target_t *target, int num) | ||||
@@ -619,7 +608,6 @@ void arm7tdmi_store_byte_reg(target_t *target, int num) | |||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); | arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); | ||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 1); | arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 1); | ||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_STRB_IP(num, 0), NULL, 0); | arm7tdmi_clock_out(jtag_info, ARMV4_5_STRB_IP(num, 0), NULL, 0); | ||||
} | } | ||||
void arm7tdmi_write_pc(target_t *target, u32 pc) | void arm7tdmi_write_pc(target_t *target, u32 pc) | ||||
@@ -658,7 +646,6 @@ void arm7tdmi_branch_resume(target_t *target) | |||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 1); | arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 1); | ||||
arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_B(0xfffffa, 0), 0); | arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_B(0xfffffa, 0), 0); | ||||
} | } | ||||
void arm7tdmi_branch_resume_thumb(target_t *target) | void arm7tdmi_branch_resume_thumb(target_t *target) | ||||
@@ -720,7 +707,6 @@ void arm7tdmi_branch_resume_thumb(target_t *target) | |||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, NULL, 1); | arm7tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, NULL, 1); | ||||
arm7tdmi_clock_out(jtag_info, ARMV4_5_T_B(0x7f8), NULL, 0); | arm7tdmi_clock_out(jtag_info, ARMV4_5_T_B(0x7f8), NULL, 0); | ||||
} | } | ||||
void arm7tdmi_build_reg_cache(target_t *target) | void arm7tdmi_build_reg_cache(target_t *target) | ||||
@@ -771,20 +757,17 @@ int arm7tdmi_examine(struct target_s *target) | |||||
int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target) | int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target) | ||||
{ | { | ||||
arm7tdmi_build_reg_cache(target); | arm7tdmi_build_reg_cache(target); | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int arm7tdmi_quit(void) | int arm7tdmi_quit(void) | ||||
{ | { | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_tap_t *tap, const char *variant) | |||||
int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_tap_t *tap) | |||||
{ | { | ||||
armv4_5_common_t *armv4_5; | armv4_5_common_t *armv4_5; | ||||
arm7_9_common_t *arm7_9; | arm7_9_common_t *arm7_9; | ||||
@@ -838,34 +821,21 @@ int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_ | |||||
arm7tdmi->arch_info = NULL; | arm7tdmi->arch_info = NULL; | ||||
arm7tdmi->common_magic = ARM7TDMI_COMMON_MAGIC; | arm7tdmi->common_magic = ARM7TDMI_COMMON_MAGIC; | ||||
if (variant) | |||||
{ | |||||
arm7tdmi->variant = strdup(variant); | |||||
} | |||||
else | |||||
{ | |||||
arm7tdmi->variant = strdup(""); | |||||
} | |||||
arm7_9_init_arch_info(target, arm7_9); | arm7_9_init_arch_info(target, arm7_9); | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int arm7tdmi_target_create( struct target_s *target, Jim_Interp *interp ) | int arm7tdmi_target_create( struct target_s *target, Jim_Interp *interp ) | ||||
{ | { | ||||
arm7tdmi_common_t *arm7tdmi; | arm7tdmi_common_t *arm7tdmi; | ||||
arm7tdmi = calloc(1,sizeof(arm7tdmi_common_t)); | arm7tdmi = calloc(1,sizeof(arm7tdmi_common_t)); | ||||
arm7tdmi_init_arch_info(target, arm7tdmi, target->tap, target->variant); | |||||
arm7tdmi_init_arch_info(target, arm7tdmi, target->tap); | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int arm7tdmi_register_commands(struct command_context_s *cmd_ctx) | int arm7tdmi_register_commands(struct command_context_s *cmd_ctx) | ||||
{ | { | ||||
int retval; | int retval; | ||||
@@ -873,5 +843,4 @@ int arm7tdmi_register_commands(struct command_context_s *cmd_ctx) | |||||
retval = arm7_9_register_commands(cmd_ctx); | retval = arm7_9_register_commands(cmd_ctx); | ||||
return retval; | return retval; | ||||
} | } |
@@ -35,15 +35,13 @@ | |||||
typedef struct arm7tdmi_common_s | typedef struct arm7tdmi_common_s | ||||
{ | { | ||||
int common_magic; | int common_magic; | ||||
char *variant; | |||||
void *arch_info; | void *arch_info; | ||||
arm7_9_common_t arm7_9_common; | arm7_9_common_t arm7_9_common; | ||||
} arm7tdmi_common_t; | } arm7tdmi_common_t; | ||||
int arm7tdmi_register_commands(struct command_context_s *cmd_ctx); | int arm7tdmi_register_commands(struct command_context_s *cmd_ctx); | ||||
int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_tap_t *tap, const char *variant); | |||||
int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_tap_t *tap); | |||||
int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target); | int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target); | ||||
int arm7tdmi_examine(struct target_s *target); | int arm7tdmi_examine(struct target_s *target); | ||||
#endif /* ARM7TDMI_H */ | #endif /* ARM7TDMI_H */ |
@@ -703,23 +703,21 @@ int arm920t_init_target(struct command_context_s *cmd_ctx, struct target_s *targ | |||||
arm9tdmi_init_target(cmd_ctx, target); | arm9tdmi_init_target(cmd_ctx, target); | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int arm920t_quit(void) | int arm920t_quit(void) | ||||
{ | { | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int arm920t_init_arch_info(target_t *target, arm920t_common_t *arm920t, jtag_tap_t *tap, const char *variant) | |||||
int arm920t_init_arch_info(target_t *target, arm920t_common_t *arm920t, jtag_tap_t *tap) | |||||
{ | { | ||||
arm9tdmi_common_t *arm9tdmi = &arm920t->arm9tdmi_common; | arm9tdmi_common_t *arm9tdmi = &arm920t->arm9tdmi_common; | ||||
arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common; | arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common; | ||||
/* initialize arm9tdmi specific info (including arm7_9 and armv4_5) | /* initialize arm9tdmi specific info (including arm7_9 and armv4_5) | ||||
*/ | */ | ||||
arm9tdmi_init_arch_info(target, arm9tdmi, tap, variant); | |||||
arm9tdmi_init_arch_info(target, arm9tdmi, tap); | |||||
arm9tdmi->arch_info = arm920t; | arm9tdmi->arch_info = arm920t; | ||||
arm920t->common_magic = ARM920T_COMMON_MAGIC; | arm920t->common_magic = ARM920T_COMMON_MAGIC; | ||||
@@ -752,7 +750,7 @@ int arm920t_target_create(struct target_s *target, Jim_Interp *interp) | |||||
{ | { | ||||
arm920t_common_t *arm920t = calloc(1,sizeof(arm920t_common_t)); | arm920t_common_t *arm920t = calloc(1,sizeof(arm920t_common_t)); | ||||
arm920t_init_arch_info(target, arm920t, target->tap, target->variant); | |||||
arm920t_init_arch_info(target, arm920t, target->tap); | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -995,10 +993,8 @@ int arm920t_handle_read_cache_command(struct command_context_s *cmd_ctx, char *c | |||||
i_cache[segment][index].data[i] = regs[i]; | i_cache[segment][index].data[i] = regs[i]; | ||||
fprintf(output, "%i: 0x%8.8x\n", i-1, regs[i]); | fprintf(output, "%i: 0x%8.8x\n", i-1, regs[i]); | ||||
} | } | ||||
} | } | ||||
/* Ra: r0 = index(31:26):SBZ(25:8):segment(7:5):SBZ(4:0) */ | /* Ra: r0 = index(31:26):SBZ(25:8):segment(7:5):SBZ(4:0) */ | ||||
regs[0] = 0x0 | (segment << 5) | (C15_C_D_Ind << 26); | regs[0] = 0x0 | (segment << 5) | (C15_C_D_Ind << 26); | ||||
arm9tdmi_write_core_regs(target, 0x1, regs); | arm9tdmi_write_core_regs(target, 0x1, regs); | ||||
@@ -98,7 +98,6 @@ target_type_t arm926ejs_target = | |||||
.mmu = arm926ejs_mmu | .mmu = arm926ejs_mmu | ||||
}; | }; | ||||
int arm926ejs_catch_broken_irscan(u8 *captured, void *priv, scan_field_t *field) | int arm926ejs_catch_broken_irscan(u8 *captured, void *priv, scan_field_t *field) | ||||
{ | { | ||||
/* The ARM926EJ-S' instruction register is 4 bits wide */ | /* The ARM926EJ-S' instruction register is 4 bits wide */ | ||||
@@ -498,7 +497,6 @@ void arm926ejs_post_debug_entry(target_t *target) | |||||
LOG_DEBUG("D FSR: 0x%8.8x, D FAR: 0x%8.8x, I FSR: 0x%8.8x", | LOG_DEBUG("D FSR: 0x%8.8x, D FAR: 0x%8.8x, I FSR: 0x%8.8x", | ||||
arm926ejs->d_fsr, arm926ejs->d_far, arm926ejs->i_fsr); | arm926ejs->d_fsr, arm926ejs->d_far, arm926ejs->i_fsr); | ||||
u32 cache_dbg_ctrl; | u32 cache_dbg_ctrl; | ||||
/* read-modify-write CP15 cache debug control register | /* read-modify-write CP15 cache debug control register | ||||
@@ -666,7 +664,6 @@ int arm926ejs_soft_reset_halt(struct target_s *target) | |||||
arm926ejs->armv4_5_mmu.armv4_5_cache.i_cache_enabled = 0; | arm926ejs->armv4_5_mmu.armv4_5_cache.i_cache_enabled = 0; | ||||
return target_call_event_callbacks(target, TARGET_EVENT_HALTED); | return target_call_event_callbacks(target, TARGET_EVENT_HALTED); | ||||
} | } | ||||
int arm926ejs_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) | int arm926ejs_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) | ||||
@@ -705,23 +702,21 @@ int arm926ejs_init_target(struct command_context_s *cmd_ctx, struct target_s *ta | |||||
arm9tdmi_init_target(cmd_ctx, target); | arm9tdmi_init_target(cmd_ctx, target); | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int arm926ejs_quit(void) | int arm926ejs_quit(void) | ||||
{ | { | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs, jtag_tap_t *tap, const char *variant) | |||||
int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs, jtag_tap_t *tap) | |||||
{ | { | ||||
arm9tdmi_common_t *arm9tdmi = &arm926ejs->arm9tdmi_common; | arm9tdmi_common_t *arm9tdmi = &arm926ejs->arm9tdmi_common; | ||||
arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common; | arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common; | ||||
/* initialize arm9tdmi specific info (including arm7_9 and armv4_5) | /* initialize arm9tdmi specific info (including arm7_9 and armv4_5) | ||||
*/ | */ | ||||
arm9tdmi_init_arch_info(target, arm9tdmi, tap, variant); | |||||
arm9tdmi_init_arch_info(target, arm9tdmi, tap); | |||||
arm9tdmi->arch_info = arm926ejs; | arm9tdmi->arch_info = arm926ejs; | ||||
arm926ejs->common_magic = ARM926EJS_COMMON_MAGIC; | arm926ejs->common_magic = ARM926EJS_COMMON_MAGIC; | ||||
@@ -755,7 +750,7 @@ int arm926ejs_target_create(struct target_s *target, Jim_Interp *interp) | |||||
{ | { | ||||
arm926ejs_common_t *arm926ejs = calloc(1,sizeof(arm926ejs_common_t)); | arm926ejs_common_t *arm926ejs = calloc(1,sizeof(arm926ejs_common_t)); | ||||
arm926ejs_init_arch_info(target, arm926ejs, target->tap, target->variant); | |||||
arm926ejs_init_arch_info(target, arm926ejs, target->tap); | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -945,6 +940,7 @@ int arm926ejs_handle_mw_phys_command(command_context_t *cmd_ctx, char *cmd, char | |||||
return armv4_5_mmu_handle_mw_phys_command(cmd_ctx, cmd, args, argc, target, &arm926ejs->armv4_5_mmu); | return armv4_5_mmu_handle_mw_phys_command(cmd_ctx, cmd, args, argc, target, &arm926ejs->armv4_5_mmu); | ||||
} | } | ||||
static int arm926ejs_virt2phys(struct target_s *target, u32 virtual, u32 *physical) | static int arm926ejs_virt2phys(struct target_s *target, u32 virtual, u32 *physical) | ||||
{ | { | ||||
int retval; | int retval; | ||||
@@ -43,7 +43,7 @@ typedef struct arm926ejs_common_s | |||||
u32 d_far; | u32 d_far; | ||||
} arm926ejs_common_t; | } arm926ejs_common_t; | ||||
extern int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs, jtag_tap_t *tap, const char *variant); | |||||
extern int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs, jtag_tap_t *tap); | |||||
extern int arm926ejs_register_commands(struct command_context_s *cmd_ctx); | extern int arm926ejs_register_commands(struct command_context_s *cmd_ctx); | ||||
extern int arm926ejs_arch_state(struct target_s *target); | extern int arm926ejs_arch_state(struct target_s *target); | ||||
extern int arm926ejs_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); | extern int arm926ejs_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); | ||||
@@ -98,16 +98,15 @@ int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *targ | |||||
int arm966e_quit(void) | int arm966e_quit(void) | ||||
{ | { | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, jtag_tap_t *tap, const char *variant) | |||||
int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, jtag_tap_t *tap) | |||||
{ | { | ||||
arm9tdmi_common_t *arm9tdmi = &arm966e->arm9tdmi_common; | arm9tdmi_common_t *arm9tdmi = &arm966e->arm9tdmi_common; | ||||
arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common; | arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common; | ||||
arm9tdmi_init_arch_info(target, arm9tdmi, tap, variant); | |||||
arm9tdmi_init_arch_info(target, arm9tdmi, tap); | |||||
arm9tdmi->arch_info = arm966e; | arm9tdmi->arch_info = arm966e; | ||||
arm966e->common_magic = ARM966E_COMMON_MAGIC; | arm966e->common_magic = ARM966E_COMMON_MAGIC; | ||||
@@ -125,7 +124,7 @@ int arm966e_target_create( struct target_s *target, Jim_Interp *interp ) | |||||
{ | { | ||||
arm966e_common_t *arm966e = calloc(1,sizeof(arm966e_common_t)); | arm966e_common_t *arm966e = calloc(1,sizeof(arm966e_common_t)); | ||||
arm966e_init_arch_info(target, arm966e, target->tap, target->variant); | |||||
arm966e_init_arch_info(target, arm966e, target->tap); | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -507,7 +507,6 @@ void arm9tdmi_read_core_regs(target_t *target, u32 mask, u32* core_regs[16]) | |||||
/* nothing fetched, STM in MEMORY (i'th cycle) */ | /* nothing fetched, STM in MEMORY (i'th cycle) */ | ||||
arm9tdmi_clock_data_in(jtag_info, core_regs[i]); | arm9tdmi_clock_data_in(jtag_info, core_regs[i]); | ||||
} | } | ||||
} | } | ||||
void arm9tdmi_read_core_regs_target_buffer(target_t *target, u32 mask, void* buffer, int size) | void arm9tdmi_read_core_regs_target_buffer(target_t *target, u32 mask, void* buffer, int size) | ||||
@@ -549,7 +548,6 @@ void arm9tdmi_read_core_regs_target_buffer(target_t *target, u32 mask, void* buf | |||||
break; | break; | ||||
} | } | ||||
} | } | ||||
} | } | ||||
void arm9tdmi_read_xpsr(target_t *target, u32 *xpsr, int spsr) | void arm9tdmi_read_xpsr(target_t *target, u32 *xpsr, int spsr) | ||||
@@ -574,7 +572,6 @@ void arm9tdmi_read_xpsr(target_t *target, u32 *xpsr, int spsr) | |||||
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); | arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); | ||||
/* nothing fetched, STR in MEMORY */ | /* nothing fetched, STR in MEMORY */ | ||||
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, xpsr, 0); | arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, xpsr, 0); | ||||
} | } | ||||
void arm9tdmi_write_xpsr(target_t *target, u32 xpsr, int spsr) | void arm9tdmi_write_xpsr(target_t *target, u32 xpsr, int spsr) | ||||
@@ -664,7 +661,6 @@ void arm9tdmi_write_core_regs(target_t *target, u32 mask, u32 core_regs[16]) | |||||
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, core_regs[i], NULL, 0); | arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, core_regs[i], NULL, 0); | ||||
} | } | ||||
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); | arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); | ||||
} | } | ||||
void arm9tdmi_load_word_regs(target_t *target, u32 mask) | void arm9tdmi_load_word_regs(target_t *target, u32 mask) | ||||
@@ -677,7 +673,6 @@ void arm9tdmi_load_word_regs(target_t *target, u32 mask) | |||||
/* put system-speed load-multiple into the pipeline */ | /* put system-speed load-multiple into the pipeline */ | ||||
arm9tdmi_clock_out(jtag_info, ARMV4_5_LDMIA(0, mask & 0xffff, 0, 1), 0, NULL, 0); | arm9tdmi_clock_out(jtag_info, ARMV4_5_LDMIA(0, mask & 0xffff, 0, 1), 0, NULL, 0); | ||||
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1); | arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1); | ||||
} | } | ||||
void arm9tdmi_load_hword_reg(target_t *target, int num) | void arm9tdmi_load_hword_reg(target_t *target, int num) | ||||
@@ -702,7 +697,6 @@ void arm9tdmi_load_byte_reg(target_t *target, int num) | |||||
/* put system-speed load byte into the pipeline */ | /* put system-speed load byte into the pipeline */ | ||||
arm9tdmi_clock_out(jtag_info, ARMV4_5_LDRB_IP(num, 0), 0, NULL, 0); | arm9tdmi_clock_out(jtag_info, ARMV4_5_LDRB_IP(num, 0), 0, NULL, 0); | ||||
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1); | arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1); | ||||
} | } | ||||
void arm9tdmi_store_word_regs(target_t *target, u32 mask) | void arm9tdmi_store_word_regs(target_t *target, u32 mask) | ||||
@@ -715,7 +709,6 @@ void arm9tdmi_store_word_regs(target_t *target, u32 mask) | |||||
/* put system-speed store-multiple into the pipeline */ | /* put system-speed store-multiple into the pipeline */ | ||||
arm9tdmi_clock_out(jtag_info, ARMV4_5_STMIA(0, mask, 0, 1), 0, NULL, 0); | arm9tdmi_clock_out(jtag_info, ARMV4_5_STMIA(0, mask, 0, 1), 0, NULL, 0); | ||||
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1); | arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1); | ||||
} | } | ||||
void arm9tdmi_store_hword_reg(target_t *target, int num) | void arm9tdmi_store_hword_reg(target_t *target, int num) | ||||
@@ -728,7 +721,6 @@ void arm9tdmi_store_hword_reg(target_t *target, int num) | |||||
/* put system-speed store half-word into the pipeline */ | /* put system-speed store half-word into the pipeline */ | ||||
arm9tdmi_clock_out(jtag_info, ARMV4_5_STRH_IP(num, 0), 0, NULL, 0); | arm9tdmi_clock_out(jtag_info, ARMV4_5_STRH_IP(num, 0), 0, NULL, 0); | ||||
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1); | arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1); | ||||
} | } | ||||
void arm9tdmi_store_byte_reg(target_t *target, int num) | void arm9tdmi_store_byte_reg(target_t *target, int num) | ||||
@@ -741,7 +733,6 @@ void arm9tdmi_store_byte_reg(target_t *target, int num) | |||||
/* put system-speed store byte into the pipeline */ | /* put system-speed store byte into the pipeline */ | ||||
arm9tdmi_clock_out(jtag_info, ARMV4_5_STRB_IP(num, 0), 0, NULL, 0); | arm9tdmi_clock_out(jtag_info, ARMV4_5_STRB_IP(num, 0), 0, NULL, 0); | ||||
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1); | arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1); | ||||
} | } | ||||
void arm9tdmi_write_pc(target_t *target, u32 pc) | void arm9tdmi_write_pc(target_t *target, u32 pc) | ||||
@@ -768,7 +759,6 @@ void arm9tdmi_write_pc(target_t *target, u32 pc) | |||||
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); | arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); | ||||
/* fetch NOP, LDM in EXECUTE stage (5th cycle) */ | /* fetch NOP, LDM in EXECUTE stage (5th cycle) */ | ||||
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); | arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); | ||||
} | } | ||||
void arm9tdmi_branch_resume(target_t *target) | void arm9tdmi_branch_resume(target_t *target) | ||||
@@ -780,7 +770,6 @@ void arm9tdmi_branch_resume(target_t *target) | |||||
arm9tdmi_clock_out(jtag_info, ARMV4_5_B(0xfffffc, 0), 0, NULL, 0); | arm9tdmi_clock_out(jtag_info, ARMV4_5_B(0xfffffc, 0), 0, NULL, 0); | ||||
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1); | arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1); | ||||
} | } | ||||
void arm9tdmi_branch_resume_thumb(target_t *target) | void arm9tdmi_branch_resume_thumb(target_t *target) | ||||
@@ -841,7 +830,6 @@ void arm9tdmi_branch_resume_thumb(target_t *target) | |||||
arm9tdmi_clock_out(jtag_info, ARMV4_5_T_B(0x7f7), 0, NULL, 1); | arm9tdmi_clock_out(jtag_info, ARMV4_5_T_B(0x7f7), 0, NULL, 1); | ||||
arm9tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, 0, NULL, 0); | arm9tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, 0, NULL, 0); | ||||
} | } | ||||
void arm9tdmi_enable_single_step(target_t *target, u32 next_pc) | void arm9tdmi_enable_single_step(target_t *target, u32 next_pc) | ||||
@@ -888,7 +876,6 @@ void arm9tdmi_build_reg_cache(target_t *target) | |||||
armv4_5->core_cache = (*cache_p); | armv4_5->core_cache = (*cache_p); | ||||
} | } | ||||
int arm9tdmi_examine(struct target_s *target) | int arm9tdmi_examine(struct target_s *target) | ||||
{ | { | ||||
/* get pointers to arch-specific information */ | /* get pointers to arch-specific information */ | ||||
@@ -932,16 +919,14 @@ int arm9tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *tar | |||||
arm9tdmi_build_reg_cache(target); | arm9tdmi_build_reg_cache(target); | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int arm9tdmi_quit(void) | int arm9tdmi_quit(void) | ||||
{ | { | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_tap_t *tap, const char *variant) | |||||
int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_tap_t *tap) | |||||
{ | { | ||||
armv4_5_common_t *armv4_5; | armv4_5_common_t *armv4_5; | ||||
arm7_9_common_t *arm7_9; | arm7_9_common_t *arm7_9; | ||||
@@ -995,15 +980,6 @@ int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_ | |||||
arm9tdmi->common_magic = ARM9TDMI_COMMON_MAGIC; | arm9tdmi->common_magic = ARM9TDMI_COMMON_MAGIC; | ||||
arm9tdmi->arch_info = NULL; | arm9tdmi->arch_info = NULL; | ||||
if (variant) | |||||
{ | |||||
arm9tdmi->variant = strdup(variant); | |||||
} | |||||
else | |||||
{ | |||||
arm9tdmi->variant = strdup(""); | |||||
} | |||||
arm7_9_init_arch_info(target, arm7_9); | arm7_9_init_arch_info(target, arm7_9); | ||||
/* override use of DBGRQ, this is safe on ARM9TDMI */ | /* override use of DBGRQ, this is safe on ARM9TDMI */ | ||||
@@ -1045,13 +1021,11 @@ int arm9tdmi_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, a | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp) | int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp) | ||||
{ | { | ||||
arm9tdmi_common_t *arm9tdmi = calloc(1,sizeof(arm9tdmi_common_t)); | arm9tdmi_common_t *arm9tdmi = calloc(1,sizeof(arm9tdmi_common_t)); | ||||
arm9tdmi_init_arch_info(target, arm9tdmi, target->tap, target->variant); | |||||
arm9tdmi_init_arch_info(target, arm9tdmi, target->tap); | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -1059,19 +1033,13 @@ int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp) | |||||
int arm9tdmi_register_commands(struct command_context_s *cmd_ctx) | int arm9tdmi_register_commands(struct command_context_s *cmd_ctx) | ||||
{ | { | ||||
int retval; | int retval; | ||||
command_t *arm9tdmi_cmd; | command_t *arm9tdmi_cmd; | ||||
retval = arm7_9_register_commands(cmd_ctx); | retval = arm7_9_register_commands(cmd_ctx); | ||||
arm9tdmi_cmd = register_command(cmd_ctx, NULL, "arm9tdmi", NULL, COMMAND_ANY, "arm9tdmi specific commands"); | arm9tdmi_cmd = register_command(cmd_ctx, NULL, "arm9tdmi", NULL, COMMAND_ANY, "arm9tdmi specific commands"); | ||||
register_command(cmd_ctx, arm9tdmi_cmd, "vector_catch", handle_arm9tdmi_catch_vectors_command, COMMAND_EXEC, "catch arm920t vectors ['all'|'none'|'<vec1 vec2 ...>']"); | register_command(cmd_ctx, arm9tdmi_cmd, "vector_catch", handle_arm9tdmi_catch_vectors_command, COMMAND_EXEC, "catch arm920t vectors ['all'|'none'|'<vec1 vec2 ...>']"); | ||||
return retval; | return retval; | ||||
} | } | ||||
int handle_arm9tdmi_catch_vectors_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) | int handle_arm9tdmi_catch_vectors_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) | ||||
@@ -35,7 +35,6 @@ | |||||
typedef struct arm9tdmi_common_s | typedef struct arm9tdmi_common_s | ||||
{ | { | ||||
int common_magic; | int common_magic; | ||||
char *variant; | |||||
void *arch_info; | void *arch_info; | ||||
arm7_9_common_t arm7_9_common; | arm7_9_common_t arm7_9_common; | ||||
} arm9tdmi_common_t; | } arm9tdmi_common_t; | ||||
@@ -60,7 +59,7 @@ enum arm9tdmi_vector | |||||
extern int arm9tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target); | extern int arm9tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target); | ||||
int arm9tdmi_examine(struct target_s *target); | int arm9tdmi_examine(struct target_s *target); | ||||
extern int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_tap_t *tap, const char *variant); | |||||
extern int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_tap_t *tap); | |||||
extern int arm9tdmi_register_commands(struct command_context_s *cmd_ctx); | extern int arm9tdmi_register_commands(struct command_context_s *cmd_ctx); | ||||
extern int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int sysspeed); | extern int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int sysspeed); | ||||
@@ -178,7 +178,6 @@ reg_t armv4_5_gdb_dummy_fps_reg = | |||||
"GDB dummy floating-point status register", armv4_5_gdb_dummy_fps_value, 0, 1, 32, NULL, 0, NULL, 0 | "GDB dummy floating-point status register", armv4_5_gdb_dummy_fps_value, 0, 1, 32, NULL, 0, NULL, 0 | ||||
}; | }; | ||||
int armv4_5_get_core_reg(reg_t *reg) | int armv4_5_get_core_reg(reg_t *reg) | ||||
{ | { | ||||
int retval; | int retval; | ||||
@@ -663,7 +662,6 @@ int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem | |||||
return retval; | return retval; | ||||
} | } | ||||
int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info) | int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info) | ||||
{ | { | ||||
return armv4_5_run_algorithm_inner(target, num_mem_params, mem_params, num_reg_params, reg_params, entry_point, exit_point, timeout_ms, arch_info, armv4_5_run_algorithm_completion); | return armv4_5_run_algorithm_inner(target, num_mem_params, mem_params, num_reg_params, reg_params, entry_point, exit_point, timeout_ms, arch_info, armv4_5_run_algorithm_completion); | ||||
@@ -137,7 +137,6 @@ static __inline enum armv4_5_mode armv4_5_number_to_mode(int number) | |||||
} | } | ||||
}; | }; | ||||
extern int armv4_5_arch_state(struct target_s *target); | extern int armv4_5_arch_state(struct target_s *target); | ||||
extern int armv4_5_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_size); | extern int armv4_5_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_size); | ||||
extern int armv4_5_invalidate_core_regs(target_t *target); | extern int armv4_5_invalidate_core_regs(target_t *target); | ||||
@@ -238,8 +238,6 @@ static void watchpoint_free(target_t *target, watchpoint_t *watchpoint_remove) | |||||
free(watchpoint); | free(watchpoint); | ||||
} | } | ||||
void watchpoint_remove(target_t *target, u32 address) | void watchpoint_remove(target_t *target, u32 address) | ||||
{ | { | ||||
watchpoint_t *watchpoint = target->watchpoints; | watchpoint_t *watchpoint = target->watchpoints; | ||||
@@ -263,7 +261,6 @@ void watchpoint_remove(target_t *target, u32 address) | |||||
} | } | ||||
} | } | ||||
void watchpoint_clear_target(target_t *target) | void watchpoint_clear_target(target_t *target) | ||||
{ | { | ||||
watchpoint_t *watchpoint; | watchpoint_t *watchpoint; | ||||
@@ -69,4 +69,3 @@ extern void watchpoint_remove(struct target_s *target, u32 address); | |||||
extern void watchpoint_clear_target(struct target_s *target); | extern void watchpoint_clear_target(struct target_s *target); | ||||
#endif /* BREAKPOINTS_H */ | #endif /* BREAKPOINTS_H */ | ||||
@@ -740,7 +740,7 @@ int cortex_m3_assert_reset(target_t *target) | |||||
* when srst is asserted the luminary device seesm to also clear the debug registers | * when srst is asserted the luminary device seesm to also clear the debug registers | ||||
* which does not match the armv7 debug TRM */ | * which does not match the armv7 debug TRM */ | ||||
if (strcmp(cortex_m3->variant, "lm3s") == 0) | |||||
if (strcmp(target->variant, "lm3s") == 0) | |||||
{ | { | ||||
/* get revision of lm3s target, only early silicon has this issue | /* get revision of lm3s target, only early silicon has this issue | ||||
* Fury Rev B, DustDevil Rev B, Tempest all ok */ | * Fury Rev B, DustDevil Rev B, Tempest all ok */ | ||||
@@ -1407,7 +1407,7 @@ int cortex_m3_examine(struct target_s *target) | |||||
/* Setup FPB */ | /* Setup FPB */ | ||||
target_read_u32(target, FP_CTRL, &fpcr); | target_read_u32(target, FP_CTRL, &fpcr); | ||||
cortex_m3->auto_bp_type = 1; | cortex_m3->auto_bp_type = 1; | ||||
cortex_m3->fp_num_code = (fpcr >> 8) & 0x70 | (fpcr >> 4) & 0xF; /* bits [14:12] and [7:4] */ | |||||
cortex_m3->fp_num_code = ((fpcr >> 8) & 0x70) | ((fpcr >> 4) & 0xF); /* bits [14:12] and [7:4] */ | |||||
cortex_m3->fp_num_lit = (fpcr >> 8) & 0xF; | cortex_m3->fp_num_lit = (fpcr >> 8) & 0xF; | ||||
cortex_m3->fp_code_available = cortex_m3->fp_num_code; | cortex_m3->fp_code_available = cortex_m3->fp_num_code; | ||||
cortex_m3->fp_comparator_list = calloc(cortex_m3->fp_num_code + cortex_m3->fp_num_lit, sizeof(cortex_m3_fp_comparator_t)); | cortex_m3->fp_comparator_list = calloc(cortex_m3->fp_num_code + cortex_m3->fp_num_lit, sizeof(cortex_m3_fp_comparator_t)); | ||||
@@ -1517,7 +1517,7 @@ int cortex_m3_handle_target_request(void *priv) | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int cortex_m3_init_arch_info(target_t *target, cortex_m3_common_t *cortex_m3, jtag_tap_t *tap, const char *variant) | |||||
int cortex_m3_init_arch_info(target_t *target, cortex_m3_common_t *cortex_m3, jtag_tap_t *tap) | |||||
{ | { | ||||
armv7m_common_t *armv7m; | armv7m_common_t *armv7m; | ||||
armv7m = &cortex_m3->armv7m; | armv7m = &cortex_m3->armv7m; | ||||
@@ -1545,15 +1545,6 @@ int cortex_m3_init_arch_info(target_t *target, cortex_m3_common_t *cortex_m3, jt | |||||
armv7m->pre_restore_context = NULL; | armv7m->pre_restore_context = NULL; | ||||
armv7m->post_restore_context = NULL; | armv7m->post_restore_context = NULL; | ||||
if (variant) | |||||
{ | |||||
cortex_m3->variant = strdup(variant); | |||||
} | |||||
else | |||||
{ | |||||
cortex_m3->variant = strdup(""); | |||||
} | |||||
armv7m_init_arch_info(target, armv7m); | armv7m_init_arch_info(target, armv7m); | ||||
armv7m->arch_info = cortex_m3; | armv7m->arch_info = cortex_m3; | ||||
armv7m->load_core_reg_u32 = cortex_m3_load_core_reg_u32; | armv7m->load_core_reg_u32 = cortex_m3_load_core_reg_u32; | ||||
@@ -1568,7 +1559,7 @@ int cortex_m3_target_create(struct target_s *target, Jim_Interp *interp) | |||||
{ | { | ||||
cortex_m3_common_t *cortex_m3 = calloc(1,sizeof(cortex_m3_common_t)); | cortex_m3_common_t *cortex_m3 = calloc(1,sizeof(cortex_m3_common_t)); | ||||
cortex_m3_init_arch_info(target, cortex_m3, target->tap, target->variant); | |||||
cortex_m3_init_arch_info(target, cortex_m3, target->tap); | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -138,7 +138,6 @@ typedef struct cortex_m3_common_s | |||||
{ | { | ||||
int common_magic; | int common_magic; | ||||
arm_jtag_t jtag_info; | arm_jtag_t jtag_info; | ||||
char *variant; | |||||
/* Context information */ | /* Context information */ | ||||
u32 dcb_dhcsr; | u32 dcb_dhcsr; | ||||
@@ -190,6 +189,6 @@ int cortex_m3_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint); | |||||
int cortex_m3_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint); | int cortex_m3_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint); | ||||
extern int cortex_m3_register_commands(struct command_context_s *cmd_ctx); | extern int cortex_m3_register_commands(struct command_context_s *cmd_ctx); | ||||
extern int cortex_m3_init_arch_info(target_t *target, cortex_m3_common_t *cortex_m3, jtag_tap_t *tap, const char *variant); | |||||
extern int cortex_m3_init_arch_info(target_t *target, cortex_m3_common_t *cortex_m3, jtag_tap_t *tap); | |||||
#endif /* CORTEX_M3_H */ | #endif /* CORTEX_M3_H */ |
@@ -33,9 +33,9 @@ | |||||
#define DPAP_WRITE 0 | #define DPAP_WRITE 0 | ||||
#define DPAP_READ 1 | #define DPAP_READ 1 | ||||
#define DP_ZERO 0 | #define DP_ZERO 0 | ||||
#define DP_CTRL_STAT 0x4 | |||||
#define DP_SELECT 0x8 | |||||
#define DP_RDBUFF 0xC | |||||
#define DP_CTRL_STAT 0x4 | |||||
#define DP_SELECT 0x8 | |||||
#define DP_RDBUFF 0xC | |||||
#define CORUNDETECT (1<<0) | #define CORUNDETECT (1<<0) | ||||
#define SSTICKYORUN (1<<1) | #define SSTICKYORUN (1<<1) | ||||
@@ -129,5 +129,4 @@ static __inline__ void embeddedice_write_reg_inner( jtag_tap_t *tap, int reg_add | |||||
void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, u8 *buffer, int little, int count); | void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, u8 *buffer, int little, int count); | ||||
#endif /* EMBEDDED_ICE_H */ | #endif /* EMBEDDED_ICE_H */ |
@@ -31,15 +31,15 @@ | |||||
/* ETB registers */ | /* ETB registers */ | ||||
enum | enum | ||||
{ | { | ||||
ETB_ID = 0x00, | |||||
ETB_RAM_DEPTH = 0x01, | |||||
ETB_RAM_WIDTH = 0x02, | |||||
ETB_STATUS = 0x03, | |||||
ETB_RAM_DATA = 0x04, | |||||
ETB_RAM_READ_POINTER = 0x05, | |||||
ETB_RAM_WRITE_POINTER = 0x06, | |||||
ETB_TRIGGER_COUNTER = 0x07, | |||||
ETB_CTRL = 0x08, | |||||
ETB_ID = 0x00, | |||||
ETB_RAM_DEPTH = 0x01, | |||||
ETB_RAM_WIDTH = 0x02, | |||||
ETB_STATUS = 0x03, | |||||
ETB_RAM_DATA = 0x04, | |||||
ETB_RAM_READ_POINTER = 0x05, | |||||
ETB_RAM_WRITE_POINTER = 0x06, | |||||
ETB_TRIGGER_COUNTER = 0x07, | |||||
ETB_CTRL = 0x08, | |||||
}; | }; | ||||
typedef struct etb_s | typedef struct etb_s | ||||
@@ -645,7 +645,7 @@ int feroceon_target_create(struct target_s *target, Jim_Interp *interp) | |||||
arm7_9_common_t *arm7_9; | arm7_9_common_t *arm7_9; | ||||
arm926ejs_common_t *arm926ejs = calloc(1,sizeof(arm926ejs_common_t)); | arm926ejs_common_t *arm926ejs = calloc(1,sizeof(arm926ejs_common_t)); | ||||
arm926ejs_init_arch_info(target, arm926ejs, target->tap, target->variant); | |||||
arm926ejs_init_arch_info(target, arm926ejs, target->tap); | |||||
armv4_5 = target->arch_info; | armv4_5 = target->arch_info; | ||||
arm7_9 = armv4_5->arch_info; | arm7_9 = armv4_5->arch_info; | ||||
@@ -684,7 +684,6 @@ int feroceon_target_create(struct target_s *target, Jim_Interp *interp) | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int feroceon_examine(struct target_s *target) | int feroceon_examine(struct target_s *target) | ||||
{ | { | ||||
armv4_5_common_t *armv4_5; | armv4_5_common_t *armv4_5; | ||||
@@ -83,15 +83,15 @@ static int autodetect_image_type(image_t *image, char *url) | |||||
LOG_DEBUG("ELF image detected."); | LOG_DEBUG("ELF image detected."); | ||||
image->type = IMAGE_ELF; | image->type = IMAGE_ELF; | ||||
} | } | ||||
else if ((buffer[0]==':') /* record start byte */ | |||||
&&(isxdigit(buffer[1])) | |||||
&&(isxdigit(buffer[2])) | |||||
&&(isxdigit(buffer[3])) | |||||
&&(isxdigit(buffer[4])) | |||||
&&(isxdigit(buffer[5])) | |||||
&&(isxdigit(buffer[6])) | |||||
&&(buffer[7]=='0') /* record type : 00 -> 05 */ | |||||
&&(buffer[8]>='0')&&(buffer[8]<'6')) | |||||
else if ((buffer[0]==':') /* record start byte */ | |||||
&&(isxdigit(buffer[1])) | |||||
&&(isxdigit(buffer[2])) | |||||
&&(isxdigit(buffer[3])) | |||||
&&(isxdigit(buffer[4])) | |||||
&&(isxdigit(buffer[5])) | |||||
&&(isxdigit(buffer[6])) | |||||
&&(buffer[7]=='0') /* record type : 00 -> 05 */ | |||||
&&(buffer[8]>='0')&&(buffer[8]<'6')) | |||||
{ | { | ||||
LOG_DEBUG("IHEX image detected."); | LOG_DEBUG("IHEX image detected."); | ||||
image->type = IMAGE_IHEX; | image->type = IMAGE_IHEX; | ||||
@@ -381,7 +381,6 @@ int image_elf_read_headers(image_t *image) | |||||
return ERROR_IMAGE_FORMAT_ERROR; | return ERROR_IMAGE_FORMAT_ERROR; | ||||
} | } | ||||
elf->endianness = elf->header->e_ident[EI_DATA]; | elf->endianness = elf->header->e_ident[EI_DATA]; | ||||
if ((elf->endianness!=ELFDATA2LSB) | if ((elf->endianness!=ELFDATA2LSB) | ||||
&&(elf->endianness!=ELFDATA2MSB)) | &&(elf->endianness!=ELFDATA2MSB)) | ||||
@@ -1042,5 +1041,3 @@ int image_calculate_checksum(u8* buffer, u32 nbytes, u32* checksum) | |||||
*checksum = crc; | *checksum = crc; | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -44,12 +44,12 @@ | |||||
typedef enum image_type | typedef enum image_type | ||||
{ | { | ||||
IMAGE_BINARY, /* plain binary */ | |||||
IMAGE_IHEX, /* intel hex-record format */ | |||||
IMAGE_MEMORY, /* target-memory pseudo-image */ | |||||
IMAGE_ELF, /* ELF binary */ | |||||
IMAGE_SRECORD, /* motorola s19 */ | |||||
IMAGE_BUILDER, /* when building a new image */ | |||||
IMAGE_BINARY, /* plain binary */ | |||||
IMAGE_IHEX, /* intel hex-record format */ | |||||
IMAGE_MEMORY, /* target-memory pseudo-image */ | |||||
IMAGE_ELF, /* ELF binary */ | |||||
IMAGE_SRECORD, /* motorola s19 */ | |||||
IMAGE_BUILDER, /* when building a new image */ | |||||
} image_type_t; | } image_type_t; | ||||
typedef struct image_section_s | typedef struct image_section_s | ||||
@@ -320,7 +320,7 @@ reg_cache_t *mips32_build_reg_cache(target_t *target) | |||||
return cache; | return cache; | ||||
} | } | ||||
int mips32_init_arch_info(target_t *target, mips32_common_t *mips32, jtag_tap_t *tap, const char *variant) | |||||
int mips32_init_arch_info(target_t *target, mips32_common_t *mips32, jtag_tap_t *tap) | |||||
{ | { | ||||
target->arch_info = mips32; | target->arch_info = mips32; | ||||
mips32->common_magic = MIPS32_COMMON_MAGIC; | mips32->common_magic = MIPS32_COMMON_MAGIC; | ||||
@@ -119,7 +119,7 @@ typedef struct mips32_core_reg_s | |||||
#define MIPS32_DRET 0x4200001F | #define MIPS32_DRET 0x4200001F | ||||
extern int mips32_arch_state(struct target_s *target); | extern int mips32_arch_state(struct target_s *target); | ||||
extern int mips32_init_arch_info(target_t *target, mips32_common_t *mips32, jtag_tap_t *tap, const char *variant); | |||||
extern int mips32_init_arch_info(target_t *target, mips32_common_t *mips32, jtag_tap_t *tap); | |||||
extern int mips32_restore_context(target_t *target); | extern int mips32_restore_context(target_t *target); | ||||
extern int mips32_save_context(target_t *target); | extern int mips32_save_context(target_t *target); | ||||
extern reg_cache_t *mips32_build_reg_cache(target_t *target); | extern reg_cache_t *mips32_build_reg_cache(target_t *target); | ||||
@@ -182,7 +182,7 @@ begin_ejtag_dma_read_b: | |||||
return ERROR_JTAG_DEVICE_ERROR; | return ERROR_JTAG_DEVICE_ERROR; | ||||
} | } | ||||
// Handle the bigendian/littleendian | |||||
/* Handle the bigendian/littleendian */ | |||||
switch (addr & 0x3) { | switch (addr & 0x3) { | ||||
case 0: | case 0: | ||||
*data = v & 0xff; | *data = v & 0xff; | ||||
@@ -27,10 +27,10 @@ | |||||
#include "mips_ejtag.h" | #include "mips_ejtag.h" | ||||
#define EJTAG_CTRL_DMA_BYTE 0x00000000 | |||||
#define EJTAG_CTRL_DMA_HALFWORD 0x00000080 | |||||
#define EJTAG_CTRL_DMA_WORD 0x00000100 | |||||
#define EJTAG_CTRL_DMA_TRIPLEBYTE 0x00000180 | |||||
#define EJTAG_CTRL_DMA_BYTE 0x00000000 | |||||
#define EJTAG_CTRL_DMA_HALFWORD 0x00000080 | |||||
#define EJTAG_CTRL_DMA_WORD 0x00000100 | |||||
#define EJTAG_CTRL_DMA_TRIPLEBYTE 0x00000180 | |||||
#define RETRY_ATTEMPTS 0 | #define RETRY_ATTEMPTS 0 | ||||
@@ -45,9 +45,4 @@ extern int mips32_dmaacc_write_mem8(mips_ejtag_t *ejtag_info, u32 addr, int coun | |||||
extern int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf); | extern int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf); | ||||
extern int mips32_dmaacc_write_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf); | extern int mips32_dmaacc_write_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf); | ||||
#if 0 | |||||
extern int mips32_dmaacc_read_regs(mips_ejtag_t *ejtag_info, u32 *regs); | |||||
extern int mips32_dmaacc_write_regs(mips_ejtag_t *ejtag_info, u32 *regs); | |||||
#endif | |||||
#endif | #endif |
@@ -34,7 +34,7 @@ | |||||
#define UPPER16(u32) (u32 >> 16) | #define UPPER16(u32) (u32 >> 16) | ||||
#define LOWER16(u32) (u32 & 0xFFFF) | #define LOWER16(u32) (u32 & 0xFFFF) | ||||
#define NEG16(v) (((~(v)) + 1) & 0xFFFF) | #define NEG16(v) (((~(v)) + 1) & 0xFFFF) | ||||
//#define NEG18(v) ( ((~(v)) + 1) & 0x3FFFF ) | |||||
/*#define NEG18(v) ( ((~(v)) + 1) & 0x3FFFF )*/ | |||||
extern int mips32_pracc_read_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf); | extern int mips32_pracc_read_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf); | ||||
extern int mips32_pracc_write_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf); | extern int mips32_pracc_write_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf); | ||||
@@ -265,7 +265,6 @@ int mips_m4k_assert_reset(target_t *target) | |||||
{ | { | ||||
mips32_common_t *mips32 = target->arch_info; | mips32_common_t *mips32 = target->arch_info; | ||||
mips_ejtag_t *ejtag_info = &mips32->ejtag_info; | mips_ejtag_t *ejtag_info = &mips32->ejtag_info; | ||||
mips_m4k_common_t *mips_m4k = mips32->arch_info; | |||||
LOG_DEBUG("target->state: %s", | LOG_DEBUG("target->state: %s", | ||||
Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name); | Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name); | ||||
@@ -288,7 +287,7 @@ int mips_m4k_assert_reset(target_t *target) | |||||
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT, NULL); | mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT, NULL); | ||||
} | } | ||||
if (strcmp(mips_m4k->variant, "ejtag_srst") == 0) | |||||
if (strcmp(target->variant, "ejtag_srst") == 0) | |||||
{ | { | ||||
u32 ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_PRRST | EJTAG_CTRL_PERRST; | u32 ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_PRRST | EJTAG_CTRL_PERRST; | ||||
LOG_DEBUG("Using EJTAG reset (PRRST) to reset processor..."); | LOG_DEBUG("Using EJTAG reset (PRRST) to reset processor..."); | ||||
@@ -735,23 +734,14 @@ int mips_m4k_quit(void) | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int mips_m4k_init_arch_info(target_t *target, mips_m4k_common_t *mips_m4k, jtag_tap_t *tap, const char *variant) | |||||
int mips_m4k_init_arch_info(target_t *target, mips_m4k_common_t *mips_m4k, jtag_tap_t *tap) | |||||
{ | { | ||||
mips32_common_t *mips32 = &mips_m4k->mips32_common; | mips32_common_t *mips32 = &mips_m4k->mips32_common; | ||||
if (variant) | |||||
{ | |||||
mips_m4k->variant = strdup(variant); | |||||
} | |||||
else | |||||
{ | |||||
mips_m4k->variant = strdup(""); | |||||
} | |||||
mips_m4k->common_magic = MIPSM4K_COMMON_MAGIC; | mips_m4k->common_magic = MIPSM4K_COMMON_MAGIC; | ||||
/* initialize mips4k specific info */ | /* initialize mips4k specific info */ | ||||
mips32_init_arch_info(target, mips32, tap, variant); | |||||
mips32_init_arch_info(target, mips32, tap); | |||||
mips32->arch_info = mips_m4k; | mips32->arch_info = mips_m4k; | ||||
return ERROR_OK; | return ERROR_OK; | ||||
@@ -761,7 +751,7 @@ int mips_m4k_target_create(struct target_s *target, Jim_Interp *interp) | |||||
{ | { | ||||
mips_m4k_common_t *mips_m4k = calloc(1,sizeof(mips_m4k_common_t)); | mips_m4k_common_t *mips_m4k = calloc(1,sizeof(mips_m4k_common_t)); | ||||
mips_m4k_init_arch_info(target, mips_m4k, target->tap, target->variant); | |||||
mips_m4k_init_arch_info(target, mips_m4k, target->tap); | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -32,8 +32,6 @@ typedef struct mips_m4k_common_s | |||||
{ | { | ||||
int common_magic; | int common_magic; | ||||
mips32_common_t mips32_common; | mips32_common_t mips32_common; | ||||
char *variant; | |||||
} mips_m4k_common_t; | } mips_m4k_common_t; | ||||
extern int mips_m4k_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer); | extern int mips_m4k_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer); | ||||
@@ -61,19 +61,19 @@ int oocd_trace_read_reg(oocd_trace_t *oocd_trace, int reg, u32 *value) | |||||
int oocd_trace_write_reg(oocd_trace_t *oocd_trace, int reg, u32 value) | int oocd_trace_write_reg(oocd_trace_t *oocd_trace, int reg, u32 value) | ||||
{ | { | ||||
size_t bytes_written; | |||||
u8 data[5]; | |||||
size_t bytes_written; | |||||
u8 data[5]; | |||||
data[0] = 0x18 | (reg & 0x7); | |||||
data[1] = value & 0xff; | |||||
data[2] = (value & 0xff00) >> 8; | |||||
data[3] = (value & 0xff0000) >> 16; | |||||
data[4] = (value & 0xff000000) >> 24; | |||||
data[0] = 0x18 | (reg & 0x7); | |||||
data[1] = value & 0xff; | |||||
data[2] = (value & 0xff00) >> 8; | |||||
data[3] = (value & 0xff0000) >> 16; | |||||
data[4] = (value & 0xff000000) >> 24; | |||||
bytes_written = write(oocd_trace->tty_fd, data, 5); | |||||
LOG_DEBUG("reg #%i: 0x%8.8x\n", reg, value); | |||||
bytes_written = write(oocd_trace->tty_fd, data, 5); | |||||
LOG_DEBUG("reg #%i: 0x%8.8x\n", reg, value); | |||||
return ERROR_OK; | |||||
return ERROR_OK; | |||||
} | } | ||||
int oocd_trace_read_memory(oocd_trace_t *oocd_trace, u8 *data, u32 address, u32 size) | int oocd_trace_read_memory(oocd_trace_t *oocd_trace, u8 *data, u32 address, u32 size) | ||||
@@ -143,7 +143,7 @@ int oocd_trace_init(etm_context_t *etm_ctx) | |||||
* read up any leftover characters to ensure communication is in sync */ | * read up any leftover characters to ensure communication is in sync */ | ||||
while ((bytes_read = read(oocd_trace->tty_fd, trash, sizeof(trash))) > 0) | while ((bytes_read = read(oocd_trace->tty_fd, trash, sizeof(trash))) > 0) | ||||
{ | { | ||||
LOG_DEBUG("%i bytes read\n", bytes_read); | |||||
LOG_DEBUG("%i bytes read\n", bytes_read); | |||||
}; | }; | ||||
return ERROR_OK; | return ERROR_OK; | ||||
@@ -190,8 +190,8 @@ int oocd_trace_read_trace(etm_context_t *etm_ctx) | |||||
u8 *trace_data; | u8 *trace_data; | ||||
int i; | int i; | ||||
oocd_trace_read_reg(oocd_trace, OOCD_TRACE_STATUS, &status); | |||||
oocd_trace_read_reg(oocd_trace, OOCD_TRACE_ADDRESS, &address); | |||||
oocd_trace_read_reg(oocd_trace, OOCD_TRACE_STATUS, &status); | |||||
oocd_trace_read_reg(oocd_trace, OOCD_TRACE_ADDRESS, &address); | |||||
/* check if we overflowed, and adjust first frame of the trace accordingly | /* check if we overflowed, and adjust first frame of the trace accordingly | ||||
* if we didn't overflow, read only up to the frame that would be written next, | * if we didn't overflow, read only up to the frame that would be written next, | ||||
@@ -30,12 +30,12 @@ | |||||
/* registers */ | /* registers */ | ||||
enum | enum | ||||
{ | { | ||||
OOCD_TRACE_ID = 0x7, | |||||
OOCD_TRACE_ADDRESS = 0x0, | |||||
OOCD_TRACE_TRIGGER_COUNTER = 0x01, | |||||
OOCD_TRACE_CONTROL = 0x2, | |||||
OOCD_TRACE_STATUS = 0x3, | |||||
OOCD_TRACE_SDRAM_COUNTER = 0x4, | |||||
OOCD_TRACE_ID = 0x7, | |||||
OOCD_TRACE_ADDRESS = 0x0, | |||||
OOCD_TRACE_TRIGGER_COUNTER = 0x01, | |||||
OOCD_TRACE_CONTROL = 0x2, | |||||
OOCD_TRACE_STATUS = 0x3, | |||||
OOCD_TRACE_SDRAM_COUNTER = 0x4, | |||||
}; | }; | ||||
/* commands */ | /* commands */ | ||||
@@ -107,8 +107,6 @@ reg_arch_type_t* register_get_arch_type(int id) | |||||
return NULL; | return NULL; | ||||
} | } | ||||
static int register_get_dummy_core_reg(reg_t *reg) | static int register_get_dummy_core_reg(reg_t *reg) | ||||
{ | { | ||||
return ERROR_OK; | return ERROR_OK; | ||||
@@ -70,4 +70,3 @@ extern reg_arch_type_t* register_get_arch_type(int id); | |||||
extern void register_init_dummy(reg_t *reg); | extern void register_init_dummy(reg_t *reg); | ||||
#endif /* REGISTER_H */ | #endif /* REGISTER_H */ | ||||
@@ -61,7 +61,6 @@ | |||||
int cli_target_callback_event_handler(struct target_s *target, enum target_event event, void *priv); | int cli_target_callback_event_handler(struct target_s *target, enum target_event event, void *priv); | ||||
int handle_targets_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); | int handle_targets_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); | ||||
int handle_reg_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); | int handle_reg_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); | ||||
@@ -90,8 +89,6 @@ static int jim_target( Jim_Interp *interp, int argc, Jim_Obj *const *argv); | |||||
static int target_array2mem(Jim_Interp *interp, target_t *target, int argc, Jim_Obj *const *argv); | static int target_array2mem(Jim_Interp *interp, target_t *target, int argc, Jim_Obj *const *argv); | ||||
static int target_mem2array(Jim_Interp *interp, target_t *target, int argc, Jim_Obj *const *argv); | static int target_mem2array(Jim_Interp *interp, target_t *target, int argc, Jim_Obj *const *argv); | ||||
/* targets */ | /* targets */ | ||||
extern target_type_t arm7tdmi_target; | extern target_type_t arm7tdmi_target; | ||||
extern target_type_t arm720t_target; | extern target_type_t arm720t_target; | ||||
@@ -166,18 +163,15 @@ const Jim_Nvp nvp_target_event[] = { | |||||
{ .value = TARGET_EVENT_OLD_gdb_program_config , .name = "old-gdb_program_config" }, | { .value = TARGET_EVENT_OLD_gdb_program_config , .name = "old-gdb_program_config" }, | ||||
{ .value = TARGET_EVENT_OLD_pre_resume , .name = "old-pre_resume" }, | { .value = TARGET_EVENT_OLD_pre_resume , .name = "old-pre_resume" }, | ||||
{ .value = TARGET_EVENT_EARLY_HALTED, .name = "early-halted" }, | { .value = TARGET_EVENT_EARLY_HALTED, .name = "early-halted" }, | ||||
{ .value = TARGET_EVENT_HALTED, .name = "halted" }, | { .value = TARGET_EVENT_HALTED, .name = "halted" }, | ||||
{ .value = TARGET_EVENT_RESUMED, .name = "resumed" }, | { .value = TARGET_EVENT_RESUMED, .name = "resumed" }, | ||||
{ .value = TARGET_EVENT_RESUME_START, .name = "resume-start" }, | { .value = TARGET_EVENT_RESUME_START, .name = "resume-start" }, | ||||
{ .value = TARGET_EVENT_RESUME_END, .name = "resume-end" }, | { .value = TARGET_EVENT_RESUME_END, .name = "resume-end" }, | ||||
{ .name = "gdb-start", .value = TARGET_EVENT_GDB_START }, | { .name = "gdb-start", .value = TARGET_EVENT_GDB_START }, | ||||
{ .name = "gdb-end", .value = TARGET_EVENT_GDB_END }, | { .name = "gdb-end", .value = TARGET_EVENT_GDB_END }, | ||||
/* historical name */ | /* historical name */ | ||||
{ .value = TARGET_EVENT_RESET_START, .name = "reset-start" }, | { .value = TARGET_EVENT_RESET_START, .name = "reset-start" }, | ||||
@@ -193,21 +187,15 @@ const Jim_Nvp nvp_target_event[] = { | |||||
{ .value = TARGET_EVENT_RESET_INIT , .name = "reset-init" }, | { .value = TARGET_EVENT_RESET_INIT , .name = "reset-init" }, | ||||
{ .value = TARGET_EVENT_RESET_END, .name = "reset-end" }, | { .value = TARGET_EVENT_RESET_END, .name = "reset-end" }, | ||||
{ .value = TARGET_EVENT_EXAMINE_START, .name = "examine-start" }, | { .value = TARGET_EVENT_EXAMINE_START, .name = "examine-start" }, | ||||
{ .value = TARGET_EVENT_EXAMINE_END, .name = "examine-end" }, | { .value = TARGET_EVENT_EXAMINE_END, .name = "examine-end" }, | ||||
{ .value = TARGET_EVENT_DEBUG_HALTED, .name = "debug-halted" }, | { .value = TARGET_EVENT_DEBUG_HALTED, .name = "debug-halted" }, | ||||
{ .value = TARGET_EVENT_DEBUG_RESUMED, .name = "debug-resumed" }, | { .value = TARGET_EVENT_DEBUG_RESUMED, .name = "debug-resumed" }, | ||||
{ .value = TARGET_EVENT_GDB_ATTACH, .name = "gdb-attach" }, | { .value = TARGET_EVENT_GDB_ATTACH, .name = "gdb-attach" }, | ||||
{ .value = TARGET_EVENT_GDB_DETACH, .name = "gdb-detach" }, | { .value = TARGET_EVENT_GDB_DETACH, .name = "gdb-detach" }, | ||||
{ .value = TARGET_EVENT_GDB_FLASH_WRITE_START, .name = "gdb-flash-write-start" }, | { .value = TARGET_EVENT_GDB_FLASH_WRITE_START, .name = "gdb-flash-write-start" }, | ||||
{ .value = TARGET_EVENT_GDB_FLASH_WRITE_END , .name = "gdb-flash-write-end" }, | { .value = TARGET_EVENT_GDB_FLASH_WRITE_END , .name = "gdb-flash-write-end" }, | ||||
@@ -230,7 +218,6 @@ const Jim_Nvp nvp_target_state[] = { | |||||
{ .name = NULL, .value = -1 }, | { .name = NULL, .value = -1 }, | ||||
}; | }; | ||||
const Jim_Nvp nvp_target_debug_reason [] = { | const Jim_Nvp nvp_target_debug_reason [] = { | ||||
{ .name = "debug-request" , .value = DBG_REASON_DBGRQ }, | { .name = "debug-request" , .value = DBG_REASON_DBGRQ }, | ||||
{ .name = "breakpoint" , .value = DBG_REASON_BREAKPOINT }, | { .name = "breakpoint" , .value = DBG_REASON_BREAKPOINT }, | ||||
@@ -247,7 +234,7 @@ const Jim_Nvp nvp_target_endian[] = { | |||||
{ .name = "big", .value = TARGET_BIG_ENDIAN }, | { .name = "big", .value = TARGET_BIG_ENDIAN }, | ||||
{ .name = "little", .value = TARGET_LITTLE_ENDIAN }, | { .name = "little", .value = TARGET_LITTLE_ENDIAN }, | ||||
{ .name = "be", .value = TARGET_BIG_ENDIAN }, | { .name = "be", .value = TARGET_BIG_ENDIAN }, | ||||
{ .name = "le", .value = TARGET_LITTLE_ENDIAN }, | |||||
{ .name = "le", .value = TARGET_LITTLE_ENDIAN }, | |||||
{ .name = NULL, .value = -1 }, | { .name = NULL, .value = -1 }, | ||||
}; | }; | ||||
@@ -378,7 +365,6 @@ target_t* get_current_target(command_context_t *cmd_ctx) | |||||
return target; | return target; | ||||
} | } | ||||
int target_poll(struct target_s *target) | int target_poll(struct target_s *target) | ||||
{ | { | ||||
/* We can't poll until after examine */ | /* We can't poll until after examine */ | ||||
@@ -422,7 +408,6 @@ int target_resume(struct target_s *target, int current, u32 address, int handle_ | |||||
return retval; | return retval; | ||||
} | } | ||||
int target_process_reset(struct command_context_s *cmd_ctx, enum target_reset_mode reset_mode) | int target_process_reset(struct command_context_s *cmd_ctx, enum target_reset_mode reset_mode) | ||||
{ | { | ||||
char buf[100]; | char buf[100]; | ||||
@@ -448,7 +433,6 @@ int target_process_reset(struct command_context_s *cmd_ctx, enum target_reset_mo | |||||
return retval; | return retval; | ||||
} | } | ||||
static int default_virt2phys(struct target_s *target, u32 virtual, u32 *physical) | static int default_virt2phys(struct target_s *target, u32 virtual, u32 *physical) | ||||
{ | { | ||||
*physical = virtual; | *physical = virtual; | ||||
@@ -467,7 +451,6 @@ static int default_examine(struct target_s *target) | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
/* Targets that correctly implement init+examine, i.e. | /* Targets that correctly implement init+examine, i.e. | ||||
* no communication with target during init: | * no communication with target during init: | ||||
* | * | ||||
@@ -563,7 +546,6 @@ int target_init(struct command_context_s *cmd_ctx) | |||||
target->type->run_algorithm_imp = target->type->run_algorithm; | target->type->run_algorithm_imp = target->type->run_algorithm; | ||||
target->type->run_algorithm = target_run_algorithm_imp; | target->type->run_algorithm = target_run_algorithm_imp; | ||||
if (target->type->mmu == NULL) | if (target->type->mmu == NULL) | ||||
{ | { | ||||
target->type->mmu = default_mmu; | target->type->mmu = default_mmu; | ||||
@@ -709,7 +691,6 @@ int target_call_event_callbacks(target_t *target, enum target_event event) | |||||
target_call_event_callbacks(target, TARGET_EVENT_EARLY_HALTED); | target_call_event_callbacks(target, TARGET_EVENT_EARLY_HALTED); | ||||
} | } | ||||
LOG_DEBUG("target event %i (%s)", | LOG_DEBUG("target event %i (%s)", | ||||
event, | event, | ||||
Jim_Nvp_value2name_simple( nvp_target_event, event )->name ); | Jim_Nvp_value2name_simple( nvp_target_event, event )->name ); | ||||
@@ -1051,7 +1032,6 @@ int target_write_buffer(struct target_s *target, u32 address, u32 size, u8 *buff | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
/* Single aligned words are guaranteed to use 16 or 32 bit access | /* Single aligned words are guaranteed to use 16 or 32 bit access | ||||
* mode respectively, otherwise data is handled as quickly as | * mode respectively, otherwise data is handled as quickly as | ||||
* possible | * possible | ||||
@@ -1347,7 +1327,6 @@ int target_register_user_commands(struct command_context_s *cmd_ctx) | |||||
if((retval = trace_register_commands(cmd_ctx)) != ERROR_OK) | if((retval = trace_register_commands(cmd_ctx)) != ERROR_OK) | ||||
return retval; | return retval; | ||||
return retval; | return retval; | ||||
} | } | ||||
@@ -1387,7 +1366,7 @@ int handle_targets_command(struct command_context_s *cmd_ctx, char *cmd, char ** | |||||
} | } | ||||
DumpTargets: | DumpTargets: | ||||
target = all_targets; | |||||
target = all_targets; | |||||
command_print(cmd_ctx, " CmdName Type Endian AbsChainPos Name State "); | command_print(cmd_ctx, " CmdName Type Endian AbsChainPos Name State "); | ||||
command_print(cmd_ctx, "-- ---------- ---------- ---------- ----------- ------------- ----------"); | command_print(cmd_ctx, "-- ---------- ---------- ---------- ----------- ------------- ----------"); | ||||
while (target) | while (target) | ||||
@@ -1407,8 +1386,7 @@ DumpTargets: | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
// every 300ms we check for reset & powerdropout and issue a "reset halt" if | |||||
// so. | |||||
/* every 300ms we check for reset & powerdropout and issue a "reset halt" if so. */ | |||||
static int powerDropout; | static int powerDropout; | ||||
static int srstAsserted; | static int srstAsserted; | ||||
@@ -1476,7 +1454,6 @@ static int sense_handler(void) | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
/* process target state changes */ | /* process target state changes */ | ||||
int handle_target(void *priv) | int handle_target(void *priv) | ||||
{ | { | ||||
@@ -1546,7 +1523,6 @@ int handle_target(void *priv) | |||||
target = target->next; | target = target->next; | ||||
} | } | ||||
return retval; | return retval; | ||||
} | } | ||||
@@ -1661,7 +1637,6 @@ int handle_reg_command(struct command_context_s *cmd_ctx, char *cmd, char **args | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int handle_poll_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) | int handle_poll_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) | ||||
{ | { | ||||
int retval = ERROR_OK; | int retval = ERROR_OK; | ||||
@@ -1694,7 +1669,6 @@ int handle_poll_command(struct command_context_s *cmd_ctx, char *cmd, char **arg | |||||
return ERROR_COMMAND_SYNTAX_ERROR; | return ERROR_COMMAND_SYNTAX_ERROR; | ||||
} | } | ||||
return retval; | return retval; | ||||
} | } | ||||
@@ -1739,14 +1713,14 @@ int target_wait_state(target_t *target, enum target_state state, int ms) | |||||
{ | { | ||||
once=0; | once=0; | ||||
LOG_DEBUG("waiting for target %s...", | LOG_DEBUG("waiting for target %s...", | ||||
Jim_Nvp_value2name_simple(nvp_target_state,state)->name); | |||||
Jim_Nvp_value2name_simple(nvp_target_state,state)->name); | |||||
} | } | ||||
gettimeofday(&now, NULL); | gettimeofday(&now, NULL); | ||||
if ((now.tv_sec > timeout.tv_sec) || ((now.tv_sec == timeout.tv_sec) && (now.tv_usec >= timeout.tv_usec))) | if ((now.tv_sec > timeout.tv_sec) || ((now.tv_sec == timeout.tv_sec) && (now.tv_usec >= timeout.tv_usec))) | ||||
{ | { | ||||
LOG_ERROR("timed out while waiting for target %s", | LOG_ERROR("timed out while waiting for target %s", | ||||
Jim_Nvp_value2name_simple(nvp_target_state,state)->name); | |||||
Jim_Nvp_value2name_simple(nvp_target_state,state)->name); | |||||
return ERROR_FAIL; | return ERROR_FAIL; | ||||
} | } | ||||
} | } | ||||
@@ -1858,7 +1832,6 @@ int handle_md_command(struct command_context_s *cmd_ctx, char *cmd, char **args, | |||||
address = strtoul(args[0], NULL, 0); | address = strtoul(args[0], NULL, 0); | ||||
switch (cmd[2]) | switch (cmd[2]) | ||||
{ | { | ||||
case 'w': | case 'w': | ||||
@@ -2025,7 +1998,6 @@ int handle_load_image_command(struct command_context_s *cmd_ctx, char *cmd, char | |||||
return ERROR_COMMAND_SYNTAX_ERROR; | return ERROR_COMMAND_SYNTAX_ERROR; | ||||
} | } | ||||
duration_start_measure(&duration); | duration_start_measure(&duration); | ||||
if (image_open(&image, args[0], (argc >= 3) ? args[2] : NULL) != ERROR_OK) | if (image_open(&image, args[0], (argc >= 3) ? args[2] : NULL) != ERROR_OK) | ||||
@@ -2053,7 +2025,6 @@ int handle_load_image_command(struct command_context_s *cmd_ctx, char *cmd, char | |||||
u32 offset=0; | u32 offset=0; | ||||
u32 length=buf_cnt; | u32 length=buf_cnt; | ||||
/* DANGER!!! beware of unsigned comparision here!!! */ | /* DANGER!!! beware of unsigned comparision here!!! */ | ||||
if ((image.sections[i].base_address+buf_cnt>=min_address)&& | if ((image.sections[i].base_address+buf_cnt>=min_address)&& | ||||
@@ -2470,6 +2441,7 @@ int handle_virt2phys_command(command_context_t *cmd_ctx, char *cmd, char **args, | |||||
} | } | ||||
return retval; | return retval; | ||||
} | } | ||||
static void writeLong(FILE *f, int l) | static void writeLong(FILE *f, int l) | ||||
{ | { | ||||
int i; | int i; | ||||
@@ -2480,14 +2452,13 @@ static void writeLong(FILE *f, int l) | |||||
} | } | ||||
} | } | ||||
static void writeString(FILE *f, char *s) | static void writeString(FILE *f, char *s) | ||||
{ | { | ||||
fwrite(s, 1, strlen(s), f); | fwrite(s, 1, strlen(s), f); | ||||
} | } | ||||
// Dump a gmon.out histogram file. | |||||
/* Dump a gmon.out histogram file. */ | |||||
static void writeGmon(u32 *samples, int sampleNum, char *filename) | static void writeGmon(u32 *samples, int sampleNum, char *filename) | ||||
{ | { | ||||
int i; | int i; | ||||
@@ -2495,14 +2466,14 @@ static void writeGmon(u32 *samples, int sampleNum, char *filename) | |||||
if (f==NULL) | if (f==NULL) | ||||
return; | return; | ||||
fwrite("gmon", 1, 4, f); | fwrite("gmon", 1, 4, f); | ||||
writeLong(f, 0x00000001); // Version | |||||
writeLong(f, 0); // padding | |||||
writeLong(f, 0); // padding | |||||
writeLong(f, 0); // padding | |||||
writeLong(f, 0x00000001); /* Version */ | |||||
writeLong(f, 0); /* padding */ | |||||
writeLong(f, 0); /* padding */ | |||||
writeLong(f, 0); /* padding */ | |||||
fwrite("", 1, 1, f); // GMON_TAG_TIME_HIST | |||||
fwrite("", 1, 1, f); /* GMON_TAG_TIME_HIST */ | |||||
// figure out bucket size | |||||
/* figure out bucket size */ | |||||
u32 min=samples[0]; | u32 min=samples[0]; | ||||
u32 max=samples[0]; | u32 max=samples[0]; | ||||
for (i=0; i<sampleNum; i++) | for (i=0; i<sampleNum; i++) | ||||
@@ -2519,7 +2490,7 @@ static void writeGmon(u32 *samples, int sampleNum, char *filename) | |||||
int addressSpace=(max-min+1); | int addressSpace=(max-min+1); | ||||
static int const maxBuckets=256*1024; // maximum buckets. | |||||
static int const maxBuckets=256*1024; /* maximum buckets. */ | |||||
int length=addressSpace; | int length=addressSpace; | ||||
if (length > maxBuckets) | if (length > maxBuckets) | ||||
{ | { | ||||
@@ -2538,23 +2509,23 @@ static void writeGmon(u32 *samples, int sampleNum, char *filename) | |||||
long long a=address-min; | long long a=address-min; | ||||
long long b=length-1; | long long b=length-1; | ||||
long long c=addressSpace-1; | long long c=addressSpace-1; | ||||
int index=(a*b)/c; // danger!!!! int32 overflows | |||||
int index=(a*b)/c; /* danger!!!! int32 overflows */ | |||||
buckets[index]++; | buckets[index]++; | ||||
} | } | ||||
// append binary memory gmon.out &profile_hist_hdr ((char*)&profile_hist_hdr + sizeof(struct gmon_hist_hdr)) | |||||
writeLong(f, min); // low_pc | |||||
writeLong(f, max); // high_pc | |||||
writeLong(f, length); // # of samples | |||||
writeLong(f, 64000000); // 64MHz | |||||
/* append binary memory gmon.out &profile_hist_hdr ((char*)&profile_hist_hdr + sizeof(struct gmon_hist_hdr)) */ | |||||
writeLong(f, min); /* low_pc */ | |||||
writeLong(f, max); /* high_pc */ | |||||
writeLong(f, length); /* # of samples */ | |||||
writeLong(f, 64000000); /* 64MHz */ | |||||
writeString(f, "seconds"); | writeString(f, "seconds"); | ||||
for (i=0; i<(15-strlen("seconds")); i++) | for (i=0; i<(15-strlen("seconds")); i++) | ||||
{ | { | ||||
fwrite("", 1, 1, f); // padding | |||||
fwrite("", 1, 1, f); /* padding */ | |||||
} | } | ||||
writeString(f, "s"); | writeString(f, "s"); | ||||
// append binary memory gmon.out profile_hist_data (profile_hist_data + profile_hist_hdr.hist_size) | |||||
/*append binary memory gmon.out profile_hist_data (profile_hist_data + profile_hist_hdr.hist_size) */ | |||||
char *data=malloc(2*length); | char *data=malloc(2*length); | ||||
if (data!=NULL) | if (data!=NULL) | ||||
@@ -2608,7 +2579,7 @@ int handle_profile_command(struct command_context_s *cmd_ctx, char *cmd, char ** | |||||
int numSamples=0; | int numSamples=0; | ||||
int retval=ERROR_OK; | int retval=ERROR_OK; | ||||
// hopefully it is safe to cache! We want to stop/restart as quickly as possible. | |||||
/* hopefully it is safe to cache! We want to stop/restart as quickly as possible. */ | |||||
reg_t *reg = register_get_by_name(target->reg_cache, "pc", 1); | reg_t *reg = register_get_by_name(target->reg_cache, "pc", 1); | ||||
for (;;) | for (;;) | ||||
@@ -2620,10 +2591,10 @@ int handle_profile_command(struct command_context_s *cmd_ctx, char *cmd, char ** | |||||
samples[numSamples++]=t; | samples[numSamples++]=t; | ||||
retval = target_resume(target, 1, 0, 0, 0); /* current pc, addr = 0, do not handle breakpoints, not debugging */ | retval = target_resume(target, 1, 0, 0, 0); /* current pc, addr = 0, do not handle breakpoints, not debugging */ | ||||
target_poll(target); | target_poll(target); | ||||
alive_sleep(10); // sleep 10ms, i.e. <100 samples/second. | |||||
alive_sleep(10); /* sleep 10ms, i.e. <100 samples/second. */ | |||||
} else if (target->state == TARGET_RUNNING) | } else if (target->state == TARGET_RUNNING) | ||||
{ | { | ||||
// We want to quickly sample the PC. | |||||
/* We want to quickly sample the PC. */ | |||||
if((retval = target_halt(target)) != ERROR_OK) | if((retval = target_halt(target)) != ERROR_OK) | ||||
{ | { | ||||
free(samples); | free(samples); | ||||
@@ -2898,7 +2869,6 @@ static int jim_array2mem(Jim_Interp *interp, int argc, Jim_Obj *const *argv) | |||||
return target_array2mem( interp,target, argc, argv ); | return target_array2mem( interp,target, argc, argv ); | ||||
} | } | ||||
static int target_array2mem(Jim_Interp *interp, target_t *target, int argc, Jim_Obj *const *argv) | static int target_array2mem(Jim_Interp *interp, target_t *target, int argc, Jim_Obj *const *argv) | ||||
{ | { | ||||
long l; | long l; | ||||
@@ -2983,7 +2953,6 @@ static int target_array2mem(Jim_Interp *interp, target_t *target, int argc, Jim_ | |||||
return JIM_ERR; | return JIM_ERR; | ||||
} | } | ||||
/* Transfer loop */ | /* Transfer loop */ | ||||
/* index counter */ | /* index counter */ | ||||
@@ -3031,15 +3000,13 @@ static int target_array2mem(Jim_Interp *interp, target_t *target, int argc, Jim_ | |||||
return JIM_OK; | return JIM_OK; | ||||
} | } | ||||
void | |||||
target_all_handle_event( enum target_event e ) | |||||
void target_all_handle_event( enum target_event e ) | |||||
{ | { | ||||
target_t *target; | target_t *target; | ||||
LOG_DEBUG( "**all*targets: event: %d, %s", | LOG_DEBUG( "**all*targets: event: %d, %s", | ||||
e, | |||||
Jim_Nvp_value2name_simple( nvp_target_event, e )->name ); | |||||
e, | |||||
Jim_Nvp_value2name_simple( nvp_target_event, e )->name ); | |||||
target = all_targets; | target = all_targets; | ||||
while (target){ | while (target){ | ||||
@@ -3048,8 +3015,7 @@ target_all_handle_event( enum target_event e ) | |||||
} | } | ||||
} | } | ||||
void | |||||
target_handle_event( target_t *target, enum target_event e ) | |||||
void target_handle_event( target_t *target, enum target_event e ) | |||||
{ | { | ||||
target_event_action_t *teap; | target_event_action_t *teap; | ||||
int done; | int done; | ||||
@@ -3093,7 +3059,6 @@ enum target_cfg_param { | |||||
TCFG_CHAIN_POSITION, | TCFG_CHAIN_POSITION, | ||||
}; | }; | ||||
static Jim_Nvp nvp_config_opts[] = { | static Jim_Nvp nvp_config_opts[] = { | ||||
{ .name = "-type", .value = TCFG_TYPE }, | { .name = "-type", .value = TCFG_TYPE }, | ||||
{ .name = "-event", .value = TCFG_EVENT }, | { .name = "-event", .value = TCFG_EVENT }, | ||||
@@ -3108,10 +3073,7 @@ static Jim_Nvp nvp_config_opts[] = { | |||||
{ .name = NULL, .value = -1 } | { .name = NULL, .value = -1 } | ||||
}; | }; | ||||
static int | |||||
target_configure( Jim_GetOptInfo *goi, | |||||
target_t *target ) | |||||
static int target_configure( Jim_GetOptInfo *goi, target_t *target ) | |||||
{ | { | ||||
Jim_Nvp *n; | Jim_Nvp *n; | ||||
Jim_Obj *o; | Jim_Obj *o; | ||||
@@ -3119,11 +3081,10 @@ target_configure( Jim_GetOptInfo *goi, | |||||
char *cp; | char *cp; | ||||
int e; | int e; | ||||
/* parse config or cget options ... */ | /* parse config or cget options ... */ | ||||
while( goi->argc > 0 ){ | while( goi->argc > 0 ){ | ||||
Jim_SetEmptyResult( goi->interp ); | Jim_SetEmptyResult( goi->interp ); | ||||
//Jim_GetOpt_Debug( goi ); | |||||
/* Jim_GetOpt_Debug( goi ); */ | |||||
if( target->type->target_jim_configure ){ | if( target->type->target_jim_configure ){ | ||||
/* target defines a configure function */ | /* target defines a configure function */ | ||||
@@ -3184,7 +3145,6 @@ target_configure( Jim_GetOptInfo *goi, | |||||
} | } | ||||
} | } | ||||
{ | { | ||||
target_event_action_t *teap; | target_event_action_t *teap; | ||||
@@ -3377,12 +3337,8 @@ target_configure( Jim_GetOptInfo *goi, | |||||
return JIM_OK; | return JIM_OK; | ||||
} | } | ||||
/** this is the 'tcl' handler for the target specific command */ | /** this is the 'tcl' handler for the target specific command */ | ||||
static int | |||||
tcl_target_func( Jim_Interp *interp, | |||||
int argc, | |||||
Jim_Obj *const *argv ) | |||||
static int tcl_target_func( Jim_Interp *interp, int argc, Jim_Obj *const *argv ) | |||||
{ | { | ||||
Jim_GetOptInfo goi; | Jim_GetOptInfo goi; | ||||
jim_wide a,b,c; | jim_wide a,b,c; | ||||
@@ -3393,7 +3349,6 @@ tcl_target_func( Jim_Interp *interp, | |||||
struct command_context_s *cmd_ctx; | struct command_context_s *cmd_ctx; | ||||
int e; | int e; | ||||
enum { | enum { | ||||
TS_CMD_CONFIGURE, | TS_CMD_CONFIGURE, | ||||
TS_CMD_CGET, | TS_CMD_CGET, | ||||
@@ -3436,7 +3391,6 @@ tcl_target_func( Jim_Interp *interp, | |||||
{ .name = NULL, .value = -1 }, | { .name = NULL, .value = -1 }, | ||||
}; | }; | ||||
/* go past the "command" */ | /* go past the "command" */ | ||||
Jim_GetOpt_Setup( &goi, interp, argc-1, argv+1 ); | Jim_GetOpt_Setup( &goi, interp, argc-1, argv+1 ); | ||||
@@ -3449,7 +3403,7 @@ tcl_target_func( Jim_Interp *interp, | |||||
Jim_GetOpt_NvpUnknown( &goi, target_options, 0 ); | Jim_GetOpt_NvpUnknown( &goi, target_options, 0 ); | ||||
return e; | return e; | ||||
} | } | ||||
// Assume blank result | |||||
/* Assume blank result */ | |||||
Jim_SetEmptyResult( goi.interp ); | Jim_SetEmptyResult( goi.interp ); | ||||
switch( n->value ){ | switch( n->value ){ | ||||
@@ -3680,17 +3634,17 @@ tcl_target_func( Jim_Interp *interp, | |||||
Jim_GetOpt_NvpUnknown( &goi, nvp_assert, 1 ); | Jim_GetOpt_NvpUnknown( &goi, nvp_assert, 1 ); | ||||
return e; | return e; | ||||
} | } | ||||
// the halt or not param | |||||
/* the halt or not param */ | |||||
e = Jim_GetOpt_Wide( &goi, &a); | e = Jim_GetOpt_Wide( &goi, &a); | ||||
if( e != JIM_OK ){ | if( e != JIM_OK ){ | ||||
return e; | return e; | ||||
} | } | ||||
// determine if we should halt or not. | |||||
/* determine if we should halt or not. */ | |||||
target->reset_halt = !!a; | target->reset_halt = !!a; | ||||
// When this happens - all workareas are invalid. | |||||
/* When this happens - all workareas are invalid. */ | |||||
target_free_all_working_areas_restore(target, 0); | target_free_all_working_areas_restore(target, 0); | ||||
// do the assert | |||||
/* do the assert */ | |||||
if( n->value == NVP_ASSERT ){ | if( n->value == NVP_ASSERT ){ | ||||
target->type->assert_reset( target ); | target->type->assert_reset( target ); | ||||
} else { | } else { | ||||
@@ -3705,7 +3659,7 @@ tcl_target_func( Jim_Interp *interp, | |||||
target->type->halt( target ); | target->type->halt( target ); | ||||
return JIM_OK; | return JIM_OK; | ||||
case TS_CMD_WAITSTATE: | case TS_CMD_WAITSTATE: | ||||
// params: <name> statename timeoutmsecs | |||||
/* params: <name> statename timeoutmsecs */ | |||||
if( goi.argc != 2 ){ | if( goi.argc != 2 ){ | ||||
Jim_SetResult_sprintf( goi.interp, "%s STATENAME TIMEOUTMSECS", n->name ); | Jim_SetResult_sprintf( goi.interp, "%s STATENAME TIMEOUTMSECS", n->name ); | ||||
return JIM_ERR; | return JIM_ERR; | ||||
@@ -3725,7 +3679,7 @@ tcl_target_func( Jim_Interp *interp, | |||||
"target: %s wait %s fails (%d) %s", | "target: %s wait %s fails (%d) %s", | ||||
target->cmd_name, | target->cmd_name, | ||||
n->name, | n->name, | ||||
e, target_strerror_safe(e) ); | |||||
e, target_strerror_safe(e) ); | |||||
return JIM_ERR; | return JIM_ERR; | ||||
} else { | } else { | ||||
return JIM_OK; | return JIM_OK; | ||||
@@ -3776,11 +3730,8 @@ tcl_target_func( Jim_Interp *interp, | |||||
return JIM_ERR; | return JIM_ERR; | ||||
} | } | ||||
static int | |||||
target_create( Jim_GetOptInfo *goi ) | |||||
static int target_create( Jim_GetOptInfo *goi ) | |||||
{ | { | ||||
Jim_Obj *new_cmd; | Jim_Obj *new_cmd; | ||||
Jim_Cmd *cmd; | Jim_Cmd *cmd; | ||||
const char *cp; | const char *cp; | ||||
@@ -3834,7 +3785,6 @@ target_create( Jim_GetOptInfo *goi ) | |||||
return JIM_ERR; | return JIM_ERR; | ||||
} | } | ||||
/* Create it */ | /* Create it */ | ||||
target = calloc(1,sizeof(target_t)); | target = calloc(1,sizeof(target_t)); | ||||
/* set target number */ | /* set target number */ | ||||
@@ -3892,6 +3842,10 @@ target_create( Jim_GetOptInfo *goi ) | |||||
target->endianness = TARGET_LITTLE_ENDIAN; | target->endianness = TARGET_LITTLE_ENDIAN; | ||||
} | } | ||||
/* incase variant is not set */ | |||||
if (!target->variant) | |||||
target->variant = strdup(""); | |||||
/* create the target specific commands */ | /* create the target specific commands */ | ||||
if( target->type->register_commands ){ | if( target->type->register_commands ){ | ||||
(*(target->type->register_commands))( cmd_ctx ); | (*(target->type->register_commands))( cmd_ctx ); | ||||
@@ -3924,8 +3878,7 @@ target_create( Jim_GetOptInfo *goi ) | |||||
return e; | return e; | ||||
} | } | ||||
static int | |||||
jim_target( Jim_Interp *interp, int argc, Jim_Obj *const *argv ) | |||||
static int jim_target( Jim_Interp *interp, int argc, Jim_Obj *const *argv ) | |||||
{ | { | ||||
int x,r,e; | int x,r,e; | ||||
jim_wide w; | jim_wide w; | ||||
@@ -3944,7 +3897,7 @@ jim_target( Jim_Interp *interp, int argc, Jim_Obj *const *argv ) | |||||
const char *target_cmds[] = { | const char *target_cmds[] = { | ||||
"create", "types", "names", "current", "number", | "create", "types", "names", "current", "number", | ||||
"count", | "count", | ||||
NULL // terminate | |||||
NULL /* terminate */ | |||||
}; | }; | ||||
LOG_DEBUG("Target command params:"); | LOG_DEBUG("Target command params:"); | ||||
@@ -3959,7 +3912,7 @@ jim_target( Jim_Interp *interp, int argc, Jim_Obj *const *argv ) | |||||
return JIM_ERR; | return JIM_ERR; | ||||
} | } | ||||
//Jim_GetOpt_Debug( &goi ); | |||||
/* Jim_GetOpt_Debug( &goi ); */ | |||||
r = Jim_GetOpt_Enum( &goi, target_cmds, &x ); | r = Jim_GetOpt_Enum( &goi, target_cmds, &x ); | ||||
if( r != JIM_OK ){ | if( r != JIM_OK ){ | ||||
return r; | return r; | ||||
@@ -40,15 +40,15 @@ | |||||
struct reg_s; | struct reg_s; | ||||
struct command_context_s; | struct command_context_s; | ||||
/* | /* | ||||
TARGET_UNKNOWN = 0: we don't know anything about the target yet | |||||
TARGET_RUNNING = 1: the target is executing user code | |||||
TARGET_HALTED = 2: the target is not executing code, and ready to talk to the | |||||
debugger. on an xscale it means that the debug handler is executing | |||||
TARGET_RESET = 3: the target is being held in reset (only a temporary state, | |||||
not sure how this is used with all the recent changes) | |||||
TARGET_DEBUG_RUNNING = 4: the target is running, but it is executing code on | |||||
behalf of the debugger (e.g. algorithm for flashing) | |||||
*/ | |||||
* TARGET_UNKNOWN = 0: we don't know anything about the target yet | |||||
* TARGET_RUNNING = 1: the target is executing user code | |||||
* TARGET_HALTED = 2: the target is not executing code, and ready to talk to the | |||||
* debugger. on an xscale it means that the debug handler is executing | |||||
* TARGET_RESET = 3: the target is being held in reset (only a temporary state, | |||||
* not sure how this is used with all the recent changes) | |||||
* TARGET_DEBUG_RUNNING = 4: the target is running, but it is executing code on | |||||
* behalf of the debugger (e.g. algorithm for flashing) */ | |||||
enum target_state | enum target_state | ||||
{ | { | ||||
TARGET_UNKNOWN = 0, | TARGET_UNKNOWN = 0, | ||||
@@ -228,7 +228,7 @@ typedef struct target_type_s | |||||
* | * | ||||
* It is illegal to talk to the target at this stage as this fn is invoked | * It is illegal to talk to the target at this stage as this fn is invoked | ||||
* before the JTAG chain has been examined/verified | * before the JTAG chain has been examined/verified | ||||
*/ | |||||
* */ | |||||
int (*init_target)(struct command_context_s *cmd_ctx, struct target_s *target); | int (*init_target)(struct command_context_s *cmd_ctx, struct target_s *target); | ||||
int (*quit)(void); | int (*quit)(void); | ||||
@@ -237,21 +237,21 @@ typedef struct target_type_s | |||||
} target_type_t; | } target_type_t; | ||||
// forward decloration | |||||
/* forward decloration */ | |||||
typedef struct target_event_action_s target_event_action_t; | typedef struct target_event_action_s target_event_action_t; | ||||
typedef struct target_s | typedef struct target_s | ||||
{ | { | ||||
target_type_t *type; /* target type definition (name, access functions) */ | target_type_t *type; /* target type definition (name, access functions) */ | ||||
const char *cmd_name; /* tcl Name of target */ | |||||
int target_number; /* generaly, target index but may not be in order */ | |||||
jtag_tap_t *tap; /* where on the jtag chain is this */ | |||||
const char *variant; /* what varient of this chip is it? */ | |||||
const char *cmd_name; /* tcl Name of target */ | |||||
int target_number; /* generaly, target index but may not be in order */ | |||||
jtag_tap_t *tap; /* where on the jtag chain is this */ | |||||
const char *variant; /* what varient of this chip is it? */ | |||||
target_event_action_t *event_action; | target_event_action_t *event_action; | ||||
int reset_halt; /* attempt resetting the CPU into the halted mode? */ | int reset_halt; /* attempt resetting the CPU into the halted mode? */ | ||||
u32 working_area; /* working area (initialized RAM). Evaluated | u32 working_area; /* working area (initialized RAM). Evaluated | ||||
upon first allocation from virtual/physical address. */ | |||||
* upon first allocation from virtual/physical address. */ | |||||
u32 working_area_virt; /* virtual address */ | u32 working_area_virt; /* virtual address */ | ||||
u32 working_area_phys; /* physical address */ | u32 working_area_phys; /* physical address */ | ||||
u32 working_area_size; /* size in bytes */ | u32 working_area_size; /* size in bytes */ | ||||
@@ -269,27 +269,27 @@ typedef struct target_s | |||||
void *arch_info; /* architecture specific information */ | void *arch_info; /* architecture specific information */ | ||||
struct target_s *next; /* next target in list */ | struct target_s *next; /* next target in list */ | ||||
int display; /* display async info in telnet session. Do not display | |||||
lots of halted/resumed info when stepping in debugger. */ | |||||
int display; /* display async info in telnet session. Do not display | |||||
* lots of halted/resumed info when stepping in debugger. */ | |||||
} target_t; | } target_t; | ||||
enum target_event | enum target_event | ||||
{ | { | ||||
// OLD historical names | |||||
// - Prior to the great TCL change | |||||
// - June/July/Aug 2008 | |||||
// - Duane Ellis | |||||
/* LD historical names | |||||
* - Prior to the great TCL change | |||||
* - June/July/Aug 2008 | |||||
* - Duane Ellis */ | |||||
TARGET_EVENT_OLD_gdb_program_config, | TARGET_EVENT_OLD_gdb_program_config, | ||||
TARGET_EVENT_OLD_pre_reset, | TARGET_EVENT_OLD_pre_reset, | ||||
TARGET_EVENT_OLD_post_reset, | TARGET_EVENT_OLD_post_reset, | ||||
TARGET_EVENT_OLD_pre_resume, | TARGET_EVENT_OLD_pre_resume, | ||||
/* allow GDB to do stuff before others handle the halted event, | /* allow GDB to do stuff before others handle the halted event, | ||||
this is in lieu of defining ordering of invocation of events, | |||||
which would be more complicated */ | |||||
TARGET_EVENT_EARLY_HALTED, | |||||
TARGET_EVENT_HALTED, /* target entered debug state from normal execution or reset */ | |||||
TARGET_EVENT_RESUMED, /* target resumed to normal execution */ | |||||
* this is in lieu of defining ordering of invocation of events, | |||||
* which would be more complicated */ | |||||
TARGET_EVENT_EARLY_HALTED, | |||||
TARGET_EVENT_HALTED, /* target entered debug state from normal execution or reset */ | |||||
TARGET_EVENT_RESUMED, /* target resumed to normal execution */ | |||||
TARGET_EVENT_RESUME_START, | TARGET_EVENT_RESUME_START, | ||||
TARGET_EVENT_RESUME_END, | TARGET_EVENT_RESUME_END, | ||||
@@ -308,14 +308,12 @@ enum target_event | |||||
TARGET_EVENT_RESET_INIT, | TARGET_EVENT_RESET_INIT, | ||||
TARGET_EVENT_RESET_END, | TARGET_EVENT_RESET_END, | ||||
TARGET_EVENT_DEBUG_HALTED, /* target entered debug state, but was executing on behalf of the debugger */ | |||||
TARGET_EVENT_DEBUG_RESUMED, /* target resumed to execute on behalf of the debugger */ | |||||
TARGET_EVENT_DEBUG_HALTED, /* target entered debug state, but was executing on behalf of the debugger */ | |||||
TARGET_EVENT_DEBUG_RESUMED, /* target resumed to execute on behalf of the debugger */ | |||||
TARGET_EVENT_EXAMINE_START, | TARGET_EVENT_EXAMINE_START, | ||||
TARGET_EVENT_EXAMINE_END, | TARGET_EVENT_EXAMINE_END, | ||||
TARGET_EVENT_GDB_ATTACH, | TARGET_EVENT_GDB_ATTACH, | ||||
TARGET_EVENT_GDB_DETACH, | TARGET_EVENT_GDB_DETACH, | ||||
@@ -330,7 +328,7 @@ extern const Jim_Nvp nvp_target_event[]; | |||||
struct target_event_action_s { | struct target_event_action_s { | ||||
enum target_event event; | enum target_event event; | ||||
Jim_Obj *body; | Jim_Obj *body; | ||||
int has_percent; | |||||
int has_percent; | |||||
target_event_action_t *next; | target_event_action_t *next; | ||||
}; | }; | ||||
@@ -428,7 +426,6 @@ int target_arch_state(struct target_s *target); | |||||
void target_handle_event( target_t *t, enum target_event e); | void target_handle_event( target_t *t, enum target_event e); | ||||
void target_all_handle_event( enum target_event e ); | void target_all_handle_event( enum target_event e ); | ||||
#define ERROR_TARGET_INVALID (-300) | #define ERROR_TARGET_INVALID (-300) | ||||
#define ERROR_TARGET_INIT_FAILED (-301) | #define ERROR_TARGET_INIT_FAILED (-301) | ||||
#define ERROR_TARGET_TIMEOUT (-302) | #define ERROR_TARGET_TIMEOUT (-302) | ||||
@@ -353,8 +353,6 @@ int xscale_receive(target_t *target, u32 *buffer, int num_words) | |||||
fields[1].in_check_value = NULL; | fields[1].in_check_value = NULL; | ||||
fields[1].in_check_mask = NULL; | fields[1].in_check_mask = NULL; | ||||
fields[2].tap = xscale->jtag_info.tap; | fields[2].tap = xscale->jtag_info.tap; | ||||
fields[2].num_bits = 1; | fields[2].num_bits = 1; | ||||
fields[2].out_value = NULL; | fields[2].out_value = NULL; | ||||
@@ -474,8 +472,6 @@ int xscale_read_tx(target_t *target, int consume) | |||||
fields[1].in_check_value = NULL; | fields[1].in_check_value = NULL; | ||||
fields[1].in_check_mask = NULL; | fields[1].in_check_mask = NULL; | ||||
fields[2].tap = xscale->jtag_info.tap; | fields[2].tap = xscale->jtag_info.tap; | ||||
fields[2].num_bits = 1; | fields[2].num_bits = 1; | ||||
fields[2].out_value = NULL; | fields[2].out_value = NULL; | ||||
@@ -572,8 +568,6 @@ int xscale_write_rx(target_t *target) | |||||
fields[1].in_check_value = NULL; | fields[1].in_check_value = NULL; | ||||
fields[1].in_check_mask = NULL; | fields[1].in_check_mask = NULL; | ||||
fields[2].tap = xscale->jtag_info.tap; | fields[2].tap = xscale->jtag_info.tap; | ||||
fields[2].num_bits = 1; | fields[2].num_bits = 1; | ||||
fields[2].out_value = &field2; | fields[2].out_value = &field2; | ||||
@@ -749,8 +743,6 @@ int xscale_write_dcsr(target_t *target, int hold_rst, int ext_dbg_brk) | |||||
fields[1].in_check_value = NULL; | fields[1].in_check_value = NULL; | ||||
fields[1].in_check_mask = NULL; | fields[1].in_check_mask = NULL; | ||||
fields[2].tap = xscale->jtag_info.tap; | fields[2].tap = xscale->jtag_info.tap; | ||||
fields[2].num_bits = 1; | fields[2].num_bits = 1; | ||||
fields[2].out_value = &field2; | fields[2].out_value = &field2; | ||||
@@ -1718,7 +1710,7 @@ int xscale_deassert_reset(target_t *target) | |||||
for (; buf_cnt < 32; buf_cnt += 4) | for (; buf_cnt < 32; buf_cnt += 4) | ||||
{ | { | ||||
cache_line[buf_cnt / 4] = 0xe1a08008; | |||||
cache_line[buf_cnt / 4] = 0xe1a08008; | |||||
} | } | ||||
/* only load addresses other than the reset vectors */ | /* only load addresses other than the reset vectors */ | ||||
@@ -1766,19 +1758,16 @@ int xscale_deassert_reset(target_t *target) | |||||
jtag_add_reset(0, 0); | jtag_add_reset(0, 0); | ||||
} | } | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int xscale_soft_reset_halt(struct target_s *target) | int xscale_soft_reset_halt(struct target_s *target) | ||||
{ | { | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int xscale_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mode) | int xscale_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mode) | ||||
{ | { | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -2243,7 +2232,6 @@ int xscale_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) | |||||
} | } | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int xscale_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint) | int xscale_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint) | ||||
@@ -3041,7 +3029,6 @@ int xscale_init_target(struct command_context_s *cmd_ctx, struct target_s *targe | |||||
int xscale_quit(void) | int xscale_quit(void) | ||||
{ | { | ||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -3267,7 +3254,6 @@ static int xscale_virt2phys(struct target_s *target, u32 virtual, u32 *physical) | |||||
int domain; | int domain; | ||||
u32 ap; | u32 ap; | ||||
if ((retval = xscale_get_arch_pointers(target, &armv4_5, &xscale)) != ERROR_OK) | if ((retval = xscale_get_arch_pointers(target, &armv4_5, &xscale)) != ERROR_OK) | ||||
{ | { | ||||
return retval; | return retval; | ||||
@@ -3295,7 +3281,6 @@ static int xscale_mmu(struct target_s *target, int *enabled) | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
int xscale_handle_mmu_command(command_context_t *cmd_ctx, char *cmd, char **args, int argc) | int xscale_handle_mmu_command(command_context_t *cmd_ctx, char *cmd, char **args, int argc) | ||||
{ | { | ||||
target_t *target = get_current_target(cmd_ctx); | target_t *target = get_current_target(cmd_ctx); | ||||