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# Texas Instruments OMAP 2420 |
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# http://www.ti.com/omap |
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if { [info exists CHIPNAME] } { |
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set _CHIPNAME $CHIPNAME |
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} else { |
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set _CHIPNAME omap2420 |
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} |
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if { [info exists ENDIAN] } { |
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set _ENDIAN $ENDIAN |
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} else { |
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set _ENDIAN little |
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} |
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# NOTE: likes slowish clock on reset (1.5 MBit/s or less) or use RCLK |
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# Subsidiary TAP: ARM7TDMIr4 plus imaging ... must add via ICEpick (addr 6). |
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jtag newtap $_CHIPNAME iva -irlen 4 -ircapture 0x1 -irmask 0x3f -disable |
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# Subsidiary TAP: C55x DSP ... must add via ICEpick (addr 2). |
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jtag newtap $_CHIPNAME dsp -irlen 38 -ircapture 0x1 -irmask 0x3f -disable |
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# Subsidiary TAP: ARM ETB11, with scan chain for 4K of ETM trace buffer |
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if { [info exists ETB_TAPID ] } { |
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set _ETB_TAPID $ETB_TAPID |
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} else { |
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set _ETB_TAPID 0x2b900f0f |
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} |
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jtag newtap $_CHIPNAME etb -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_ETB_TAPID |
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# Subsidiary TAP: ARM1136jf-s with scan chains for ARM Debug, EmbeddedICE-RT, ETM. |
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if { [info exists CPU_TAPID ] } { |
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set _CPU_TAPID $CPU_TAPID |
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} else { |
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set _CPU_TAPID 0x07b3602f |
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} |
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jtag newtap $_CHIPNAME arm -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPU_TAPID |
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# Primary TAP: ICEpick-B (JTAG route controller) and boundary scan |
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if { [info exists JRC_TAPID ] } { |
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set _JRC_TAPID $JRC_TAPID |
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} else { |
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set _JRC_TAPID 0x01ce4801 |
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} |
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jtag newtap $_CHIPNAME jrc -irlen 2 -ircapture 0x1 -irmask 0x3 -expected-id $_JRC_TAPID |
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# GDB target: the ARM. |
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set _TARGETNAME $_CHIPNAME.arm |
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target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME |
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# scratch: framebuffer, may be initially unavailable in some chips |
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$_TARGETNAME configure -work-area-phys 0x40210000 |
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$_TARGETNAME configure -work-area-size 0x00081000 |
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$_TARGETNAME configure -work-area-backup 0 |
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# trace setup |
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# REVISIT ... as of 12-June-2009, OpenOCD's ETM code can't talk to ARM11 cores. |
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#etm config $_TARGETNAME 16 normal full etb |
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#etb config $_TARGETNAME $_CHIPNAME.etb |
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# vim:syntax tcl |