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#------------------------------------------------------------------------- |
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# Mini2440 Samsung s3c2440A Processor with 64MB DRAM, 64MB NAND, 2 MB N0R |
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# NOTE: Configured for NAND boot (switch S2 in NANDBOOT) |
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# 64 MB NAND (Samsung K9D1208V0M) |
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# B Findlay 08/2009 |
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# Rev 1.0 |
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# ----------- Important notes to help you on your way ---------- |
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# README: |
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# NOR/NAND Boot Switch - I have not read the vivi source, but from |
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# what I could tell from reading the registers it appears that vivi |
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# loads itself into DRAM and then flips NFCONT (0x4E000004) bits |
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# Mode (bit 0 = 1), and REG_nCE (bit 1 = 0) which maps the NAND |
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# FLASH at the bottom 64MB of memory. This essentially takes the |
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# NOR Flash out of the circuit so you can't trash it. |
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# |
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# I adapted the samsung_s3c2440.cfg file which is why I did not |
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# include "source [find target/samsung_s3c2440.cfg]". I believe |
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# the -work-area-phys 0x200000 is incorrect, but also had to pad |
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# some additional resets. I didn't modify it as if it is working |
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# for someone, the work-area-phys is not used by most. |
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# |
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# JTAG ADAPTER SPECIFIC |
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# IMPORTANT! Any JTAG device that uses ADAPTIVE CLOCKING will likely |
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# FAIL as the pin RTCK on the mini2440 10 pin JTAG Conn doesn't exist. |
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# This is Pin 11 (RTCK) on 20 pin JTAG connector. Therefore it is |
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# necessary to FORCE setting the clock. Normally this should be configured |
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# in the openocd.cfg file, but was placed here as it can be a tough |
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# problem to figure out. THIS MAY NOT FIX YOUR PROBLEM.. I modified |
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# the openOCD driver jlink.c and posted it here. It may eventually end |
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# up changed in openOCD, but its a hack in the driver and really should |
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# be in the jtag layer (core.c me thinks), but haven't done it yet. My |
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# hack for jlink.c may be found here. |
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# |
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# http://forum.sparkfun.com/viewtopic.php?t=16763&sid=946e65abdd3bab39cc7d90dee33ff135 |
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# |
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# Note: Also if you have a USB JTAG, you will need the USB library installed |
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# on your system "libusb-dev" or the make of openocd will fail. I *think* |
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# it's apt-get install libusb-dev. When I made my config I only included |
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# --enable-jlink and --enable-usbdevs |
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# |
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# I HAVE NOT Tested this throughly, so there could still be problems. |
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# But it should get you way ahead of the game from where I started. |
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# If you find problems (and fixes) please post them to |
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# openocd-development@lists.berlios.de and join the developers and |
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# check in fixes to this and anything else you find. I do not |
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# provide support, but if you ask really nice and I see anything |
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# obvious I will tell you.. mostly just dig, fix, and submit to openocd. |
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# |
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# best! brfindla@yahoo.com Nashua, NH USA |
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# |
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# Recommended resources: |
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# - first two are the best Mini2440 resources anywhere |
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# - maintained by buserror... thanks guy! |
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# |
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# http://bliterness.blogspot.com/ |
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# http://code.google.com/p/mini2440/ |
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# |
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# others.... |
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# |
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# http://forum.sparkfun.com/viewforum.php?f=18 |
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# http://labs.kernelconcepts.de/Publications/Micro24401/ |
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# http://www.friendlyarm.net/home |
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# http://www.amontec.com/jtag_pinout.shtml |
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# |
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#------------------------------------------------------------------------- |
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# |
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# |
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# Your openocd.cfg file should contain: |
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# source [find interface/<yourjtag>.cfg] |
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# source [find board/mini2440.cfg] |
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# |
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# |
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# |
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#------------------------------------------------------------------------- |
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# Target configuration for the Samsung 2440 system on chip |
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# Tested on a S3C2440 Evaluation board by keesj |
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# Processor : ARM920Tid(wb) rev 0 (v4l) |
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# Info: JTAG tap: s3c2440.cpu tap/device found: 0x0032409d |
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# (Manufacturer: 0x04e, Part: 0x0324, Version: 0x0) |
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#------------------------------------------------------------------------- |
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if { [info exists CHIPNAME] } { |
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set _CHIPNAME $CHIPNAME |
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} else { |
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set _CHIPNAME s3c2440 |
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} |
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if { [info exists ENDIAN] } { |
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set _ENDIAN $ENDIAN |
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} else { |
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# this defaults to a bigendian |
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set _ENDIAN little |
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} |
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if { [info exists CPUTAPID ] } { |
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set _CPUTAPID $CPUTAPID |
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} else { |
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# force an error till we get a good number |
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set _CPUTAPID 0x0032409d |
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} |
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#jtag scan chain |
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID |
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set _TARGETNAME [format "%s.cpu" $_CHIPNAME] |
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target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm920t |
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$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 1 |
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#reset configuration |
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jtag_nsrst_delay 100 |
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jtag_ntrst_delay 100 |
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reset_config trst_and_srst |
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#------------------------------------------------------------------------- |
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# JTAG ADAPTER SPECIFIC |
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# IMPORTANT! See README at top of this file. |
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#------------------------------------------------------------------------- |
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jtag_khz 12000 |
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jtag_rclk 3000 |
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jtag interface |
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#------------------------------------------------------------------------- |
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# GDB Setup |
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#------------------------------------------------------------------------- |
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gdb_port 3333 |
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gdb_detach resume |
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gdb_breakpoint_override hard |
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gdb_memory_map enable |
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gdb_flash_program enable |
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#------------------------------------------------ |
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# ARM SPECIFIC |
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#------------------------------------------------ |
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targets |
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# arm7_9 dcc_downloads enable |
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# arm7_9 fast_memory_access enable |
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nand device s3c2440 0 |
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jtag_nsrst_delay 100 |
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jtag_ntrst_delay 100 |
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reset_config trst_and_srst |
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init |
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echo " " |
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echo "-------------------------------------------" |
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echo "--- login with - telnet localhost 4444 ---" |
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echo "--- then type help_2440 ---" |
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echo "-------------------------------------------" |
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echo " " |
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#------------------------------------------------ |
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# Processor Initialialization |
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# Note: Processor writes can only occur when |
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# the state is in SYSTEM. When you call init_2440 |
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# one of the first lines will tell you what state |
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# you are in. If a linux image is booting |
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# when you run this, it will not work |
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# a vivi boot loader will run with this just |
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# fine. The reg values were obtained by a combination |
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# of figuring them out fromt the manual, and looking |
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# at post vivi values with the debugger. Don't |
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# place too much faith in them, but seem to work. |
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#------------------------------------------------ |
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proc init_2440 { } { |
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halt |
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s3c2440.cpu curstate |
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#----------------------------------------------- |
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# Set Processor Clocks - mini2440 xtal=12mHz |
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# we set main clock for 405mHZ |
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# we set the USB Clock for 48mHz |
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# OM2 OM3 pulled to ground so main clock and |
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# usb clock are off 12mHz xtal |
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#----------------------------------------------- |
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arm920t mww_phys 0x4C000014 0x00000005 # Clock Divider control Reg |
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arm920t mww_phys 0x4C000000 0xFFFFFFFF # LOCKTIME count register |
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arm920t mww_phys 0x4C000008 0x00038022 # UPPLCON USB clock config Reg |
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arm920t mww_phys 0x4C000004 0x0007F021 # MPPLCON Proc clock config Reg |
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#----------------------------------------------- |
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# Configure Memory controller |
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# BWSCON configures all banks, NAND, NOR, DRAM |
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# DRAM - 64MB - 32 bit bus, uses BANKCON6 BANKCON7 |
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#----------------------------------------------- |
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arm920t mww_phys 0x48000000 0x22111112 # BWSCON - Bank and Bus Width |
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arm920t mww_phys 0x48000010 0x00001112 # BANKCON4 - ? |
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arm920t mww_phys 0x4800001c 0x00018009 # BANKCON6 - DRAM |
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arm920t mww_phys 0x48000020 0x00018009 # BANKCON7 - DRAM |
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arm920t mww_phys 0x48000024 0x008E04EB # REFRESH - DRAM |
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arm920t mww_phys 0x48000028 0x000000B2 # BANKSIZE - DRAM |
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arm920t mww_phys 0x4800002C 0x00000030 # MRSRB6 - DRAM |
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arm920t mww_phys 0x48000030 0x00000030 # MRSRB7 - DRAM |
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#----------------------------------------------- |
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# Now port configuration for enables for memory |
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# and other stuff. |
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#----------------------------------------------- |
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arm920t mww_phys 0x56000000 0x007FFFFF # GPACON |
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arm920t mww_phys 0x56000010 0x00295559 # GPBCON |
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arm920t mww_phys 0x56000018 0x000003FF # GPBUP (PULLUP ENABLE) |
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arm920t mww_phys 0x56000014 0x000007C2 # GPBDAT |
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arm920t mww_phys 0x56000020 0xAAAAA6AA # GPCCON |
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arm920t mww_phys 0x56000028 0x0000FFFF # GPCUP |
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arm920t mww_phys 0x56000024 0x00000020 # GPCDAT |
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arm920t mww_phys 0x56000030 0xAAAAAAAA # GPDCON |
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arm920t mww_phys 0x56000038 0x0000FFFF # GPDUP |
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arm920t mww_phys 0x56000040 0xAAAAAAAA # GPECON |
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arm920t mww_phys 0x56000048 0x0000FFFF # GPEUP |
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arm920t mww_phys 0x56000050 0x00001555 # GPFCON |
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arm920t mww_phys 0x56000058 0x0000007F # GPFUP |
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arm920t mww_phys 0x56000054 0x00000000 # GPFDAT |
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arm920t mww_phys 0x56000060 0x00150114 # GPGCON |
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arm920t mww_phys 0x56000068 0x0000007F # GPGUP |
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arm920t mww_phys 0x56000070 0x0015AAAA # GPHCON |
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arm920t mww_phys 0x56000078 0x000003FF # GPGUP |
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} |
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proc flash_config { } { |
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#----------------------------------------- |
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# Finish Flash Configuration |
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#----------------------------------------- |
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halt |
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#flash configuration (K9D1208V0M: 512Mbit, x8, 3.3V, Mode: Normal, 1st gen) |
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nand probe 0 |
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nand list |
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} |
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proc flash_uboot { } { |
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# flash the u-Boot binary and reboot into it |
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init_2440 |
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flash_config |
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nand erase 0 0x0 0x40000 |
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nand write 0 /tftpboot/u-boot-nand512.bin 0 oob_softecc_kw |
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resume |
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} |
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proc load_uboot { } { |
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echo " " |
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echo " " |
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echo "----------------------------------------------------------" |
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echo "---- Load U-Boot into RAM and execute it. ---" |
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echo "---- NOTE: loads, partially runs, and hangs ---" |
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echo "---- U-Boot is fine, this image runs from vivi. ---" |
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echo "---- I burned u-boot into NAND so I didn't finish ---" |
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echo "---- debugging it. I am leaving this here as it is ---" |
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echo "---- part of the way there if you want to fix it. ---" |
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echo "---- ---" |
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echo "---- mini2440 U-boot here: ---" |
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echo "---- http://repo.or.cz/w/u-boot-openmoko/mini2440.git ---" |
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echo "---- Also this: ---" |
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echo "---- http://code.google.com/p/mini2440/wiki/MiniBringup --" |
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echo "----------------------------------------------------------" |
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init_2440 |
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echo "Loading /tftpboot/u-boot-nand512.bin" |
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load_image /tftpboot/u-boot-nand512.bin 0x33f80000 bin |
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echo "Verifying image...." |
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verify_image /tftpboot/u-boot-nand512.bin 0x33f80000 bin |
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echo "jumping to u-boot" |
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#bp 0x33f80068 4 hw |
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reg 0 0 |
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reg 1 0 |
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reg 2 0 |
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reg 3 0 |
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reg 4 0x33f80000 |
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resume 0x33f80000 |
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} |
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# this may help a little bit debugging the load_uboot |
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proc s {} { |
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step |
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reg |
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armv4_5 disassemble 0x33F80068 0x10 |
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} |
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proc help_2440 {} { |
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echo " " |
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echo " " |
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echo "-----------------------------------------------------------" |
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echo "---- The following mini2440 funcs are supported ----" |
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echo "---- init_2440 - initialize clocks, DRAM, IO ----" |
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echo "---- flash_config - configures nand flash ----" |
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echo "---- load_uboot - loads uboot into ram ----" |
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echo "---- flash_uboot - flashes uboot to nand (untested) ----" |
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echo "---- help_2440 - this help display ----" |
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echo "-----------------------------------------------------------" |
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echo " " |
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echo " " |
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} |
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#---------------------------------------------------------------------------- |
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#----------------------------------- END ------------------------------------ |
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#---------------------------------------------------------------------------- |