Convert all command handler 'cmd_ctx' parameter usage with CMD_CTX.tags/v0.4.0-rc1
@@ -2267,7 +2267,7 @@ COMMAND_HANDLER(sam3_handle_info_command) | |||
unsigned x; | |||
int r; | |||
pChip = get_current_sam3(cmd_ctx); | |||
pChip = get_current_sam3(CMD_CTX); | |||
if (!pChip) { | |||
return ERROR_OK; | |||
} | |||
@@ -2278,7 +2278,7 @@ COMMAND_HANDLER(sam3_handle_info_command) | |||
if (pChip->details.bank[0].pBank == NULL) { | |||
x = 0; | |||
need_define: | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
"Please define bank %d via command: flash bank %s ... ", | |||
x, | |||
at91sam3_flash.name); | |||
@@ -2329,7 +2329,7 @@ COMMAND_HANDLER(sam3_handle_info_command) | |||
// print results | |||
cp = membuf_strtok(pChip->mbuf, "\n", &vp); | |||
while (cp) { | |||
command_print(cmd_ctx,"%s", cp); | |||
command_print(CMD_CTX,"%s", cp); | |||
cp = membuf_strtok(NULL, "\n", &vp); | |||
} | |||
return ERROR_OK; | |||
@@ -2341,7 +2341,7 @@ COMMAND_HANDLER(sam3_handle_gpnvm_command) | |||
int r,who; | |||
struct sam3_chip *pChip; | |||
pChip = get_current_sam3(cmd_ctx); | |||
pChip = get_current_sam3(CMD_CTX); | |||
if (!pChip) { | |||
return ERROR_OK; | |||
} | |||
@@ -2353,7 +2353,7 @@ COMMAND_HANDLER(sam3_handle_gpnvm_command) | |||
if (pChip->details.bank[0].pBank == NULL) { | |||
command_print(cmd_ctx, "Bank0 must be defined first via: flash bank %s ...", | |||
command_print(CMD_CTX, "Bank0 must be defined first via: flash bank %s ...", | |||
at91sam3_flash.name); | |||
return ERROR_FAIL; | |||
} | |||
@@ -2367,7 +2367,7 @@ COMMAND_HANDLER(sam3_handle_gpnvm_command) | |||
switch (CMD_ARGC) { | |||
default: | |||
command_print(cmd_ctx,"Too many parameters\n"); | |||
command_print(CMD_CTX,"Too many parameters\n"); | |||
return ERROR_COMMAND_SYNTAX_ERROR; | |||
break; | |||
case 0: | |||
@@ -2397,22 +2397,22 @@ COMMAND_HANDLER(sam3_handle_gpnvm_command) | |||
if (r != ERROR_OK) { | |||
break; | |||
} | |||
command_print(cmd_ctx, "sam3-gpnvm%u: %u", x, v); | |||
command_print(CMD_CTX, "sam3-gpnvm%u: %u", x, v); | |||
} | |||
return r; | |||
} | |||
if ((who >= 0) && (((unsigned)(who)) < pChip->details.n_gpnvms)) { | |||
r = FLASHD_GetGPNVM(&(pChip->details.bank[0]), who, &v); | |||
command_print(cmd_ctx, "sam3-gpnvm%u: %u", who, v); | |||
command_print(CMD_CTX, "sam3-gpnvm%u: %u", who, v); | |||
return r; | |||
} else { | |||
command_print(cmd_ctx, "sam3-gpnvm invalid GPNVM: %u", who); | |||
command_print(CMD_CTX, "sam3-gpnvm invalid GPNVM: %u", who); | |||
return ERROR_COMMAND_SYNTAX_ERROR; | |||
} | |||
} | |||
if (who == -1) { | |||
command_print(cmd_ctx, "Missing GPNVM number"); | |||
command_print(CMD_CTX, "Missing GPNVM number"); | |||
return ERROR_COMMAND_SYNTAX_ERROR; | |||
} | |||
@@ -2422,7 +2422,7 @@ COMMAND_HANDLER(sam3_handle_gpnvm_command) | |||
(0 == strcmp("clear", CMD_ARGV[0]))) { // quietly accept both | |||
r = FLASHD_ClrGPNVM(&(pChip->details.bank[0]), who); | |||
} else { | |||
command_print(cmd_ctx, "Unkown command: %s", CMD_ARGV[0]); | |||
command_print(CMD_CTX, "Unkown command: %s", CMD_ARGV[0]); | |||
r = ERROR_COMMAND_SYNTAX_ERROR; | |||
} | |||
return r; | |||
@@ -2432,7 +2432,7 @@ COMMAND_HANDLER(sam3_handle_slowclk_command) | |||
{ | |||
struct sam3_chip *pChip; | |||
pChip = get_current_sam3(cmd_ctx); | |||
pChip = get_current_sam3(CMD_CTX); | |||
if (!pChip) { | |||
return ERROR_OK; | |||
} | |||
@@ -2449,7 +2449,7 @@ COMMAND_HANDLER(sam3_handle_slowclk_command) | |||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], v); | |||
if (v > 200000) { | |||
// absurd slow clock of 200Khz? | |||
command_print(cmd_ctx,"Absurd/illegal slow clock freq: %d\n", (int)(v)); | |||
command_print(CMD_CTX,"Absurd/illegal slow clock freq: %d\n", (int)(v)); | |||
return ERROR_COMMAND_SYNTAX_ERROR; | |||
} | |||
pChip->cfg.slow_freq = v; | |||
@@ -2457,11 +2457,11 @@ COMMAND_HANDLER(sam3_handle_slowclk_command) | |||
} | |||
default: | |||
// error | |||
command_print(cmd_ctx,"Too many parameters"); | |||
command_print(CMD_CTX,"Too many parameters"); | |||
return ERROR_COMMAND_SYNTAX_ERROR; | |||
break; | |||
} | |||
command_print(cmd_ctx, "Slowclk freq: %d.%03dkhz", | |||
command_print(CMD_CTX, "Slowclk freq: %d.%03dkhz", | |||
(int)(pChip->cfg.slow_freq/ 1000), | |||
(int)(pChip->cfg.slow_freq% 1000)); | |||
return ERROR_OK; | |||
@@ -1109,7 +1109,7 @@ COMMAND_HANDLER(at91sam7_handle_gpnvm_command) | |||
if (CMD_ARGC != 2) | |||
{ | |||
command_print(cmd_ctx, "at91sam7 gpnvm <bit> <set | clear>"); | |||
command_print(CMD_CTX, "at91sam7 gpnvm <bit> <set | clear>"); | |||
return ERROR_OK; | |||
} | |||
@@ -1120,7 +1120,7 @@ COMMAND_HANDLER(at91sam7_handle_gpnvm_command) | |||
} | |||
if (strcmp(bank->driver->name, "at91sam7")) | |||
{ | |||
command_print(cmd_ctx, "not an at91sam7 flash bank '%s'", CMD_ARGV[0]); | |||
command_print(CMD_CTX, "not an at91sam7 flash bank '%s'", CMD_ARGV[0]); | |||
return ERROR_FLASH_BANK_INVALID; | |||
} | |||
if (bank->target->state != TARGET_HALTED) | |||
@@ -1155,7 +1155,7 @@ COMMAND_HANDLER(at91sam7_handle_gpnvm_command) | |||
COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], bit); | |||
if ((bit < 0) || (bit >= at91sam7_info->num_nvmbits)) | |||
{ | |||
command_print(cmd_ctx, "gpnvm bit '#%s' is out of bounds for target %s", CMD_ARGV[0], at91sam7_info->target_name); | |||
command_print(CMD_CTX, "gpnvm bit '#%s' is out of bounds for target %s", CMD_ARGV[0], at91sam7_info->target_name); | |||
return ERROR_OK; | |||
} | |||
@@ -421,7 +421,7 @@ COMMAND_HANDLER(avrf_handle_mass_erase_command) | |||
if (CMD_ARGC < 1) | |||
{ | |||
command_print(cmd_ctx, "avr mass_erase <bank>"); | |||
command_print(CMD_CTX, "avr mass_erase <bank>"); | |||
return ERROR_OK; | |||
} | |||
@@ -438,11 +438,11 @@ COMMAND_HANDLER(avrf_handle_mass_erase_command) | |||
bank->sectors[i].is_erased = 1; | |||
} | |||
command_print(cmd_ctx, "avr mass erase complete"); | |||
command_print(CMD_CTX, "avr mass erase complete"); | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "avr mass erase failed"); | |||
command_print(CMD_CTX, "avr mass erase failed"); | |||
} | |||
LOG_DEBUG("%s", __FUNCTION__); | |||
@@ -208,7 +208,7 @@ COMMAND_HELPER(flash_command_get_bank_by_num, | |||
*bank = get_flash_bank_by_num(bank_num); | |||
if (!*bank) | |||
{ | |||
command_print(cmd_ctx, "flash bank '%s' not found", name); | |||
command_print(CMD_CTX, "flash bank '%s' not found", name); | |||
return ERROR_INVALID_ARGUMENTS; | |||
} | |||
return ERROR_OK; | |||
@@ -241,7 +241,7 @@ COMMAND_HANDLER(handle_flash_bank_command) | |||
struct flash_bank *p, *c; | |||
/* register flash specific commands */ | |||
if (flash_drivers[i]->register_commands(cmd_ctx) != ERROR_OK) | |||
if (flash_drivers[i]->register_commands(CMD_CTX) != ERROR_OK) | |||
{ | |||
LOG_ERROR("couldn't register '%s' commands", CMD_ARGV[0]); | |||
return ERROR_FAIL; | |||
@@ -320,7 +320,7 @@ COMMAND_HANDLER(handle_flash_info_command) | |||
if ((retval = p->driver->auto_probe(p)) != ERROR_OK) | |||
return retval; | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
"#%" PRIi32 " : %s at 0x%8.8" PRIx32 ", size 0x%8.8" PRIx32 ", buswidth %i, chipwidth %i", | |||
i, | |||
p->driver->name, | |||
@@ -339,7 +339,7 @@ COMMAND_HANDLER(handle_flash_info_command) | |||
else | |||
protect_state = "protection state unknown"; | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
"\t#%3i: 0x%8.8" PRIx32 " (0x%" PRIx32 " %" PRIi32 "kB) %s", | |||
j, | |||
p->sectors[j].offset, | |||
@@ -350,7 +350,7 @@ COMMAND_HANDLER(handle_flash_info_command) | |||
*buf = '\0'; /* initialize buffer, otherwise it migh contain garbage if driver function fails */ | |||
retval = p->driver->info(p, buf, sizeof(buf)); | |||
command_print(cmd_ctx, "%s", buf); | |||
command_print(CMD_CTX, "%s", buf); | |||
if (retval != ERROR_OK) | |||
LOG_ERROR("error retrieving flash info (%d)", retval); | |||
} | |||
@@ -374,22 +374,22 @@ COMMAND_HANDLER(handle_flash_probe_command) | |||
{ | |||
if ((retval = p->driver->probe(p)) == ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "flash '%s' found at 0x%8.8" PRIx32, p->driver->name, p->base); | |||
command_print(CMD_CTX, "flash '%s' found at 0x%8.8" PRIx32, p->driver->name, p->base); | |||
} | |||
else if (retval == ERROR_FLASH_BANK_INVALID) | |||
{ | |||
command_print(cmd_ctx, "probing failed for flash bank '#%s' at 0x%8.8" PRIx32, | |||
command_print(CMD_CTX, "probing failed for flash bank '#%s' at 0x%8.8" PRIx32, | |||
CMD_ARGV[0], p->base); | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "unknown error when probing flash bank '#%s' at 0x%8.8" PRIx32, | |||
command_print(CMD_CTX, "unknown error when probing flash bank '#%s' at 0x%8.8" PRIx32, | |||
CMD_ARGV[0], p->base); | |||
} | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "flash bank '#%s' is out of bounds", CMD_ARGV[0]); | |||
command_print(CMD_CTX, "flash bank '#%s' is out of bounds", CMD_ARGV[0]); | |||
} | |||
return ERROR_OK; | |||
@@ -410,11 +410,11 @@ COMMAND_HANDLER(handle_flash_erase_check_command) | |||
int j; | |||
if ((retval = p->driver->erase_check(p)) == ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "successfully checked erase state"); | |||
command_print(CMD_CTX, "successfully checked erase state"); | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "unknown error when checking erase state of flash bank #%s at 0x%8.8" PRIx32, | |||
command_print(CMD_CTX, "unknown error when checking erase state of flash bank #%s at 0x%8.8" PRIx32, | |||
CMD_ARGV[0], p->base); | |||
} | |||
@@ -429,7 +429,7 @@ COMMAND_HANDLER(handle_flash_erase_check_command) | |||
else | |||
erase_state = "erase state unknown"; | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
"\t#%3i: 0x%8.8" PRIx32 " (0x%" PRIx32 " %" PRIi32 "kB) %s", | |||
j, | |||
p->sectors[j].offset, | |||
@@ -448,7 +448,7 @@ COMMAND_HANDLER(handle_flash_erase_address_command) | |||
int address; | |||
int length; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
if (CMD_ARGC != 2) | |||
return ERROR_COMMAND_SYNTAX_ERROR; | |||
@@ -457,7 +457,7 @@ COMMAND_HANDLER(handle_flash_erase_address_command) | |||
COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], length); | |||
if (length <= 0) | |||
{ | |||
command_print(cmd_ctx, "Length must be >0"); | |||
command_print(CMD_CTX, "Length must be >0"); | |||
return ERROR_COMMAND_SYNTAX_ERROR; | |||
} | |||
@@ -477,7 +477,7 @@ COMMAND_HANDLER(handle_flash_erase_address_command) | |||
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) | |||
{ | |||
command_print(cmd_ctx, "erased address 0x%8.8x (length %i)" | |||
command_print(CMD_CTX, "erased address 0x%8.8x (length %i)" | |||
" in %fs (%0.3f kb/s)", address, length, | |||
duration_elapsed(&bench), duration_kbps(&bench, length)); | |||
} | |||
@@ -497,15 +497,15 @@ COMMAND_HANDLER(handle_flash_protect_check_command) | |||
if ((retval = p->driver->protect_check(p)) == ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "successfully checked protect state"); | |||
command_print(CMD_CTX, "successfully checked protect state"); | |||
} | |||
else if (retval == ERROR_FLASH_OPERATION_FAILED) | |||
{ | |||
command_print(cmd_ctx, "checking protection state failed (possibly unsupported) by flash #%s at 0x%8.8" PRIx32, CMD_ARGV[0], p->base); | |||
command_print(CMD_CTX, "checking protection state failed (possibly unsupported) by flash #%s at 0x%8.8" PRIx32, CMD_ARGV[0], p->base); | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "unknown error when checking protection state of flash bank '#%s' at 0x%8.8" PRIx32, CMD_ARGV[0], p->base); | |||
command_print(CMD_CTX, "unknown error when checking protection state of flash bank '#%s' at 0x%8.8" PRIx32, CMD_ARGV[0], p->base); | |||
} | |||
return ERROR_OK; | |||
@@ -550,7 +550,7 @@ COMMAND_HANDLER(handle_flash_erase_command) | |||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], last); | |||
int retval; | |||
if ((retval = flash_check_sector_parameters(cmd_ctx, | |||
if ((retval = flash_check_sector_parameters(CMD_CTX, | |||
first, last, p->num_sectors)) != ERROR_OK) | |||
return retval; | |||
@@ -561,7 +561,7 @@ COMMAND_HANDLER(handle_flash_erase_command) | |||
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) | |||
{ | |||
command_print(cmd_ctx, "erased sectors %" PRIu32 " " | |||
command_print(CMD_CTX, "erased sectors %" PRIu32 " " | |||
"through %" PRIu32" on flash bank %" PRIu32 " " | |||
"in %fs", first, last, bank_nr, duration_elapsed(&bench)); | |||
} | |||
@@ -598,13 +598,13 @@ COMMAND_HANDLER(handle_flash_protect_command) | |||
return ERROR_COMMAND_SYNTAX_ERROR; | |||
int retval; | |||
if ((retval = flash_check_sector_parameters(cmd_ctx, | |||
if ((retval = flash_check_sector_parameters(CMD_CTX, | |||
first, last, p->num_sectors)) != ERROR_OK) | |||
return retval; | |||
retval = flash_driver_protect(p, set, first, last); | |||
if (retval == ERROR_OK) { | |||
command_print(cmd_ctx, "%s protection for sectors %i " | |||
command_print(CMD_CTX, "%s protection for sectors %i " | |||
"through %i on flash bank %i", | |||
(set) ? "set" : "cleared", (int) first, | |||
(int) last, (int) bank_nr); | |||
@@ -615,7 +615,7 @@ COMMAND_HANDLER(handle_flash_protect_command) | |||
COMMAND_HANDLER(handle_flash_write_image_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct image image; | |||
uint32_t written; | |||
@@ -638,13 +638,13 @@ COMMAND_HANDLER(handle_flash_write_image_command) | |||
auto_erase = 1; | |||
CMD_ARGV++; | |||
CMD_ARGC--; | |||
command_print(cmd_ctx, "auto erase enabled"); | |||
command_print(CMD_CTX, "auto erase enabled"); | |||
} else if (strcmp(CMD_ARGV[0], "unlock") == 0) | |||
{ | |||
auto_unlock = true; | |||
CMD_ARGV++; | |||
CMD_ARGC--; | |||
command_print(cmd_ctx, "auto unlock enabled"); | |||
command_print(CMD_CTX, "auto unlock enabled"); | |||
} else | |||
{ | |||
break; | |||
@@ -693,7 +693,7 @@ COMMAND_HANDLER(handle_flash_write_image_command) | |||
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) | |||
{ | |||
command_print(cmd_ctx, "wrote %" PRIu32 " byte from file %s " | |||
command_print(CMD_CTX, "wrote %" PRIu32 " byte from file %s " | |||
"in %fs (%0.3f kb/s)", written, CMD_ARGV[0], | |||
duration_elapsed(&bench), duration_kbps(&bench, written)); | |||
} | |||
@@ -714,7 +714,7 @@ COMMAND_HANDLER(handle_flash_fill_command) | |||
uint32_t wrote = 0; | |||
uint32_t cur_size = 0; | |||
uint32_t chunk_count; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
uint32_t i; | |||
uint32_t wordsize; | |||
@@ -800,7 +800,7 @@ COMMAND_HANDLER(handle_flash_fill_command) | |||
if (duration_measure(&bench) == ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "wrote %" PRIu32 " bytes to 0x%8.8" PRIx32 | |||
command_print(CMD_CTX, "wrote %" PRIu32 " bytes to 0x%8.8" PRIx32 | |||
" in %fs (%0.3f kb/s)", wrote, address, | |||
duration_elapsed(&bench), duration_kbps(&bench, wrote)); | |||
} | |||
@@ -847,7 +847,7 @@ COMMAND_HANDLER(handle_flash_write_bank_command) | |||
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) | |||
{ | |||
command_print(cmd_ctx, "wrote %zu byte from file %s to flash bank %u" | |||
command_print(CMD_CTX, "wrote %zu byte from file %s to flash bank %u" | |||
" at offset 0x%8.8" PRIx32 " in %fs (%0.3f kb/s)", | |||
fileio.size, CMD_ARGV[1], p->bank_number, offset, | |||
duration_elapsed(&bench), duration_kbps(&bench, fileio.size)); | |||
@@ -764,14 +764,14 @@ COMMAND_HANDLER(lpc2000_handle_part_id_command) | |||
{ | |||
if (status_code == ERROR_FLASH_OPERATION_FAILED) | |||
{ | |||
command_print(cmd_ctx, "no sufficient working area specified, can't access LPC2000 IAP interface"); | |||
command_print(CMD_CTX, "no sufficient working area specified, can't access LPC2000 IAP interface"); | |||
return ERROR_OK; | |||
} | |||
command_print(cmd_ctx, "lpc2000 IAP returned status code %i", status_code); | |||
command_print(CMD_CTX, "lpc2000 IAP returned status code %i", status_code); | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "lpc2000 part id: 0x%8.8" PRIx32 , result_table[0]); | |||
command_print(CMD_CTX, "lpc2000 part id: 0x%8.8" PRIx32 , result_table[0]); | |||
} | |||
return ERROR_OK; | |||
@@ -564,7 +564,7 @@ COMMAND_HANDLER(lpc2900_handle_signature_command) | |||
return status; | |||
} | |||
command_print( cmd_ctx, "signature: 0x%8.8" PRIx32 | |||
command_print( CMD_CTX, "signature: 0x%8.8" PRIx32 | |||
":0x%8.8" PRIx32 | |||
":0x%8.8" PRIx32 | |||
":0x%8.8" PRIx32, | |||
@@ -672,11 +672,11 @@ COMMAND_HANDLER(lpc2900_handle_password_command) | |||
if( !lpc2900_info->risky ) | |||
{ | |||
command_print(cmd_ctx, "Wrong password (use '%s')", ISS_PASSWORD); | |||
command_print(CMD_CTX, "Wrong password (use '%s')", ISS_PASSWORD); | |||
return ERROR_COMMAND_ARGUMENT_INVALID; | |||
} | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
"Potentially dangerous operation allowed in next command!"); | |||
return ERROR_OK; | |||
@@ -704,7 +704,7 @@ COMMAND_HANDLER(lpc2900_handle_write_custom_command) | |||
/* Check if command execution is allowed. */ | |||
if( !lpc2900_info->risky ) | |||
{ | |||
command_print( cmd_ctx, "Command execution not allowed!" ); | |||
command_print( CMD_CTX, "Command execution not allowed!" ); | |||
return ERROR_COMMAND_ARGUMENT_INVALID; | |||
} | |||
lpc2900_info->risky = 0; | |||
@@ -815,7 +815,7 @@ COMMAND_HANDLER(lpc2900_handle_secure_sector_command) | |||
/* Check if command execution is allowed. */ | |||
if( !lpc2900_info->risky ) | |||
{ | |||
command_print( cmd_ctx, "Command execution not allowed! " | |||
command_print( CMD_CTX, "Command execution not allowed! " | |||
"(use 'password' command first)"); | |||
return ERROR_COMMAND_ARGUMENT_INVALID; | |||
} | |||
@@ -829,7 +829,7 @@ COMMAND_HANDLER(lpc2900_handle_secure_sector_command) | |||
(last >= bank->num_sectors) || | |||
(first > last) ) | |||
{ | |||
command_print( cmd_ctx, "Illegal sector range" ); | |||
command_print( CMD_CTX, "Illegal sector range" ); | |||
return ERROR_COMMAND_ARGUMENT_INVALID; | |||
} | |||
@@ -878,7 +878,7 @@ COMMAND_HANDLER(lpc2900_handle_secure_sector_command) | |||
} | |||
} | |||
command_print( cmd_ctx, | |||
command_print( CMD_CTX, | |||
"Sectors security will become effective after next power cycle"); | |||
/* Update the sector security status */ | |||
@@ -914,7 +914,7 @@ COMMAND_HANDLER(lpc2900_handle_secure_jtag_command) | |||
/* Check if command execution is allowed. */ | |||
if( !lpc2900_info->risky ) | |||
{ | |||
command_print( cmd_ctx, "Command execution not allowed! " | |||
command_print( CMD_CTX, "Command execution not allowed! " | |||
"(use 'password' command first)"); | |||
return ERROR_COMMAND_ARGUMENT_INVALID; | |||
} | |||
@@ -846,7 +846,7 @@ COMMAND_HANDLER(handle_lpc3180_select_command) | |||
struct nand_device *nand = get_nand_device_by_num(num); | |||
if (!nand) | |||
{ | |||
command_print(cmd_ctx, "nand device '#%s' is out of bounds", CMD_ARGV[0]); | |||
command_print(CMD_CTX, "nand device '#%s' is out of bounds", CMD_ARGV[0]); | |||
return ERROR_OK; | |||
} | |||
@@ -868,7 +868,7 @@ COMMAND_HANDLER(handle_lpc3180_select_command) | |||
} | |||
} | |||
command_print(cmd_ctx, "%s controller selected", selected[lpc3180_info->selected_controller]); | |||
command_print(CMD_CTX, "%s controller selected", selected[lpc3180_info->selected_controller]); | |||
return ERROR_OK; | |||
} | |||
@@ -416,7 +416,7 @@ COMMAND_HANDLER(mg_probe_cmd) | |||
ret = mg_mflash_probe(); | |||
if (ret == ERROR_OK) { | |||
command_print(cmd_ctx, "mflash (total %" PRIu32 " sectors) found at 0x%8.8" PRIx32 "", | |||
command_print(CMD_CTX, "mflash (total %" PRIu32 " sectors) found at 0x%8.8" PRIx32 "", | |||
mflash_bank->drv_info->tot_sects, mflash_bank->base); | |||
} | |||
@@ -751,7 +751,7 @@ COMMAND_HANDLER(mg_write_cmd) | |||
if (duration_measure(&bench) == ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "wrote %zu byte from file %s " | |||
command_print(CMD_CTX, "wrote %zu byte from file %s " | |||
"in %fs (%0.3f kB/s)", fileio.size, CMD_ARGV[1], | |||
duration_elapsed(&bench), duration_kbps(&bench, fileio.size)); | |||
} | |||
@@ -817,7 +817,7 @@ COMMAND_HANDLER(mg_dump_cmd) | |||
if (duration_measure(&bench) == ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "dump image (address 0x%8.8" PRIx32 " " | |||
command_print(CMD_CTX, "dump image (address 0x%8.8" PRIx32 " " | |||
"size %" PRIu32 ") to file %s in %fs (%0.3f kB/s)", | |||
address, size, CMD_ARGV[1], | |||
duration_elapsed(&bench), duration_kbps(&bench, size)); | |||
@@ -223,7 +223,7 @@ COMMAND_HANDLER(handle_nand_device_command) | |||
if (strcmp(CMD_ARGV[0], nand_flash_controllers[i]->name) == 0) | |||
{ | |||
/* register flash specific commands */ | |||
if ((retval = nand_flash_controllers[i]->register_commands(cmd_ctx)) != ERROR_OK) | |||
if ((retval = nand_flash_controllers[i]->register_commands(CMD_CTX)) != ERROR_OK) | |||
{ | |||
LOG_ERROR("couldn't register '%s' commands", CMD_ARGV[0]); | |||
return retval; | |||
@@ -312,7 +312,7 @@ COMMAND_HELPER(nand_command_get_device_by_num, unsigned name_index, | |||
COMMAND_PARSE_NUMBER(uint, str, num); | |||
*nand = get_nand_device_by_num(num); | |||
if (!*nand) { | |||
command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", str); | |||
command_print(CMD_CTX, "NAND flash device '#%s' is out of bounds", str); | |||
return ERROR_INVALID_ARGUMENTS; | |||
} | |||
return ERROR_OK; | |||
@@ -1050,21 +1050,21 @@ COMMAND_HANDLER(handle_nand_list_command) | |||
if (!nand_devices) | |||
{ | |||
command_print(cmd_ctx, "no NAND flash devices configured"); | |||
command_print(CMD_CTX, "no NAND flash devices configured"); | |||
return ERROR_OK; | |||
} | |||
for (p = nand_devices, i = 0; p; p = p->next, i++) | |||
{ | |||
if (p->device) | |||
command_print(cmd_ctx, "#%i: %s (%s) " | |||
command_print(CMD_CTX, "#%i: %s (%s) " | |||
"pagesize: %i, buswidth: %i,\n\t" | |||
"blocksize: %i, blocks: %i", | |||
i, p->device->name, p->manufacturer->name, | |||
p->page_size, p->bus_width, | |||
p->erase_size, p->num_blocks); | |||
else | |||
command_print(cmd_ctx, "#%i: not probed", i); | |||
command_print(CMD_CTX, "#%i: not probed", i); | |||
} | |||
return ERROR_OK; | |||
@@ -1102,7 +1102,7 @@ COMMAND_HANDLER(handle_nand_info_command) | |||
if (NULL == p->device) | |||
{ | |||
command_print(cmd_ctx, "#%s: not probed", CMD_ARGV[0]); | |||
command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]); | |||
return ERROR_OK; | |||
} | |||
@@ -1112,7 +1112,7 @@ COMMAND_HANDLER(handle_nand_info_command) | |||
if (last >= p->num_blocks) | |||
last = p->num_blocks - 1; | |||
command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i", | |||
command_print(CMD_CTX, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i", | |||
i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size); | |||
for (j = first; j <= last; j++) | |||
@@ -1133,7 +1133,7 @@ COMMAND_HANDLER(handle_nand_info_command) | |||
else | |||
bad_state = " (block condition unknown)"; | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
"\t#%i: 0x%8.8" PRIx32 " (%" PRId32 "kB) %s%s", | |||
j, | |||
p->blocks[j].offset, | |||
@@ -1159,15 +1159,15 @@ COMMAND_HANDLER(handle_nand_probe_command) | |||
if ((retval = nand_probe(p)) == ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "NAND flash device '%s' found", p->device->name); | |||
command_print(CMD_CTX, "NAND flash device '%s' found", p->device->name); | |||
} | |||
else if (retval == ERROR_NAND_OPERATION_FAILED) | |||
{ | |||
command_print(cmd_ctx, "probing failed for NAND flash device"); | |||
command_print(CMD_CTX, "probing failed for NAND flash device"); | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "unknown error when probing NAND flash device"); | |||
command_print(CMD_CTX, "unknown error when probing NAND flash device"); | |||
} | |||
return ERROR_OK; | |||
@@ -1212,18 +1212,18 @@ COMMAND_HANDLER(handle_nand_erase_command) | |||
retval = nand_erase(p, offset, offset + length - 1); | |||
if (retval == ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "erased blocks %lu to %lu " | |||
command_print(CMD_CTX, "erased blocks %lu to %lu " | |||
"on NAND flash device #%s '%s'", | |||
offset, offset + length, | |||
CMD_ARGV[0], p->device->name); | |||
} | |||
else if (retval == ERROR_NAND_OPERATION_FAILED) | |||
{ | |||
command_print(cmd_ctx, "erase failed"); | |||
command_print(CMD_CTX, "erase failed"); | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "unknown error when erasing NAND flash device"); | |||
command_print(CMD_CTX, "unknown error when erasing NAND flash device"); | |||
} | |||
return ERROR_OK; | |||
@@ -1269,17 +1269,17 @@ COMMAND_HANDLER(handle_nand_check_bad_blocks_command) | |||
retval = nand_build_bbt(p, first, last); | |||
if (retval == ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "checked NAND flash device for bad blocks, " | |||
command_print(CMD_CTX, "checked NAND flash device for bad blocks, " | |||
"use \"nand info\" command to list blocks"); | |||
} | |||
else if (retval == ERROR_NAND_OPERATION_FAILED) | |||
{ | |||
command_print(cmd_ctx, "error when checking for bad blocks on " | |||
command_print(CMD_CTX, "error when checking for bad blocks on " | |||
"NAND flash device"); | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "unknown error when checking for bad " | |||
command_print(CMD_CTX, "unknown error when checking for bad " | |||
"blocks on NAND flash device"); | |||
} | |||
@@ -1399,7 +1399,7 @@ static COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state, | |||
if (NULL == nand->device) | |||
{ | |||
command_print(cmd_ctx, "#%s: not probed", CMD_ARGV[0]); | |||
command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]); | |||
return ERROR_OK; | |||
} | |||
@@ -1409,7 +1409,7 @@ static COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state, | |||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], state->size); | |||
if (state->size % nand->page_size) | |||
{ | |||
command_print(cmd_ctx, "only page-aligned sizes are supported"); | |||
command_print(CMD_CTX, "only page-aligned sizes are supported"); | |||
return ERROR_COMMAND_SYNTAX_ERROR; | |||
} | |||
} | |||
@@ -1428,13 +1428,13 @@ static COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state, | |||
state->oob_format |= NAND_OOB_SW_ECC_KW; | |||
else | |||
{ | |||
command_print(cmd_ctx, "unknown option: %s", CMD_ARGV[i]); | |||
command_print(CMD_CTX, "unknown option: %s", CMD_ARGV[i]); | |||
return ERROR_COMMAND_SYNTAX_ERROR; | |||
} | |||
} | |||
} | |||
retval = nand_fileio_start(cmd_ctx, nand, CMD_ARGV[1], filemode, state); | |||
retval = nand_fileio_start(CMD_CTX, nand, CMD_ARGV[1], filemode, state); | |||
if (ERROR_OK != retval) | |||
return retval; | |||
@@ -1517,7 +1517,7 @@ COMMAND_HANDLER(handle_nand_write_command) | |||
int bytes_read = nand_fileio_read(nand, &s); | |||
if (bytes_read <= 0) | |||
{ | |||
command_print(cmd_ctx, "error while reading file"); | |||
command_print(CMD_CTX, "error while reading file"); | |||
return nand_fileio_cleanup(&s); | |||
} | |||
s.size -= bytes_read; | |||
@@ -1526,7 +1526,7 @@ COMMAND_HANDLER(handle_nand_write_command) | |||
s.page, s.page_size, s.oob, s.oob_size); | |||
if (ERROR_OK != retval) | |||
{ | |||
command_print(cmd_ctx, "failed writing file %s " | |||
command_print(CMD_CTX, "failed writing file %s " | |||
"to NAND flash %s at offset 0x%8.8" PRIx32, | |||
CMD_ARGV[1], CMD_ARGV[0], s.address); | |||
return nand_fileio_cleanup(&s); | |||
@@ -1536,7 +1536,7 @@ COMMAND_HANDLER(handle_nand_write_command) | |||
if (nand_fileio_finish(&s)) | |||
{ | |||
command_print(cmd_ctx, "wrote file %s to NAND flash %s up to " | |||
command_print(CMD_CTX, "wrote file %s to NAND flash %s up to " | |||
"offset 0x%8.8" PRIx32 " in %fs (%0.3f kb/s)", | |||
CMD_ARGV[1], CMD_ARGV[0], s.address, duration_elapsed(&s.bench), | |||
duration_kbps(&s.bench, total_bytes)); | |||
@@ -1558,7 +1558,7 @@ COMMAND_HANDLER(handle_nand_verify_command) | |||
dev.address = file.address; | |||
dev.size = file.size; | |||
dev.oob_format = file.oob_format; | |||
retval = nand_fileio_start(cmd_ctx, nand, NULL, FILEIO_NONE, &dev); | |||
retval = nand_fileio_start(CMD_CTX, nand, NULL, FILEIO_NONE, &dev); | |||
if (ERROR_OK != retval) | |||
return retval; | |||
@@ -1568,7 +1568,7 @@ COMMAND_HANDLER(handle_nand_verify_command) | |||
dev.page, dev.page_size, dev.oob, dev.oob_size); | |||
if (ERROR_OK != retval) | |||
{ | |||
command_print(cmd_ctx, "reading NAND flash page failed"); | |||
command_print(CMD_CTX, "reading NAND flash page failed"); | |||
nand_fileio_cleanup(&dev); | |||
return nand_fileio_cleanup(&file); | |||
} | |||
@@ -1576,7 +1576,7 @@ COMMAND_HANDLER(handle_nand_verify_command) | |||
int bytes_read = nand_fileio_read(nand, &file); | |||
if (bytes_read <= 0) | |||
{ | |||
command_print(cmd_ctx, "error while reading file"); | |||
command_print(CMD_CTX, "error while reading file"); | |||
nand_fileio_cleanup(&dev); | |||
return nand_fileio_cleanup(&file); | |||
} | |||
@@ -1584,7 +1584,7 @@ COMMAND_HANDLER(handle_nand_verify_command) | |||
if ((dev.page && memcmp(dev.page, file.page, dev.page_size)) || | |||
(dev.oob && memcmp(dev.oob, file.oob, dev.oob_size)) ) | |||
{ | |||
command_print(cmd_ctx, "NAND flash contents differ " | |||
command_print(CMD_CTX, "NAND flash contents differ " | |||
"at 0x%8.8" PRIx32, dev.address); | |||
nand_fileio_cleanup(&dev); | |||
return nand_fileio_cleanup(&file); | |||
@@ -1596,7 +1596,7 @@ COMMAND_HANDLER(handle_nand_verify_command) | |||
if (nand_fileio_finish(&file) == ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "verified file %s in NAND flash %s " | |||
command_print(CMD_CTX, "verified file %s in NAND flash %s " | |||
"up to offset 0x%8.8" PRIx32 " in %fs (%0.3f kb/s)", | |||
CMD_ARGV[1], CMD_ARGV[0], dev.address, duration_elapsed(&file.bench), | |||
duration_kbps(&file.bench, dev.size)); | |||
@@ -1621,7 +1621,7 @@ COMMAND_HANDLER(handle_nand_dump_command) | |||
s.page, s.page_size, s.oob, s.oob_size); | |||
if (ERROR_OK != retval) | |||
{ | |||
command_print(cmd_ctx, "reading NAND flash page failed"); | |||
command_print(CMD_CTX, "reading NAND flash page failed"); | |||
return nand_fileio_cleanup(&s); | |||
} | |||
@@ -1637,7 +1637,7 @@ COMMAND_HANDLER(handle_nand_dump_command) | |||
if (nand_fileio_finish(&s) == ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "dumped %zu bytes in %fs (%0.3f kb/s)", | |||
command_print(CMD_CTX, "dumped %zu bytes in %fs (%0.3f kb/s)", | |||
s.fileio.size, duration_elapsed(&s.bench), | |||
duration_kbps(&s.bench, s.fileio.size)); | |||
} | |||
@@ -1658,7 +1658,7 @@ COMMAND_HANDLER(handle_nand_raw_access_command) | |||
if (NULL == p->device) | |||
{ | |||
command_print(cmd_ctx, "#%s: not probed", CMD_ARGV[0]); | |||
command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]); | |||
return ERROR_OK; | |||
} | |||
@@ -1673,7 +1673,7 @@ COMMAND_HANDLER(handle_nand_raw_access_command) | |||
} | |||
const char *msg = p->use_raw ? "enabled" : "disabled"; | |||
command_print(cmd_ctx, "raw access is %s", msg); | |||
command_print(CMD_CTX, "raw access is %s", msg); | |||
return ERROR_OK; | |||
} | |||
@@ -679,7 +679,7 @@ COMMAND_HANDLER(pic32mx_handle_lock_command) | |||
if (CMD_ARGC < 1) | |||
{ | |||
command_print(cmd_ctx, "pic32mx lock <bank>"); | |||
command_print(CMD_CTX, "pic32mx lock <bank>"); | |||
return ERROR_OK; | |||
} | |||
@@ -700,7 +700,7 @@ COMMAND_HANDLER(pic32mx_handle_lock_command) | |||
if (pic32mx_erase_options(bank) != ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "pic32mx failed to erase options"); | |||
command_print(CMD_CTX, "pic32mx failed to erase options"); | |||
return ERROR_OK; | |||
} | |||
@@ -709,11 +709,11 @@ COMMAND_HANDLER(pic32mx_handle_lock_command) | |||
if (pic32mx_write_options(bank) != ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "pic32mx failed to lock device"); | |||
command_print(CMD_CTX, "pic32mx failed to lock device"); | |||
return ERROR_OK; | |||
} | |||
command_print(cmd_ctx, "pic32mx locked"); | |||
command_print(CMD_CTX, "pic32mx locked"); | |||
return ERROR_OK; | |||
} | |||
@@ -725,7 +725,7 @@ COMMAND_HANDLER(pic32mx_handle_unlock_command) | |||
if (CMD_ARGC < 1) | |||
{ | |||
command_print(cmd_ctx, "pic32mx unlock <bank>"); | |||
command_print(CMD_CTX, "pic32mx unlock <bank>"); | |||
return ERROR_OK; | |||
} | |||
@@ -746,17 +746,17 @@ COMMAND_HANDLER(pic32mx_handle_unlock_command) | |||
if (pic32mx_erase_options(bank) != ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "pic32mx failed to unlock device"); | |||
command_print(CMD_CTX, "pic32mx failed to unlock device"); | |||
return ERROR_OK; | |||
} | |||
if (pic32mx_write_options(bank) != ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "pic32mx failed to lock device"); | |||
command_print(CMD_CTX, "pic32mx failed to lock device"); | |||
return ERROR_OK; | |||
} | |||
command_print(cmd_ctx, "pic32mx unlocked"); | |||
command_print(CMD_CTX, "pic32mx unlocked"); | |||
return ERROR_OK; | |||
} | |||
@@ -815,7 +815,7 @@ COMMAND_HANDLER(pic32mx_handle_chip_erase_command) | |||
if (CMD_ARGC != 0) | |||
{ | |||
command_print(cmd_ctx, "pic32mx chip_erase"); | |||
command_print(CMD_CTX, "pic32mx chip_erase"); | |||
return ERROR_OK; | |||
} | |||
@@ -832,11 +832,11 @@ COMMAND_HANDLER(pic32mx_handle_chip_erase_command) | |||
bank->sectors[i].is_erased = 1; | |||
} | |||
command_print(cmd_ctx, "pic32mx chip erase complete"); | |||
command_print(CMD_CTX, "pic32mx chip erase complete"); | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "pic32mx chip erase failed"); | |||
command_print(CMD_CTX, "pic32mx chip erase failed"); | |||
} | |||
#endif | |||
@@ -850,7 +850,7 @@ COMMAND_HANDLER(pic32mx_handle_pgm_word_command) | |||
if (CMD_ARGC != 3) | |||
{ | |||
command_print(cmd_ctx, "pic32mx pgm_word <addr> <value> <bank>"); | |||
command_print(CMD_CTX, "pic32mx pgm_word <addr> <value> <bank>"); | |||
return ERROR_OK; | |||
} | |||
@@ -864,7 +864,7 @@ COMMAND_HANDLER(pic32mx_handle_pgm_word_command) | |||
if (address < bank->base || address >= (bank->base + bank->size)) | |||
{ | |||
command_print(cmd_ctx, "flash address '%s' is out of bounds", CMD_ARGV[0]); | |||
command_print(CMD_CTX, "flash address '%s' is out of bounds", CMD_ARGV[0]); | |||
return ERROR_OK; | |||
} | |||
@@ -876,9 +876,9 @@ COMMAND_HANDLER(pic32mx_handle_pgm_word_command) | |||
res = ERROR_FLASH_OPERATION_FAILED; | |||
if (res == ERROR_OK) | |||
command_print(cmd_ctx, "pic32mx pgm word complete"); | |||
command_print(CMD_CTX, "pic32mx pgm word complete"); | |||
else | |||
command_print(cmd_ctx, "pic32mx pgm word failed (status = 0x%x)", status); | |||
command_print(CMD_CTX, "pic32mx pgm word failed (status = 0x%x)", status); | |||
return ERROR_OK; | |||
} | |||
@@ -1134,7 +1134,7 @@ COMMAND_HANDLER(stellaris_handle_mass_erase_command) | |||
if (CMD_ARGC < 1) | |||
{ | |||
command_print(cmd_ctx, "stellaris mass_erase <bank>"); | |||
command_print(CMD_CTX, "stellaris mass_erase <bank>"); | |||
return ERROR_OK; | |||
} | |||
@@ -1151,11 +1151,11 @@ COMMAND_HANDLER(stellaris_handle_mass_erase_command) | |||
bank->sectors[i].is_erased = 1; | |||
} | |||
command_print(cmd_ctx, "stellaris mass erase complete"); | |||
command_print(CMD_CTX, "stellaris mass erase complete"); | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "stellaris mass erase failed"); | |||
command_print(CMD_CTX, "stellaris mass erase failed"); | |||
} | |||
return ERROR_OK; | |||
@@ -900,7 +900,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command) | |||
if (CMD_ARGC < 1) | |||
{ | |||
command_print(cmd_ctx, "stm32x lock <bank>"); | |||
command_print(CMD_CTX, "stm32x lock <bank>"); | |||
return ERROR_OK; | |||
} | |||
@@ -921,7 +921,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command) | |||
if (stm32x_erase_options(bank) != ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "stm32x failed to erase options"); | |||
command_print(CMD_CTX, "stm32x failed to erase options"); | |||
return ERROR_OK; | |||
} | |||
@@ -930,11 +930,11 @@ COMMAND_HANDLER(stm32x_handle_lock_command) | |||
if (stm32x_write_options(bank) != ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "stm32x failed to lock device"); | |||
command_print(CMD_CTX, "stm32x failed to lock device"); | |||
return ERROR_OK; | |||
} | |||
command_print(cmd_ctx, "stm32x locked"); | |||
command_print(CMD_CTX, "stm32x locked"); | |||
return ERROR_OK; | |||
} | |||
@@ -946,7 +946,7 @@ COMMAND_HANDLER(stm32x_handle_unlock_command) | |||
if (CMD_ARGC < 1) | |||
{ | |||
command_print(cmd_ctx, "stm32x unlock <bank>"); | |||
command_print(CMD_CTX, "stm32x unlock <bank>"); | |||
return ERROR_OK; | |||
} | |||
@@ -967,17 +967,17 @@ COMMAND_HANDLER(stm32x_handle_unlock_command) | |||
if (stm32x_erase_options(bank) != ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "stm32x failed to unlock device"); | |||
command_print(CMD_CTX, "stm32x failed to unlock device"); | |||
return ERROR_OK; | |||
} | |||
if (stm32x_write_options(bank) != ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "stm32x failed to lock device"); | |||
command_print(CMD_CTX, "stm32x failed to lock device"); | |||
return ERROR_OK; | |||
} | |||
command_print(cmd_ctx, "stm32x unlocked"); | |||
command_print(CMD_CTX, "stm32x unlocked"); | |||
return ERROR_OK; | |||
} | |||
@@ -990,7 +990,7 @@ COMMAND_HANDLER(stm32x_handle_options_read_command) | |||
if (CMD_ARGC < 1) | |||
{ | |||
command_print(cmd_ctx, "stm32x options_read <bank>"); | |||
command_print(CMD_CTX, "stm32x options_read <bank>"); | |||
return ERROR_OK; | |||
} | |||
@@ -1010,30 +1010,30 @@ COMMAND_HANDLER(stm32x_handle_options_read_command) | |||
} | |||
target_read_u32(target, STM32_FLASH_OBR, &optionbyte); | |||
command_print(cmd_ctx, "Option Byte: 0x%" PRIx32 "", optionbyte); | |||
command_print(CMD_CTX, "Option Byte: 0x%" PRIx32 "", optionbyte); | |||
if (buf_get_u32((uint8_t*)&optionbyte, OPT_ERROR, 1)) | |||
command_print(cmd_ctx, "Option Byte Complement Error"); | |||
command_print(CMD_CTX, "Option Byte Complement Error"); | |||
if (buf_get_u32((uint8_t*)&optionbyte, OPT_READOUT, 1)) | |||
command_print(cmd_ctx, "Readout Protection On"); | |||
command_print(CMD_CTX, "Readout Protection On"); | |||
else | |||
command_print(cmd_ctx, "Readout Protection Off"); | |||
command_print(CMD_CTX, "Readout Protection Off"); | |||
if (buf_get_u32((uint8_t*)&optionbyte, OPT_RDWDGSW, 1)) | |||
command_print(cmd_ctx, "Software Watchdog"); | |||
command_print(CMD_CTX, "Software Watchdog"); | |||
else | |||
command_print(cmd_ctx, "Hardware Watchdog"); | |||
command_print(CMD_CTX, "Hardware Watchdog"); | |||
if (buf_get_u32((uint8_t*)&optionbyte, OPT_RDRSTSTOP, 1)) | |||
command_print(cmd_ctx, "Stop: No reset generated"); | |||
command_print(CMD_CTX, "Stop: No reset generated"); | |||
else | |||
command_print(cmd_ctx, "Stop: Reset generated"); | |||
command_print(CMD_CTX, "Stop: Reset generated"); | |||
if (buf_get_u32((uint8_t*)&optionbyte, OPT_RDRSTSTDBY, 1)) | |||
command_print(cmd_ctx, "Standby: No reset generated"); | |||
command_print(CMD_CTX, "Standby: No reset generated"); | |||
else | |||
command_print(cmd_ctx, "Standby: Reset generated"); | |||
command_print(CMD_CTX, "Standby: Reset generated"); | |||
return ERROR_OK; | |||
} | |||
@@ -1046,7 +1046,7 @@ COMMAND_HANDLER(stm32x_handle_options_write_command) | |||
if (CMD_ARGC < 4) | |||
{ | |||
command_print(cmd_ctx, "stm32x options_write <bank> <SWWDG | HWWDG> <RSTSTNDBY | NORSTSTNDBY> <RSTSTOP | NORSTSTOP>"); | |||
command_print(CMD_CTX, "stm32x options_write <bank> <SWWDG | HWWDG> <RSTSTNDBY | NORSTSTNDBY> <RSTSTOP | NORSTSTOP>"); | |||
return ERROR_OK; | |||
} | |||
@@ -1094,7 +1094,7 @@ COMMAND_HANDLER(stm32x_handle_options_write_command) | |||
if (stm32x_erase_options(bank) != ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "stm32x failed to erase options"); | |||
command_print(CMD_CTX, "stm32x failed to erase options"); | |||
return ERROR_OK; | |||
} | |||
@@ -1102,11 +1102,11 @@ COMMAND_HANDLER(stm32x_handle_options_write_command) | |||
if (stm32x_write_options(bank) != ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "stm32x failed to write options"); | |||
command_print(CMD_CTX, "stm32x failed to write options"); | |||
return ERROR_OK; | |||
} | |||
command_print(cmd_ctx, "stm32x write options complete"); | |||
command_print(CMD_CTX, "stm32x write options complete"); | |||
return ERROR_OK; | |||
} | |||
@@ -1155,7 +1155,7 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command) | |||
if (CMD_ARGC < 1) | |||
{ | |||
command_print(cmd_ctx, "stm32x mass_erase <bank>"); | |||
command_print(CMD_CTX, "stm32x mass_erase <bank>"); | |||
return ERROR_OK; | |||
} | |||
@@ -1172,11 +1172,11 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command) | |||
bank->sectors[i].is_erased = 1; | |||
} | |||
command_print(cmd_ctx, "stm32x mass erase complete"); | |||
command_print(CMD_CTX, "stm32x mass erase complete"); | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "stm32x mass erase failed"); | |||
command_print(CMD_CTX, "stm32x mass erase failed"); | |||
} | |||
return ERROR_OK; | |||
@@ -613,7 +613,7 @@ COMMAND_HANDLER(str7x_handle_disable_jtag_command) | |||
if (CMD_ARGC < 1) | |||
{ | |||
command_print(cmd_ctx, "str7x disable_jtag <bank>"); | |||
command_print(CMD_CTX, "str7x disable_jtag <bank>"); | |||
return ERROR_OK; | |||
} | |||
@@ -759,7 +759,7 @@ COMMAND_HANDLER(str9xpec_handle_part_id_command) | |||
idcode = buf_get_u32(buffer, 0, 32); | |||
command_print(cmd_ctx, "str9xpec part id: 0x%8.8" PRIx32 "", idcode); | |||
command_print(CMD_CTX, "str9xpec part id: 0x%8.8" PRIx32 "", idcode); | |||
free(buffer); | |||
@@ -784,7 +784,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_read_command) | |||
if (CMD_ARGC < 1) | |||
{ | |||
command_print(cmd_ctx, "str9xpec options_read <bank>"); | |||
command_print(CMD_CTX, "str9xpec options_read <bank>"); | |||
return ERROR_OK; | |||
} | |||
@@ -802,33 +802,33 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_read_command) | |||
/* boot bank */ | |||
if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_CSMAPBIT, 1)) | |||
command_print(cmd_ctx, "CS Map: bank1"); | |||
command_print(CMD_CTX, "CS Map: bank1"); | |||
else | |||
command_print(cmd_ctx, "CS Map: bank0"); | |||
command_print(CMD_CTX, "CS Map: bank0"); | |||
/* OTP lock */ | |||
if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_OTPBIT, 1)) | |||
command_print(cmd_ctx, "OTP Lock: OTP Locked"); | |||
command_print(CMD_CTX, "OTP Lock: OTP Locked"); | |||
else | |||
command_print(cmd_ctx, "OTP Lock: OTP Unlocked"); | |||
command_print(CMD_CTX, "OTP Lock: OTP Unlocked"); | |||
/* LVD Threshold */ | |||
if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDTHRESBIT, 1)) | |||
command_print(cmd_ctx, "LVD Threshold: 2.7v"); | |||
command_print(CMD_CTX, "LVD Threshold: 2.7v"); | |||
else | |||
command_print(cmd_ctx, "LVD Threshold: 2.4v"); | |||
command_print(CMD_CTX, "LVD Threshold: 2.4v"); | |||
/* LVD reset warning */ | |||
if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDWARNBIT, 1)) | |||
command_print(cmd_ctx, "LVD Reset Warning: VDD or VDDQ Inputs"); | |||
command_print(CMD_CTX, "LVD Reset Warning: VDD or VDDQ Inputs"); | |||
else | |||
command_print(cmd_ctx, "LVD Reset Warning: VDD Input Only"); | |||
command_print(CMD_CTX, "LVD Reset Warning: VDD Input Only"); | |||
/* LVD reset select */ | |||
if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDSELBIT, 1)) | |||
command_print(cmd_ctx, "LVD Reset Selection: VDD or VDDQ Inputs"); | |||
command_print(CMD_CTX, "LVD Reset Selection: VDD or VDDQ Inputs"); | |||
else | |||
command_print(cmd_ctx, "LVD Reset Selection: VDD Input Only"); | |||
command_print(CMD_CTX, "LVD Reset Selection: VDD Input Only"); | |||
return ERROR_OK; | |||
} | |||
@@ -900,7 +900,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_write_command) | |||
if (CMD_ARGC < 1) | |||
{ | |||
command_print(cmd_ctx, "str9xpec options_write <bank>"); | |||
command_print(CMD_CTX, "str9xpec options_write <bank>"); | |||
return ERROR_OK; | |||
} | |||
@@ -923,7 +923,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_cmap_command) | |||
if (CMD_ARGC < 2) | |||
{ | |||
command_print(cmd_ctx, "str9xpec options_cmap <bank> <bank0 | bank1>"); | |||
command_print(CMD_CTX, "str9xpec options_cmap <bank> <bank0 | bank1>"); | |||
return ERROR_OK; | |||
} | |||
@@ -952,7 +952,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_lvdthd_command) | |||
if (CMD_ARGC < 2) | |||
{ | |||
command_print(cmd_ctx, "str9xpec options_lvdthd <bank> <2.4v | 2.7v>"); | |||
command_print(CMD_CTX, "str9xpec options_lvdthd <bank> <2.4v | 2.7v>"); | |||
return ERROR_OK; | |||
} | |||
@@ -981,7 +981,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_lvdsel_command) | |||
if (CMD_ARGC < 2) | |||
{ | |||
command_print(cmd_ctx, "str9xpec options_lvdsel <bank> <vdd | vdd_vddq>"); | |||
command_print(CMD_CTX, "str9xpec options_lvdsel <bank> <vdd | vdd_vddq>"); | |||
return ERROR_OK; | |||
} | |||
@@ -1010,7 +1010,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_lvdwarn_command) | |||
if (CMD_ARGC < 2) | |||
{ | |||
command_print(cmd_ctx, "str9xpec options_lvdwarn <bank> <vdd | vdd_vddq>"); | |||
command_print(CMD_CTX, "str9xpec options_lvdwarn <bank> <vdd | vdd_vddq>"); | |||
return ERROR_OK; | |||
} | |||
@@ -1039,7 +1039,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_lock_command) | |||
if (CMD_ARGC < 1) | |||
{ | |||
command_print(cmd_ctx, "str9xpec lock <bank>"); | |||
command_print(CMD_CTX, "str9xpec lock <bank>"); | |||
return ERROR_OK; | |||
} | |||
@@ -1062,7 +1062,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_unlock_command) | |||
if (CMD_ARGC < 1) | |||
{ | |||
command_print(cmd_ctx, "str9xpec unlock <bank>"); | |||
command_print(CMD_CTX, "str9xpec unlock <bank>"); | |||
return ERROR_OK; | |||
} | |||
@@ -1088,7 +1088,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_enable_turbo_command) | |||
if (CMD_ARGC < 1) | |||
{ | |||
command_print(cmd_ctx, "str9xpec enable_turbo <bank>"); | |||
command_print(CMD_CTX, "str9xpec enable_turbo <bank>"); | |||
return ERROR_OK; | |||
} | |||
@@ -1106,14 +1106,14 @@ COMMAND_HANDLER(str9xpec_handle_flash_enable_turbo_command) | |||
if (tap1 == NULL) | |||
{ | |||
/* things are *WRONG* */ | |||
command_print(cmd_ctx,"**STR9FLASH** (tap1) invalid chain?"); | |||
command_print(CMD_CTX,"**STR9FLASH** (tap1) invalid chain?"); | |||
return ERROR_OK; | |||
} | |||
tap2 = tap1->next_tap; | |||
if (tap2 == NULL) | |||
{ | |||
/* things are *WRONG* */ | |||
command_print(cmd_ctx,"**STR9FLASH** (tap2) invalid chain?"); | |||
command_print(CMD_CTX,"**STR9FLASH** (tap2) invalid chain?"); | |||
return ERROR_OK; | |||
} | |||
@@ -1135,7 +1135,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_disable_turbo_command) | |||
if (CMD_ARGC < 1) | |||
{ | |||
command_print(cmd_ctx, "str9xpec disable_turbo <bank>"); | |||
command_print(CMD_CTX, "str9xpec disable_turbo <bank>"); | |||
return ERROR_OK; | |||
} | |||
@@ -293,7 +293,7 @@ COMMAND_HANDLER(tms470_handle_flash_keyset_command) | |||
{ | |||
if (CMD_ARGC > 4) | |||
{ | |||
command_print(cmd_ctx, "tms470 flash_keyset <key0> <key1> <key2> <key3>"); | |||
command_print(CMD_CTX, "tms470 flash_keyset <key0> <key1> <key2> <key3>"); | |||
return ERROR_INVALID_ARGUMENTS; | |||
} | |||
else if (CMD_ARGC == 4) | |||
@@ -306,7 +306,7 @@ COMMAND_HANDLER(tms470_handle_flash_keyset_command) | |||
if (1 != sscanf(&CMD_ARGV[i][start], "%" SCNx32 "", &flashKeys[i])) | |||
{ | |||
command_print(cmd_ctx, "could not process flash key %s", CMD_ARGV[i]); | |||
command_print(CMD_CTX, "could not process flash key %s", CMD_ARGV[i]); | |||
LOG_ERROR("could not process flash key %s", CMD_ARGV[i]); | |||
return ERROR_INVALID_ARGUMENTS; | |||
} | |||
@@ -316,18 +316,18 @@ COMMAND_HANDLER(tms470_handle_flash_keyset_command) | |||
} | |||
else if (CMD_ARGC != 0) | |||
{ | |||
command_print(cmd_ctx, "tms470 flash_keyset <key0> <key1> <key2> <key3>"); | |||
command_print(CMD_CTX, "tms470 flash_keyset <key0> <key1> <key2> <key3>"); | |||
return ERROR_INVALID_ARGUMENTS; | |||
} | |||
if (keysSet) | |||
{ | |||
command_print(cmd_ctx, "using flash keys 0x%08" PRIx32 ", 0x%08" PRIx32 ", 0x%08" PRIx32 ", 0x%08" PRIx32 "", | |||
command_print(CMD_CTX, "using flash keys 0x%08" PRIx32 ", 0x%08" PRIx32 ", 0x%08" PRIx32 ", 0x%08" PRIx32 "", | |||
flashKeys[0], flashKeys[1], flashKeys[2], flashKeys[3]); | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "flash keys not set"); | |||
command_print(CMD_CTX, "flash keys not set"); | |||
} | |||
return ERROR_OK; | |||
@@ -357,7 +357,7 @@ COMMAND_HANDLER(tms470_handle_osc_megahertz_command) | |||
{ | |||
if (CMD_ARGC > 1) | |||
{ | |||
command_print(cmd_ctx, "tms470 osc_megahertz <MHz>"); | |||
command_print(CMD_CTX, "tms470 osc_megahertz <MHz>"); | |||
return ERROR_INVALID_ARGUMENTS; | |||
} | |||
else if (CMD_ARGC == 1) | |||
@@ -368,12 +368,12 @@ COMMAND_HANDLER(tms470_handle_osc_megahertz_command) | |||
if (oscMHz <= 0) | |||
{ | |||
LOG_ERROR("osc_megahertz must be positive and non-zero!"); | |||
command_print(cmd_ctx, "osc_megahertz must be positive and non-zero!"); | |||
command_print(CMD_CTX, "osc_megahertz must be positive and non-zero!"); | |||
oscMHz = 12; | |||
return ERROR_INVALID_ARGUMENTS; | |||
} | |||
command_print(cmd_ctx, "osc_megahertz=%d", oscMHz); | |||
command_print(CMD_CTX, "osc_megahertz=%d", oscMHz); | |||
return ERROR_OK; | |||
} | |||
@@ -386,7 +386,7 @@ COMMAND_HANDLER(tms470_handle_plldis_command) | |||
{ | |||
if (CMD_ARGC > 1) | |||
{ | |||
command_print(cmd_ctx, "tms470 plldis <0 | 1>"); | |||
command_print(CMD_CTX, "tms470 plldis <0 | 1>"); | |||
return ERROR_INVALID_ARGUMENTS; | |||
} | |||
else if (CMD_ARGC == 1) | |||
@@ -395,7 +395,7 @@ COMMAND_HANDLER(tms470_handle_plldis_command) | |||
plldis = plldis ? 1 : 0; | |||
} | |||
command_print(cmd_ctx, "plldis=%d", plldis); | |||
command_print(CMD_CTX, "plldis=%d", plldis); | |||
return ERROR_OK; | |||
} | |||
@@ -44,7 +44,7 @@ COMMAND_HANDLER(handle_hello_command) | |||
const char *sep, *name; | |||
int retval = CALL_COMMAND_HANDLER(handle_hello_args, &sep, &name); | |||
if (ERROR_OK == retval) | |||
command_print(cmd_ctx, "Greetings%s%s!", sep, name); | |||
command_print(CMD_CTX, "Greetings%s%s!", sep, name); | |||
return retval; | |||
} | |||
@@ -244,7 +244,7 @@ DECLARE_PARSE_WRAPPER(_s8, int8_t); | |||
do { \ | |||
int retval = parse_##type(in, &(out)); \ | |||
if (ERROR_OK != retval) { \ | |||
command_print(cmd_ctx, stringify(out) \ | |||
command_print(CMD_CTX, stringify(out) \ | |||
" option value ('%s') is not valid", in); \ | |||
return retval; \ | |||
} \ | |||
@@ -61,13 +61,13 @@ COMMAND_HANDLER(handle_rm_command) | |||
{ | |||
if (CMD_ARGC != 1) | |||
{ | |||
command_print(cmd_ctx, "rm <filename>"); | |||
command_print(CMD_CTX, "rm <filename>"); | |||
return ERROR_INVALID_ARGUMENTS; | |||
} | |||
if (unlink(CMD_ARGV[0]) != 0) | |||
{ | |||
command_print(cmd_ctx, "failed: %d", errno); | |||
command_print(CMD_CTX, "failed: %d", errno); | |||
} | |||
return ERROR_OK; | |||
@@ -137,7 +137,7 @@ COMMAND_HANDLER(handle_cat_command) | |||
{ | |||
if (CMD_ARGC != 1) | |||
{ | |||
command_print(cmd_ctx, "cat <filename>"); | |||
command_print(CMD_CTX, "cat <filename>"); | |||
return ERROR_INVALID_ARGUMENTS; | |||
} | |||
@@ -148,12 +148,12 @@ COMMAND_HANDLER(handle_cat_command) | |||
int retval = loadFile(CMD_ARGV[0], &data, &len); | |||
if (retval == ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "%s", (char *)data); | |||
command_print(CMD_CTX, "%s", (char *)data); | |||
free(data); | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "%s not found %d", CMD_ARGV[0], retval); | |||
command_print(CMD_CTX, "%s not found %d", CMD_ARGV[0], retval); | |||
} | |||
return ERROR_OK; | |||
@@ -163,7 +163,7 @@ COMMAND_HANDLER(handle_trunc_command) | |||
{ | |||
if (CMD_ARGC != 1) | |||
{ | |||
command_print(cmd_ctx, "trunc <filename>"); | |||
command_print(CMD_CTX, "trunc <filename>"); | |||
return ERROR_INVALID_ARGUMENTS; | |||
} | |||
@@ -182,7 +182,7 @@ COMMAND_HANDLER(handle_meminfo_command) | |||
if (CMD_ARGC != 0) | |||
{ | |||
command_print(cmd_ctx, "meminfo"); | |||
command_print(CMD_CTX, "meminfo"); | |||
return ERROR_INVALID_ARGUMENTS; | |||
} | |||
@@ -190,11 +190,11 @@ COMMAND_HANDLER(handle_meminfo_command) | |||
if (prev > 0) | |||
{ | |||
command_print(cmd_ctx, "Diff: %d", prev - info.fordblks); | |||
command_print(CMD_CTX, "Diff: %d", prev - info.fordblks); | |||
} | |||
prev = info.fordblks; | |||
command_print(cmd_ctx, "Available ram: %d", info.fordblks); | |||
command_print(CMD_CTX, "Available ram: %d", info.fordblks); | |||
return ERROR_OK; | |||
} | |||
@@ -204,7 +204,7 @@ COMMAND_HANDLER(handle_append_command) | |||
{ | |||
if (CMD_ARGC < 1) | |||
{ | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
"append <filename> [<string1>, [<string2>, ...]]"); | |||
return ERROR_INVALID_ARGUMENTS; | |||
} | |||
@@ -276,7 +276,7 @@ COMMAND_HANDLER(handle_cp_command) | |||
break; | |||
} | |||
command_print(cmd_ctx, "%zu", len - pos); | |||
command_print(CMD_CTX, "%zu", len - pos); | |||
pos += chunk; | |||
@@ -286,10 +286,10 @@ COMMAND_HANDLER(handle_cp_command) | |||
if (retval == ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "Copied %s to %s", CMD_ARGV[0], CMD_ARGV[1]); | |||
command_print(CMD_CTX, "Copied %s to %s", CMD_ARGV[0], CMD_ARGV[1]); | |||
} else | |||
{ | |||
command_print(cmd_ctx, "Failed: %d", retval); | |||
command_print(CMD_CTX, "Failed: %d", retval); | |||
} | |||
if (data != NULL) | |||
@@ -296,7 +296,7 @@ COMMAND_HANDLER(handle_debug_level_command) | |||
} | |||
} | |||
command_print(cmd_ctx, "debug_level: %i", debug_level); | |||
command_print(CMD_CTX, "debug_level: %i", debug_level); | |||
return ERROR_OK; | |||
} | |||
@@ -513,7 +513,7 @@ COMMAND_HANDLER(amt_jtagaccel_handle_parport_port_command) | |||
} | |||
} | |||
command_print(cmd_ctx, "parport port = %u", amt_jtagaccel_port); | |||
command_print(CMD_CTX, "parport port = %u", amt_jtagaccel_port); | |||
return ERROR_OK; | |||
} | |||
@@ -522,7 +522,7 @@ COMMAND_HANDLER(amt_jtagaccel_handle_rtck_command) | |||
{ | |||
if (CMD_ARGC == 0) | |||
{ | |||
command_print(cmd_ctx, "amt_jtagaccel RTCK feature %s", (rtck_enabled) ? "enabled" : "disabled"); | |||
command_print(CMD_CTX, "amt_jtagaccel RTCK feature %s", (rtck_enabled) ? "enabled" : "disabled"); | |||
return ERROR_OK; | |||
} | |||
else | |||
@@ -557,7 +557,7 @@ COMMAND_HANDLER(gw16012_handle_parport_port_command) | |||
} | |||
} | |||
command_print(cmd_ctx, "parport port = %u", gw16012_port); | |||
command_print(CMD_CTX, "parport port = %u", gw16012_port); | |||
return ERROR_OK; | |||
} | |||
@@ -629,7 +629,7 @@ COMMAND_HANDLER(jlink_handle_jlink_hw_jtag_command) | |||
{ | |||
switch (CMD_ARGC) { | |||
case 0: | |||
command_print(cmd_ctx, "jlink hw jtag %i", jlink_hw_jtag_version); | |||
command_print(CMD_CTX, "jlink hw jtag %i", jlink_hw_jtag_version); | |||
break; | |||
case 1: { | |||
int request_version = atoi(CMD_ARGV[0]); | |||
@@ -425,7 +425,7 @@ COMMAND_HANDLER(parport_handle_parport_port_command) | |||
} | |||
} | |||
command_print(cmd_ctx, "parport port = %u", parport_port); | |||
command_print(CMD_CTX, "parport port = %u", parport_port); | |||
return ERROR_OK; | |||
} | |||
@@ -449,7 +449,7 @@ COMMAND_HANDLER(parport_handle_write_on_exit_command) | |||
{ | |||
if (CMD_ARGC != 1) | |||
{ | |||
command_print(cmd_ctx, "usage: parport_write_on_exit <on | off>"); | |||
command_print(CMD_CTX, "usage: parport_write_on_exit <on | off>"); | |||
return ERROR_OK; | |||
} | |||
@@ -479,7 +479,7 @@ COMMAND_HANDLER(parport_handle_parport_toggling_time_command) | |||
wait_states = jtag_get_speed(); | |||
} | |||
command_print(cmd_ctx, "parport toggling time = %" PRIu32 " ns", | |||
command_print(CMD_CTX, "parport toggling time = %" PRIu32 " ns", | |||
parport_toggling_time_ns); | |||
return ERROR_OK; | |||
@@ -608,11 +608,11 @@ COMMAND_HANDLER(handle_interface_list_command) | |||
if (strcmp(CMD_NAME, "interface_list") == 0 && CMD_ARGC > 0) | |||
return ERROR_COMMAND_SYNTAX_ERROR; | |||
command_print(cmd_ctx, "The following JTAG interfaces are available:"); | |||
command_print(CMD_CTX, "The following JTAG interfaces are available:"); | |||
for (unsigned i = 0; NULL != jtag_interfaces[i]; i++) | |||
{ | |||
const char *name = jtag_interfaces[i]->name; | |||
command_print(cmd_ctx, "%u: %s", i + 1, name); | |||
command_print(CMD_CTX, "%u: %s", i + 1, name); | |||
} | |||
return ERROR_OK; | |||
@@ -636,7 +636,7 @@ COMMAND_HANDLER(handle_interface_command) | |||
if (strcmp(CMD_ARGV[0], jtag_interfaces[i]->name) != 0) | |||
continue; | |||
int retval = jtag_interfaces[i]->register_commands(cmd_ctx); | |||
int retval = jtag_interfaces[i]->register_commands(CMD_CTX); | |||
if (ERROR_OK != retval) | |||
return retval; | |||
@@ -667,8 +667,8 @@ COMMAND_HANDLER(handle_scan_chain_command) | |||
struct jtag_tap *tap; | |||
tap = jtag_all_taps(); | |||
command_print(cmd_ctx, " TapName | Enabled | IdCode Expected IrLen IrCap IrMask Instr "); | |||
command_print(cmd_ctx, "---|--------------------|---------|------------|------------|------|------|------|---------"); | |||
command_print(CMD_CTX, " TapName | Enabled | IdCode Expected IrLen IrCap IrMask Instr "); | |||
command_print(CMD_CTX, "---|--------------------|---------|------------|------------|------|------|------|---------"); | |||
while (tap) { | |||
uint32_t expected, expected_mask, cur_instr, ii; | |||
@@ -676,7 +676,7 @@ COMMAND_HANDLER(handle_scan_chain_command) | |||
expected_mask = buf_get_u32(tap->expected_mask, 0, tap->ir_length); | |||
cur_instr = buf_get_u32(tap->cur_instr, 0, tap->ir_length); | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
"%2d | %-18s | %c | 0x%08x | 0x%08x | 0x%02x | 0x%02x | 0x%02x | 0x%02x", | |||
tap->abs_chain_position, | |||
tap->dotted_name, | |||
@@ -689,7 +689,7 @@ COMMAND_HANDLER(handle_scan_chain_command) | |||
(unsigned int)(cur_instr)); | |||
for (ii = 1; ii < tap->expected_ids_cnt; ii++) { | |||
command_print(cmd_ctx, " | | | | 0x%08x | | | | ", | |||
command_print(CMD_CTX, " | | | | 0x%08x | | | | ", | |||
(unsigned int)(tap->expected_ids[ii])); | |||
} | |||
@@ -888,7 +888,7 @@ next: | |||
modes[4] = ""; | |||
} | |||
command_print(cmd_ctx, "%s %s%s%s%s", | |||
command_print(CMD_CTX, "%s %s%s%s%s", | |||
modes[0], modes[1], | |||
modes[2], modes[3], modes[4]); | |||
@@ -906,7 +906,7 @@ COMMAND_HANDLER(handle_jtag_nsrst_delay_command) | |||
jtag_set_nsrst_delay(delay); | |||
} | |||
command_print(cmd_ctx, "jtag_nsrst_delay: %u", jtag_get_nsrst_delay()); | |||
command_print(CMD_CTX, "jtag_nsrst_delay: %u", jtag_get_nsrst_delay()); | |||
return ERROR_OK; | |||
} | |||
@@ -921,7 +921,7 @@ COMMAND_HANDLER(handle_jtag_ntrst_delay_command) | |||
jtag_set_ntrst_delay(delay); | |||
} | |||
command_print(cmd_ctx, "jtag_ntrst_delay: %u", jtag_get_ntrst_delay()); | |||
command_print(CMD_CTX, "jtag_ntrst_delay: %u", jtag_get_ntrst_delay()); | |||
return ERROR_OK; | |||
} | |||
@@ -936,7 +936,7 @@ COMMAND_HANDLER(handle_jtag_nsrst_assert_width_command) | |||
jtag_set_nsrst_assert_width(delay); | |||
} | |||
command_print(cmd_ctx, "jtag_nsrst_assert_width: %u", jtag_get_nsrst_assert_width()); | |||
command_print(CMD_CTX, "jtag_nsrst_assert_width: %u", jtag_get_nsrst_assert_width()); | |||
return ERROR_OK; | |||
} | |||
@@ -951,7 +951,7 @@ COMMAND_HANDLER(handle_jtag_ntrst_assert_width_command) | |||
jtag_set_ntrst_assert_width(delay); | |||
} | |||
command_print(cmd_ctx, "jtag_ntrst_assert_width: %u", jtag_get_ntrst_assert_width()); | |||
command_print(CMD_CTX, "jtag_ntrst_assert_width: %u", jtag_get_ntrst_assert_width()); | |||
return ERROR_OK; | |||
} | |||
@@ -977,9 +977,9 @@ COMMAND_HANDLER(handle_jtag_khz_command) | |||
return retval; | |||
if (cur_speed) | |||
command_print(cmd_ctx, "%d kHz", cur_speed); | |||
command_print(CMD_CTX, "%d kHz", cur_speed); | |||
else | |||
command_print(cmd_ctx, "RCLK - adaptive"); | |||
command_print(CMD_CTX, "RCLK - adaptive"); | |||
return retval; | |||
} | |||
@@ -1006,9 +1006,9 @@ COMMAND_HANDLER(handle_jtag_rclk_command) | |||
return retval; | |||
if (cur_khz) | |||
command_print(cmd_ctx, "RCLK not supported - fallback to %d kHz", cur_khz); | |||
command_print(CMD_CTX, "RCLK not supported - fallback to %d kHz", cur_khz); | |||
else | |||
command_print(cmd_ctx, "RCLK - adaptive"); | |||
command_print(CMD_CTX, "RCLK - adaptive"); | |||
return retval; | |||
} | |||
@@ -1034,7 +1034,7 @@ COMMAND_HANDLER(handle_jtag_reset_command) | |||
else | |||
return ERROR_COMMAND_SYNTAX_ERROR; | |||
if (jtag_interface_init(cmd_ctx) != ERROR_OK) | |||
if (jtag_interface_init(CMD_CTX) != ERROR_OK) | |||
return ERROR_JTAG_INIT_FAILED; | |||
jtag_add_reset(trst, srst); | |||
@@ -1122,7 +1122,7 @@ COMMAND_HANDLER(handle_irscan_command) | |||
for (j = 0; j < i; j++) | |||
free(fields[j].out_value); | |||
free(fields); | |||
command_print(cmd_ctx, "Tap: %s unknown", CMD_ARGV[i*2]); | |||
command_print(CMD_CTX, "Tap: %s unknown", CMD_ARGV[i*2]); | |||
return ERROR_FAIL; | |||
} | |||
@@ -1366,7 +1366,7 @@ COMMAND_HANDLER(handle_verify_ircapture_command) | |||
} | |||
const char *status = jtag_will_verify_capture_ir() ? "enabled": "disabled"; | |||
command_print(cmd_ctx, "verify Capture-IR is %s", status); | |||
command_print(CMD_CTX, "verify Capture-IR is %s", status); | |||
return ERROR_OK; | |||
} | |||
@@ -1387,7 +1387,7 @@ COMMAND_HANDLER(handle_verify_jtag_command) | |||
} | |||
const char *status = jtag_will_verify() ? "enabled": "disabled"; | |||
command_print(cmd_ctx, "verify jtag capture is %s", status); | |||
command_print(CMD_CTX, "verify jtag capture is %s", status); | |||
return ERROR_OK; | |||
} | |||
@@ -1410,7 +1410,7 @@ COMMAND_HANDLER(handle_tms_sequence_command) | |||
tap_use_new_tms_table(use_new_table); | |||
} | |||
command_print(cmd_ctx, "tms sequence is %s", | |||
command_print(CMD_CTX, "tms sequence is %s", | |||
tap_uses_new_tms_table() ? "short": "long"); | |||
return ERROR_OK; | |||
@@ -55,7 +55,7 @@ COMMAND_HANDLER(handle_version_command) | |||
if (CMD_ARGC != 0) | |||
return ERROR_COMMAND_SYNTAX_ERROR; | |||
command_print(cmd_ctx, OPENOCD_VERSION); | |||
command_print(CMD_CTX, OPENOCD_VERSION); | |||
return ERROR_OK; | |||
} | |||
@@ -107,11 +107,11 @@ COMMAND_HANDLER(handle_init_command) | |||
atexit(exit_handler); | |||
if (target_init(cmd_ctx) != ERROR_OK) | |||
if (target_init(CMD_CTX) != ERROR_OK) | |||
return ERROR_FAIL; | |||
LOG_DEBUG("target init complete"); | |||
if ((retval = jtag_interface_init(cmd_ctx)) != ERROR_OK) | |||
if ((retval = jtag_interface_init(CMD_CTX)) != ERROR_OK) | |||
{ | |||
/* we must be able to set up the jtag interface */ | |||
return retval; | |||
@@ -120,7 +120,7 @@ COMMAND_HANDLER(handle_init_command) | |||
/* Try to initialize & examine the JTAG chain at this point, but | |||
* continue startup regardless */ | |||
if (jtag_init(cmd_ctx) == ERROR_OK) | |||
if (jtag_init(CMD_CTX) == ERROR_OK) | |||
{ | |||
LOG_DEBUG("jtag init complete"); | |||
if (target_examine() == ERROR_OK) | |||
@@ -129,19 +129,19 @@ COMMAND_HANDLER(handle_init_command) | |||
} | |||
} | |||
if (flash_init_drivers(cmd_ctx) != ERROR_OK) | |||
if (flash_init_drivers(CMD_CTX) != ERROR_OK) | |||
return ERROR_FAIL; | |||
LOG_DEBUG("flash init complete"); | |||
if (mflash_init_drivers(cmd_ctx) != ERROR_OK) | |||
if (mflash_init_drivers(CMD_CTX) != ERROR_OK) | |||
return ERROR_FAIL; | |||
LOG_DEBUG("mflash init complete"); | |||
if (nand_init(cmd_ctx) != ERROR_OK) | |||
if (nand_init(CMD_CTX) != ERROR_OK) | |||
return ERROR_FAIL; | |||
LOG_DEBUG("NAND init complete"); | |||
if (pld_init(cmd_ctx) != ERROR_OK) | |||
if (pld_init(CMD_CTX) != ERROR_OK) | |||
return ERROR_FAIL; | |||
LOG_DEBUG("pld init complete"); | |||
@@ -153,7 +153,7 @@ COMMAND_HANDLER(handle_init_command) | |||
gdb_init(); | |||
tcl_init(); /* allows tcl to just connect without going thru telnet */ | |||
target_register_event_callback(log_target_callback_event_handler, cmd_ctx); | |||
target_register_event_callback(log_target_callback_event_handler, CMD_CTX); | |||
return ERROR_OK; | |||
} | |||
@@ -75,7 +75,7 @@ COMMAND_HANDLER(handle_pld_device_command) | |||
struct pld_device *p, *c; | |||
/* register pld specific commands */ | |||
if (pld_drivers[i]->register_commands(cmd_ctx) != ERROR_OK) | |||
if (pld_drivers[i]->register_commands(CMD_CTX) != ERROR_OK) | |||
{ | |||
LOG_ERROR("couldn't register '%s' commands", CMD_ARGV[0]); | |||
exit(-1); | |||
@@ -127,13 +127,13 @@ COMMAND_HANDLER(handle_pld_devices_command) | |||
if (!pld_devices) | |||
{ | |||
command_print(cmd_ctx, "no pld devices configured"); | |||
command_print(CMD_CTX, "no pld devices configured"); | |||
return ERROR_OK; | |||
} | |||
for (p = pld_devices; p; p = p->next) | |||
{ | |||
command_print(cmd_ctx, "#%i: %s", i++, p->driver->name); | |||
command_print(CMD_CTX, "#%i: %s", i++, p->driver->name); | |||
} | |||
return ERROR_OK; | |||
@@ -149,7 +149,7 @@ COMMAND_HANDLER(handle_pld_load_command) | |||
if (CMD_ARGC < 2) | |||
{ | |||
command_print(cmd_ctx, "usage: pld load <device#> <file>"); | |||
command_print(CMD_CTX, "usage: pld load <device#> <file>"); | |||
return ERROR_OK; | |||
} | |||
@@ -158,13 +158,13 @@ COMMAND_HANDLER(handle_pld_load_command) | |||
p = get_pld_device_by_num(dev_id); | |||
if (!p) | |||
{ | |||
command_print(cmd_ctx, "pld device '#%s' is out of bounds", CMD_ARGV[0]); | |||
command_print(CMD_CTX, "pld device '#%s' is out of bounds", CMD_ARGV[0]); | |||
return ERROR_OK; | |||
} | |||
if ((retval = p->driver->load(p, CMD_ARGV[1])) != ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "failed loading file %s to pld device %u", | |||
command_print(CMD_CTX, "failed loading file %s to pld device %u", | |||
CMD_ARGV[1], dev_id); | |||
switch (retval) | |||
{ | |||
@@ -176,7 +176,7 @@ COMMAND_HANDLER(handle_pld_load_command) | |||
gettimeofday(&end, NULL); | |||
timeval_subtract(&duration, &end, &start); | |||
command_print(cmd_ctx, "loaded file %s to pld device %u in %jis %jius", | |||
command_print(CMD_CTX, "loaded file %s to pld device %u in %jis %jius", | |||
CMD_ARGV[1], dev_id, | |||
(intmax_t)duration.tv_sec, (intmax_t)duration.tv_usec); | |||
} | |||
@@ -185,7 +185,7 @@ COMMAND_HANDLER(virtex2_handle_read_stat_command) | |||
if (CMD_ARGC < 1) | |||
{ | |||
command_print(cmd_ctx, "usage: virtex2 read_stat <num>"); | |||
command_print(CMD_CTX, "usage: virtex2 read_stat <num>"); | |||
return ERROR_OK; | |||
} | |||
@@ -194,7 +194,7 @@ COMMAND_HANDLER(virtex2_handle_read_stat_command) | |||
device = get_pld_device_by_num(dev_id); | |||
if (!device) | |||
{ | |||
command_print(cmd_ctx, "pld device '#%s' is out of bounds", CMD_ARGV[0]); | |||
command_print(CMD_CTX, "pld device '#%s' is out of bounds", CMD_ARGV[0]); | |||
return ERROR_OK; | |||
} | |||
@@ -202,7 +202,7 @@ COMMAND_HANDLER(virtex2_handle_read_stat_command) | |||
virtex2_read_stat(device, &status); | |||
command_print(cmd_ctx, "virtex2 status register: 0x%8.8" PRIx32 "", status); | |||
command_print(CMD_CTX, "virtex2 status register: 0x%8.8" PRIx32 "", status); | |||
return ERROR_OK; | |||
} | |||
@@ -221,7 +221,7 @@ PLD_DEVICE_COMMAND_HANDLER(virtex2_pld_device_command) | |||
tap = jtag_tap_by_string(CMD_ARGV[1]); | |||
if (tap == NULL) { | |||
command_print(cmd_ctx, "Tap: %s does not exist", CMD_ARGV[1]); | |||
command_print(CMD_CTX, "Tap: %s does not exist", CMD_ARGV[1]); | |||
return ERROR_OK; | |||
} | |||
@@ -2252,7 +2252,7 @@ COMMAND_HANDLER(handle_gdb_sync_command) | |||
if (current_gdb_connection == NULL) | |||
{ | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
"gdb_sync command can only be run from within gdb using \"monitor gdb_sync\""); | |||
return ERROR_FAIL; | |||
} | |||
@@ -553,7 +553,7 @@ SERVER_PORT_COMMAND() | |||
{ | |||
switch (CMD_ARGC) { | |||
case 0: | |||
command_print(cmd_ctx, "%d", *out); | |||
command_print(CMD_CTX, "%d", *out); | |||
break; | |||
case 1: | |||
{ | |||
@@ -310,7 +310,7 @@ COMMAND_HANDLER(handle_svf_command) | |||
if ((CMD_ARGC < 1) || (CMD_ARGC > (1 + SVF_NUM_OF_OPTIONS))) | |||
{ | |||
command_print(cmd_ctx, "usage: svf <file> [quiet]"); | |||
command_print(CMD_CTX, "usage: svf <file> [quiet]"); | |||
return ERROR_FAIL; | |||
} | |||
@@ -333,7 +333,7 @@ COMMAND_HANDLER(handle_svf_command) | |||
if ((svf_fd = open(CMD_ARGV[0], O_RDONLY)) < 0) | |||
{ | |||
command_print(cmd_ctx, "file \"%s\" not found", CMD_ARGV[0]); | |||
command_print(CMD_CTX, "file \"%s\" not found", CMD_ARGV[0]); | |||
// no need to free anything now | |||
return ERROR_FAIL; | |||
@@ -392,7 +392,7 @@ COMMAND_HANDLER(handle_svf_command) | |||
while (ERROR_OK == svf_read_command_from_file(svf_fd)) | |||
{ | |||
if (ERROR_OK != svf_run_command(cmd_ctx, svf_command_buffer)) | |||
if (ERROR_OK != svf_run_command(CMD_CTX, svf_command_buffer)) | |||
{ | |||
LOG_ERROR("fail to run command at line %d", svf_line_number); | |||
ret = ERROR_FAIL; | |||
@@ -410,7 +410,7 @@ COMMAND_HANDLER(handle_svf_command) | |||
} | |||
// print time | |||
command_print(cmd_ctx, "%lld ms used", timeval_ms() - time_ago); | |||
command_print(CMD_CTX, "%lld ms used", timeval_ms() - time_ago); | |||
free_all: | |||
@@ -457,11 +457,11 @@ free_all: | |||
if (ERROR_OK == ret) | |||
{ | |||
command_print(cmd_ctx, "svf file programmed successfully for %d commands", command_num); | |||
command_print(CMD_CTX, "svf file programmed successfully for %d commands", command_num); | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "svf file programmed failed"); | |||
command_print(CMD_CTX, "svf file programmed failed"); | |||
} | |||
return ret; | |||
@@ -412,11 +412,11 @@ static int arm720t_target_create(struct target *target, Jim_Interp *interp) | |||
COMMAND_HANDLER(arm720t_handle_cp15_command) | |||
{ | |||
int retval; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct arm720t_common *arm720t = target_to_arm720(target); | |||
struct arm_jtag *jtag_info; | |||
retval = arm720t_verify_pointer(cmd_ctx, arm720t); | |||
retval = arm720t_verify_pointer(CMD_CTX, arm720t); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
@@ -424,7 +424,7 @@ COMMAND_HANDLER(arm720t_handle_cp15_command) | |||
if (target->state != TARGET_HALTED) | |||
{ | |||
command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME); | |||
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME); | |||
return ERROR_OK; | |||
} | |||
@@ -439,7 +439,7 @@ COMMAND_HANDLER(arm720t_handle_cp15_command) | |||
uint32_t value; | |||
if ((retval = arm720t_read_cp15(target, opcode, &value)) != ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "couldn't access cp15 with opcode 0x%8.8" PRIx32 "", opcode); | |||
command_print(CMD_CTX, "couldn't access cp15 with opcode 0x%8.8" PRIx32 "", opcode); | |||
return ERROR_OK; | |||
} | |||
@@ -448,7 +448,7 @@ COMMAND_HANDLER(arm720t_handle_cp15_command) | |||
return retval; | |||
} | |||
command_print(cmd_ctx, "0x%8.8" PRIx32 ": 0x%8.8" PRIx32 "", opcode, value); | |||
command_print(CMD_CTX, "0x%8.8" PRIx32 ": 0x%8.8" PRIx32 "", opcode, value); | |||
} | |||
else if (CMD_ARGC == 2) | |||
{ | |||
@@ -457,10 +457,10 @@ COMMAND_HANDLER(arm720t_handle_cp15_command) | |||
if ((retval = arm720t_write_cp15(target, opcode, value)) != ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "couldn't access cp15 with opcode 0x%8.8" PRIx32 "", opcode); | |||
command_print(CMD_CTX, "couldn't access cp15 with opcode 0x%8.8" PRIx32 "", opcode); | |||
return ERROR_OK; | |||
} | |||
command_print(cmd_ctx, "0x%8.8" PRIx32 ": 0x%8.8" PRIx32 "", opcode, value); | |||
command_print(CMD_CTX, "0x%8.8" PRIx32 ": 0x%8.8" PRIx32 "", opcode, value); | |||
} | |||
} | |||
@@ -2750,24 +2750,24 @@ COMMAND_HANDLER(handle_arm7_9_write_xpsr_command) | |||
uint32_t value; | |||
int spsr; | |||
int retval; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct arm7_9_common *arm7_9 = target_to_arm7_9(target); | |||
if (!is_arm7_9(arm7_9)) | |||
{ | |||
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target"); | |||
command_print(CMD_CTX, "current target isn't an ARM7/ARM9 target"); | |||
return ERROR_TARGET_INVALID; | |||
} | |||
if (target->state != TARGET_HALTED) | |||
{ | |||
command_print(cmd_ctx, "can't write registers while running"); | |||
command_print(CMD_CTX, "can't write registers while running"); | |||
return ERROR_FAIL; | |||
} | |||
if (CMD_ARGC < 2) | |||
{ | |||
command_print(cmd_ctx, "usage: write_xpsr <value> <not cpsr | spsr>"); | |||
command_print(CMD_CTX, "usage: write_xpsr <value> <not cpsr | spsr>"); | |||
return ERROR_FAIL; | |||
} | |||
@@ -2794,24 +2794,24 @@ COMMAND_HANDLER(handle_arm7_9_write_xpsr_im8_command) | |||
int rotate; | |||
int spsr; | |||
int retval; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct arm7_9_common *arm7_9 = target_to_arm7_9(target); | |||
if (!is_arm7_9(arm7_9)) | |||
{ | |||
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target"); | |||
command_print(CMD_CTX, "current target isn't an ARM7/ARM9 target"); | |||
return ERROR_TARGET_INVALID; | |||
} | |||
if (target->state != TARGET_HALTED) | |||
{ | |||
command_print(cmd_ctx, "can't write registers while running"); | |||
command_print(CMD_CTX, "can't write registers while running"); | |||
return ERROR_FAIL; | |||
} | |||
if (CMD_ARGC < 3) | |||
{ | |||
command_print(cmd_ctx, "usage: write_xpsr_im8 <im8> <rotate> <not cpsr | spsr>"); | |||
command_print(CMD_CTX, "usage: write_xpsr_im8 <im8> <rotate> <not cpsr | spsr>"); | |||
return ERROR_FAIL; | |||
} | |||
@@ -2834,24 +2834,24 @@ COMMAND_HANDLER(handle_arm7_9_write_core_reg_command) | |||
uint32_t value; | |||
uint32_t mode; | |||
int num; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct arm7_9_common *arm7_9 = target_to_arm7_9(target); | |||
if (!is_arm7_9(arm7_9)) | |||
{ | |||
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target"); | |||
command_print(CMD_CTX, "current target isn't an ARM7/ARM9 target"); | |||
return ERROR_TARGET_INVALID; | |||
} | |||
if (target->state != TARGET_HALTED) | |||
{ | |||
command_print(cmd_ctx, "can't write registers while running"); | |||
command_print(CMD_CTX, "can't write registers while running"); | |||
return ERROR_FAIL; | |||
} | |||
if (CMD_ARGC < 3) | |||
{ | |||
command_print(cmd_ctx, "usage: write_core_reg <num> <mode> <value>"); | |||
command_print(CMD_CTX, "usage: write_core_reg <num> <mode> <value>"); | |||
return ERROR_FAIL; | |||
} | |||
@@ -2864,12 +2864,12 @@ COMMAND_HANDLER(handle_arm7_9_write_core_reg_command) | |||
COMMAND_HANDLER(handle_arm7_9_dbgrq_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct arm7_9_common *arm7_9 = target_to_arm7_9(target); | |||
if (!is_arm7_9(arm7_9)) | |||
{ | |||
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target"); | |||
command_print(CMD_CTX, "current target isn't an ARM7/ARM9 target"); | |||
return ERROR_TARGET_INVALID; | |||
} | |||
@@ -2885,23 +2885,23 @@ COMMAND_HANDLER(handle_arm7_9_dbgrq_command) | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "usage: arm7_9 dbgrq <enable | disable>"); | |||
command_print(CMD_CTX, "usage: arm7_9 dbgrq <enable | disable>"); | |||
} | |||
} | |||
command_print(cmd_ctx, "use of EmbeddedICE dbgrq instead of breakpoint for target halt %s", (arm7_9->use_dbgrq) ? "enabled" : "disabled"); | |||
command_print(CMD_CTX, "use of EmbeddedICE dbgrq instead of breakpoint for target halt %s", (arm7_9->use_dbgrq) ? "enabled" : "disabled"); | |||
return ERROR_OK; | |||
} | |||
COMMAND_HANDLER(handle_arm7_9_fast_memory_access_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct arm7_9_common *arm7_9 = target_to_arm7_9(target); | |||
if (!is_arm7_9(arm7_9)) | |||
{ | |||
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target"); | |||
command_print(CMD_CTX, "current target isn't an ARM7/ARM9 target"); | |||
return ERROR_TARGET_INVALID; | |||
} | |||
@@ -2917,23 +2917,23 @@ COMMAND_HANDLER(handle_arm7_9_fast_memory_access_command) | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "usage: arm7_9 fast_memory_access <enable | disable>"); | |||
command_print(CMD_CTX, "usage: arm7_9 fast_memory_access <enable | disable>"); | |||
} | |||
} | |||
command_print(cmd_ctx, "fast memory access is %s", (arm7_9->fast_memory_access) ? "enabled" : "disabled"); | |||
command_print(CMD_CTX, "fast memory access is %s", (arm7_9->fast_memory_access) ? "enabled" : "disabled"); | |||
return ERROR_OK; | |||
} | |||
COMMAND_HANDLER(handle_arm7_9_dcc_downloads_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct arm7_9_common *arm7_9 = target_to_arm7_9(target); | |||
if (!is_arm7_9(arm7_9)) | |||
{ | |||
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target"); | |||
command_print(CMD_CTX, "current target isn't an ARM7/ARM9 target"); | |||
return ERROR_TARGET_INVALID; | |||
} | |||
@@ -2949,11 +2949,11 @@ COMMAND_HANDLER(handle_arm7_9_dcc_downloads_command) | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "usage: arm7_9 dcc_downloads <enable | disable>"); | |||
command_print(CMD_CTX, "usage: arm7_9 dcc_downloads <enable | disable>"); | |||
} | |||
} | |||
command_print(cmd_ctx, "dcc downloads are %s", (arm7_9->dcc_downloads) ? "enabled" : "disabled"); | |||
command_print(CMD_CTX, "dcc downloads are %s", (arm7_9->dcc_downloads) ? "enabled" : "disabled"); | |||
return ERROR_OK; | |||
} | |||
@@ -664,7 +664,7 @@ static int arm920t_target_create(struct target *target, Jim_Interp *interp) | |||
COMMAND_HANDLER(arm920t_handle_read_cache_command) | |||
{ | |||
int retval = ERROR_OK; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct arm920t_common *arm920t = target_to_arm920(target); | |||
struct arm7_9_common *arm7_9 = target_to_arm7_9(target); | |||
struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; | |||
@@ -678,13 +678,13 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command) | |||
struct arm920t_cache_line d_cache[8][64], i_cache[8][64]; | |||
int segment, index; | |||
retval = arm920t_verify_pointer(cmd_ctx, arm920t); | |||
retval = arm920t_verify_pointer(CMD_CTX, arm920t); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
if (CMD_ARGC != 1) | |||
{ | |||
command_print(cmd_ctx, "usage: arm920t read_cache <filename>"); | |||
command_print(CMD_CTX, "usage: arm920t read_cache <filename>"); | |||
return ERROR_OK; | |||
} | |||
@@ -885,7 +885,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command) | |||
/* restore CP15 MMU and Cache settings */ | |||
arm920t_write_cp15_physical(target, ARM920T_CP15_PHYS_ADDR(0, 0x1, 0), cp15_ctrl_saved); | |||
command_print(cmd_ctx, "cache content successfully output to %s", CMD_ARGV[0]); | |||
command_print(CMD_CTX, "cache content successfully output to %s", CMD_ARGV[0]); | |||
fclose(output); | |||
@@ -910,7 +910,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command) | |||
COMMAND_HANDLER(arm920t_handle_read_mmu_command) | |||
{ | |||
int retval = ERROR_OK; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct arm920t_common *arm920t = target_to_arm920(target); | |||
struct arm7_9_common *arm7_9 = target_to_arm7_9(target); | |||
struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; | |||
@@ -924,13 +924,13 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command) | |||
struct arm920t_tlb_entry d_tlb[64], i_tlb[64]; | |||
int victim; | |||
retval = arm920t_verify_pointer(cmd_ctx, arm920t); | |||
retval = arm920t_verify_pointer(CMD_CTX, arm920t); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
if (CMD_ARGC != 1) | |||
{ | |||
command_print(cmd_ctx, "usage: arm920t read_mmu <filename>"); | |||
command_print(CMD_CTX, "usage: arm920t read_mmu <filename>"); | |||
return ERROR_OK; | |||
} | |||
@@ -1168,7 +1168,7 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command) | |||
fprintf(output, "%i: 0x%8.8" PRIx32 " 0x%8.8" PRIx32 " 0x%8.8" PRIx32 " %s\n", i, i_tlb[i].cam, i_tlb[i].ram1, i_tlb[i].ram2, (i_tlb[i].cam & 0x20) ? "(valid)" : "(invalid)"); | |||
} | |||
command_print(cmd_ctx, "mmu content successfully output to %s", CMD_ARGV[0]); | |||
command_print(CMD_CTX, "mmu content successfully output to %s", CMD_ARGV[0]); | |||
fclose(output); | |||
@@ -1193,16 +1193,16 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command) | |||
COMMAND_HANDLER(arm920t_handle_cp15_command) | |||
{ | |||
int retval; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct arm920t_common *arm920t = target_to_arm920(target); | |||
retval = arm920t_verify_pointer(cmd_ctx, arm920t); | |||
retval = arm920t_verify_pointer(CMD_CTX, arm920t); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
if (target->state != TARGET_HALTED) | |||
{ | |||
command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME); | |||
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME); | |||
return ERROR_OK; | |||
} | |||
@@ -1217,7 +1217,7 @@ COMMAND_HANDLER(arm920t_handle_cp15_command) | |||
uint32_t value; | |||
if ((retval = arm920t_read_cp15_physical(target, address, &value)) != ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "couldn't access reg %i", address); | |||
command_print(CMD_CTX, "couldn't access reg %i", address); | |||
return ERROR_OK; | |||
} | |||
if ((retval = jtag_execute_queue()) != ERROR_OK) | |||
@@ -1225,7 +1225,7 @@ COMMAND_HANDLER(arm920t_handle_cp15_command) | |||
return retval; | |||
} | |||
command_print(cmd_ctx, "%i: %8.8" PRIx32 "", address, value); | |||
command_print(CMD_CTX, "%i: %8.8" PRIx32 "", address, value); | |||
} | |||
else if (CMD_ARGC == 2) | |||
{ | |||
@@ -1233,10 +1233,10 @@ COMMAND_HANDLER(arm920t_handle_cp15_command) | |||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value); | |||
if ((retval = arm920t_write_cp15_physical(target, address, value)) != ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "couldn't access reg %i", address); | |||
command_print(CMD_CTX, "couldn't access reg %i", address); | |||
return ERROR_OK; | |||
} | |||
command_print(cmd_ctx, "%i: %8.8" PRIx32 "", address, value); | |||
command_print(CMD_CTX, "%i: %8.8" PRIx32 "", address, value); | |||
} | |||
} | |||
@@ -1246,17 +1246,17 @@ COMMAND_HANDLER(arm920t_handle_cp15_command) | |||
COMMAND_HANDLER(arm920t_handle_cp15i_command) | |||
{ | |||
int retval; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct arm920t_common *arm920t = target_to_arm920(target); | |||
retval = arm920t_verify_pointer(cmd_ctx, arm920t); | |||
retval = arm920t_verify_pointer(CMD_CTX, arm920t); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
if (target->state != TARGET_HALTED) | |||
{ | |||
command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME); | |||
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME); | |||
return ERROR_OK; | |||
} | |||
@@ -1271,11 +1271,11 @@ COMMAND_HANDLER(arm920t_handle_cp15i_command) | |||
uint32_t value; | |||
if ((retval = arm920t_read_cp15_interpreted(target, opcode, 0x0, &value)) != ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "couldn't execute %8.8" PRIx32 "", opcode); | |||
command_print(CMD_CTX, "couldn't execute %8.8" PRIx32 "", opcode); | |||
return ERROR_OK; | |||
} | |||
command_print(cmd_ctx, "%8.8" PRIx32 ": %8.8" PRIx32 "", opcode, value); | |||
command_print(CMD_CTX, "%8.8" PRIx32 ": %8.8" PRIx32 "", opcode, value); | |||
} | |||
else if (CMD_ARGC == 2) | |||
{ | |||
@@ -1283,10 +1283,10 @@ COMMAND_HANDLER(arm920t_handle_cp15i_command) | |||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value); | |||
if ((retval = arm920t_write_cp15_interpreted(target, opcode, value, 0)) != ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "couldn't execute %8.8" PRIx32 "", opcode); | |||
command_print(CMD_CTX, "couldn't execute %8.8" PRIx32 "", opcode); | |||
return ERROR_OK; | |||
} | |||
command_print(cmd_ctx, "%8.8" PRIx32 ": %8.8" PRIx32 "", opcode, value); | |||
command_print(CMD_CTX, "%8.8" PRIx32 ": %8.8" PRIx32 "", opcode, value); | |||
} | |||
else if (CMD_ARGC == 3) | |||
{ | |||
@@ -1296,15 +1296,15 @@ COMMAND_HANDLER(arm920t_handle_cp15i_command) | |||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], address); | |||
if ((retval = arm920t_write_cp15_interpreted(target, opcode, value, address)) != ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "couldn't execute %8.8" PRIx32 "", opcode); | |||
command_print(CMD_CTX, "couldn't execute %8.8" PRIx32 "", opcode); | |||
return ERROR_OK; | |||
} | |||
command_print(cmd_ctx, "%8.8" PRIx32 ": %8.8" PRIx32 " %8.8" PRIx32 "", opcode, value, address); | |||
command_print(CMD_CTX, "%8.8" PRIx32 ": %8.8" PRIx32 " %8.8" PRIx32 "", opcode, value, address); | |||
} | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "usage: arm920t cp15i <opcode> [value] [address]"); | |||
command_print(CMD_CTX, "usage: arm920t cp15i <opcode> [value] [address]"); | |||
} | |||
return ERROR_OK; | |||
@@ -1313,14 +1313,14 @@ COMMAND_HANDLER(arm920t_handle_cp15i_command) | |||
COMMAND_HANDLER(arm920t_handle_cache_info_command) | |||
{ | |||
int retval; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct arm920t_common *arm920t = target_to_arm920(target); | |||
retval = arm920t_verify_pointer(cmd_ctx, arm920t); | |||
retval = arm920t_verify_pointer(CMD_CTX, arm920t); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
return armv4_5_handle_cache_info_command(cmd_ctx, &arm920t->armv4_5_mmu.armv4_5_cache); | |||
return armv4_5_handle_cache_info_command(CMD_CTX, &arm920t->armv4_5_mmu.armv4_5_cache); | |||
} | |||
@@ -715,7 +715,7 @@ static int arm926ejs_target_create(struct target *target, Jim_Interp *interp) | |||
COMMAND_HANDLER(arm926ejs_handle_cp15_command) | |||
{ | |||
int retval; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct arm926ejs_common *arm926ejs = target_to_arm926(target); | |||
int opcode_1; | |||
int opcode_2; | |||
@@ -724,7 +724,7 @@ COMMAND_HANDLER(arm926ejs_handle_cp15_command) | |||
if ((CMD_ARGC < 4) || (CMD_ARGC > 5)) | |||
{ | |||
command_print(cmd_ctx, "usage: arm926ejs cp15 <opcode_1> <opcode_2> <CRn> <CRm> [value]"); | |||
command_print(CMD_CTX, "usage: arm926ejs cp15 <opcode_1> <opcode_2> <CRn> <CRm> [value]"); | |||
return ERROR_OK; | |||
} | |||
@@ -733,13 +733,13 @@ COMMAND_HANDLER(arm926ejs_handle_cp15_command) | |||
COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], CRn); | |||
COMMAND_PARSE_NUMBER(int, CMD_ARGV[3], CRm); | |||
retval = arm926ejs_verify_pointer(cmd_ctx, arm926ejs); | |||
retval = arm926ejs_verify_pointer(CMD_CTX, arm926ejs); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
if (target->state != TARGET_HALTED) | |||
{ | |||
command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME); | |||
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME); | |||
return ERROR_OK; | |||
} | |||
@@ -748,7 +748,7 @@ COMMAND_HANDLER(arm926ejs_handle_cp15_command) | |||
uint32_t value; | |||
if ((retval = arm926ejs->read_cp15(target, opcode_1, opcode_2, CRn, CRm, &value)) != ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "couldn't access register"); | |||
command_print(CMD_CTX, "couldn't access register"); | |||
return ERROR_OK; | |||
} | |||
if ((retval = jtag_execute_queue()) != ERROR_OK) | |||
@@ -756,7 +756,7 @@ COMMAND_HANDLER(arm926ejs_handle_cp15_command) | |||
return retval; | |||
} | |||
command_print(cmd_ctx, "%i %i %i %i: %8.8" PRIx32 "", opcode_1, opcode_2, CRn, CRm, value); | |||
command_print(CMD_CTX, "%i %i %i %i: %8.8" PRIx32 "", opcode_1, opcode_2, CRn, CRm, value); | |||
} | |||
else | |||
{ | |||
@@ -764,10 +764,10 @@ COMMAND_HANDLER(arm926ejs_handle_cp15_command) | |||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[4], value); | |||
if ((retval = arm926ejs->write_cp15(target, opcode_1, opcode_2, CRn, CRm, value)) != ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, "couldn't access register"); | |||
command_print(CMD_CTX, "couldn't access register"); | |||
return ERROR_OK; | |||
} | |||
command_print(cmd_ctx, "%i %i %i %i: %8.8" PRIx32 "", opcode_1, opcode_2, CRn, CRm, value); | |||
command_print(CMD_CTX, "%i %i %i %i: %8.8" PRIx32 "", opcode_1, opcode_2, CRn, CRm, value); | |||
} | |||
return ERROR_OK; | |||
@@ -776,14 +776,14 @@ COMMAND_HANDLER(arm926ejs_handle_cp15_command) | |||
COMMAND_HANDLER(arm926ejs_handle_cache_info_command) | |||
{ | |||
int retval; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct arm926ejs_common *arm926ejs = target_to_arm926(target); | |||
retval = arm926ejs_verify_pointer(cmd_ctx, arm926ejs); | |||
retval = arm926ejs_verify_pointer(CMD_CTX, arm926ejs); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
return armv4_5_handle_cache_info_command(cmd_ctx, &arm926ejs->armv4_5_mmu.armv4_5_cache); | |||
return armv4_5_handle_cache_info_command(CMD_CTX, &arm926ejs->armv4_5_mmu.armv4_5_cache); | |||
} | |||
static int arm926ejs_virt2phys(struct target *target, uint32_t virtual, uint32_t *physical) | |||
@@ -165,16 +165,16 @@ int arm966e_write_cp15(struct target *target, int reg_addr, uint32_t value) | |||
COMMAND_HANDLER(arm966e_handle_cp15_command) | |||
{ | |||
int retval; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct arm966e_common *arm966e = target_to_arm966(target); | |||
retval = arm966e_verify_pointer(cmd_ctx, arm966e); | |||
retval = arm966e_verify_pointer(CMD_CTX, arm966e); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
if (target->state != TARGET_HALTED) | |||
{ | |||
command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME); | |||
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME); | |||
return ERROR_OK; | |||
} | |||
@@ -189,7 +189,7 @@ COMMAND_HANDLER(arm966e_handle_cp15_command) | |||
uint32_t value; | |||
if ((retval = arm966e_read_cp15(target, address, &value)) != ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
"couldn't access reg %" PRIi32, | |||
address); | |||
return ERROR_OK; | |||
@@ -199,7 +199,7 @@ COMMAND_HANDLER(arm966e_handle_cp15_command) | |||
return retval; | |||
} | |||
command_print(cmd_ctx, "%" PRIi32 ": %8.8" PRIx32, | |||
command_print(CMD_CTX, "%" PRIi32 ": %8.8" PRIx32, | |||
address, value); | |||
} | |||
else if (CMD_ARGC == 2) | |||
@@ -208,12 +208,12 @@ COMMAND_HANDLER(arm966e_handle_cp15_command) | |||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value); | |||
if ((retval = arm966e_write_cp15(target, address, value)) != ERROR_OK) | |||
{ | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
"couldn't access reg %" PRIi32, | |||
address); | |||
return ERROR_OK; | |||
} | |||
command_print(cmd_ctx, "%" PRIi32 ": %8.8" PRIx32, | |||
command_print(CMD_CTX, "%" PRIi32 ": %8.8" PRIx32, | |||
address, value); | |||
} | |||
} | |||
@@ -831,7 +831,7 @@ static int arm9tdmi_target_create(struct target *target, Jim_Interp *interp) | |||
COMMAND_HANDLER(handle_arm9tdmi_catch_vectors_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct arm7_9_common *arm7_9 = target_to_arm7_9(target); | |||
struct reg *vector_catch; | |||
uint32_t vector_catch_value; | |||
@@ -839,7 +839,7 @@ COMMAND_HANDLER(handle_arm9tdmi_catch_vectors_command) | |||
/* it's uncommon, but some ARM7 chips can support this */ | |||
if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC | |||
|| !arm7_9->has_vector_catch) { | |||
command_print(cmd_ctx, "target doesn't have EmbeddedICE " | |||
command_print(CMD_CTX, "target doesn't have EmbeddedICE " | |||
"with vector_catch"); | |||
return ERROR_TARGET_INVALID; | |||
} | |||
@@ -882,7 +882,7 @@ COMMAND_HANDLER(handle_arm9tdmi_catch_vectors_command) | |||
/* complain if vector wasn't found */ | |||
if (!arm9tdmi_vectors[j].name) | |||
{ | |||
command_print(cmd_ctx, "vector '%s' not found, leaving current setting unchanged", CMD_ARGV[i]); | |||
command_print(CMD_CTX, "vector '%s' not found, leaving current setting unchanged", CMD_ARGV[i]); | |||
/* reread current setting */ | |||
vector_catch_value = buf_get_u32( | |||
@@ -901,7 +901,7 @@ COMMAND_HANDLER(handle_arm9tdmi_catch_vectors_command) | |||
/* output current settings */ | |||
for (unsigned i = 0; arm9tdmi_vectors[i].name; i++) { | |||
command_print(cmd_ctx, "%s: %s", arm9tdmi_vectors[i].name, | |||
command_print(CMD_CTX, "%s: %s", arm9tdmi_vectors[i].name, | |||
(vector_catch_value & arm9tdmi_vectors[i].value) | |||
? "catch" : "don't catch"); | |||
} | |||
@@ -1386,7 +1386,7 @@ DAP_COMMAND_HANDLER(dap_baseaddr_command) | |||
dap_ap_read_reg_u32(swjdp, 0xF8, &baseaddr); | |||
retval = swjdp_transaction_endcheck(swjdp); | |||
command_print(cmd_ctx, "0x%8.8" PRIx32, baseaddr); | |||
command_print(CMD_CTX, "0x%8.8" PRIx32, baseaddr); | |||
if (apselsave != apsel) | |||
dap_ap_select(swjdp, apselsave); | |||
@@ -1410,7 +1410,7 @@ DAP_COMMAND_HANDLER(dap_memaccess_command) | |||
} | |||
swjdp->memaccess_tck = memaccess_tck; | |||
command_print(cmd_ctx, "memory bus access delay set to %" PRIi32 " tck", | |||
command_print(CMD_CTX, "memory bus access delay set to %" PRIi32 " tck", | |||
swjdp->memaccess_tck); | |||
return ERROR_OK; | |||
@@ -1435,7 +1435,7 @@ DAP_COMMAND_HANDLER(dap_apsel_command) | |||
dap_ap_select(swjdp, apsel); | |||
dap_ap_read_reg_u32(swjdp, 0xFC, &apid); | |||
retval = swjdp_transaction_endcheck(swjdp); | |||
command_print(cmd_ctx, "ap %" PRIi32 " selected, identification register 0x%8.8" PRIx32, | |||
command_print(CMD_CTX, "ap %" PRIi32 " selected, identification register 0x%8.8" PRIx32, | |||
apsel, apid); | |||
return retval; | |||
@@ -1463,7 +1463,7 @@ DAP_COMMAND_HANDLER(dap_apid_command) | |||
dap_ap_read_reg_u32(swjdp, 0xFC, &apid); | |||
retval = swjdp_transaction_endcheck(swjdp); | |||
command_print(cmd_ctx, "0x%8.8" PRIx32, apid); | |||
command_print(CMD_CTX, "0x%8.8" PRIx32, apid); | |||
if (apselsave != apsel) | |||
dap_ap_select(swjdp, apselsave); | |||
@@ -358,18 +358,18 @@ COMMAND_HANDLER(handle_armv4_5_reg_command) | |||
char output[128]; | |||
int output_len; | |||
int mode, num; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); | |||
if (!is_arm(armv4_5)) | |||
{ | |||
command_print(cmd_ctx, "current target isn't an ARM"); | |||
command_print(CMD_CTX, "current target isn't an ARM"); | |||
return ERROR_FAIL; | |||
} | |||
if (target->state != TARGET_HALTED) | |||
{ | |||
command_print(cmd_ctx, "error: target must be halted for register accesses"); | |||
command_print(CMD_CTX, "error: target must be halted for register accesses"); | |||
return ERROR_OK; | |||
} | |||
@@ -377,7 +377,7 @@ COMMAND_HANDLER(handle_armv4_5_reg_command) | |||
return ERROR_FAIL; | |||
if (!armv4_5->full_context) { | |||
command_print(cmd_ctx, "error: target doesn't support %s", | |||
command_print(CMD_CTX, "error: target doesn't support %s", | |||
CMD_NAME); | |||
return ERROR_FAIL; | |||
} | |||
@@ -397,9 +397,9 @@ COMMAND_HANDLER(handle_armv4_5_reg_command) | |||
ARMV4_5_CORE_REG_MODENUM(armv4_5->core_cache, mode, num).name, | |||
buf_get_u32(ARMV4_5_CORE_REG_MODENUM(armv4_5->core_cache, mode, num).value, 0, 32)); | |||
} | |||
command_print(cmd_ctx, "%s", output); | |||
command_print(CMD_CTX, "%s", output); | |||
} | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
" cpsr: %8.8" PRIx32 " spsr_fiq: %8.8" PRIx32 " spsr_irq: %8.8" PRIx32 " spsr_svc: %8.8" PRIx32 " spsr_abt: %8.8" PRIx32 " spsr_und: %8.8" PRIx32 "", | |||
buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32), | |||
buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_SPSR_FIQ].value, 0, 32), | |||
@@ -413,12 +413,12 @@ COMMAND_HANDLER(handle_armv4_5_reg_command) | |||
COMMAND_HANDLER(handle_armv4_5_core_state_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); | |||
if (!is_arm(armv4_5)) | |||
{ | |||
command_print(cmd_ctx, "current target isn't an ARM"); | |||
command_print(CMD_CTX, "current target isn't an ARM"); | |||
return ERROR_FAIL; | |||
} | |||
@@ -434,7 +434,7 @@ COMMAND_HANDLER(handle_armv4_5_core_state_command) | |||
} | |||
} | |||
command_print(cmd_ctx, "core state: %s", armv4_5_state_strings[armv4_5->core_state]); | |||
command_print(CMD_CTX, "core state: %s", armv4_5_state_strings[armv4_5->core_state]); | |||
return ERROR_OK; | |||
} | |||
@@ -442,14 +442,14 @@ COMMAND_HANDLER(handle_armv4_5_core_state_command) | |||
COMMAND_HANDLER(handle_armv4_5_disassemble_command) | |||
{ | |||
int retval = ERROR_OK; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct arm *arm = target ? target_to_arm(target) : NULL; | |||
uint32_t address; | |||
int count = 1; | |||
int thumb = 0; | |||
if (!is_arm(arm)) { | |||
command_print(cmd_ctx, "current target isn't an ARM"); | |||
command_print(CMD_CTX, "current target isn't an ARM"); | |||
return ERROR_FAIL; | |||
} | |||
@@ -466,7 +466,7 @@ COMMAND_HANDLER(handle_armv4_5_disassemble_command) | |||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address); | |||
if (address & 0x01) { | |||
if (!thumb) { | |||
command_print(cmd_ctx, "Disassemble as Thumb"); | |||
command_print(CMD_CTX, "Disassemble as Thumb"); | |||
thumb = 1; | |||
} | |||
address &= ~1; | |||
@@ -474,7 +474,7 @@ COMMAND_HANDLER(handle_armv4_5_disassemble_command) | |||
break; | |||
default: | |||
usage: | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
"usage: arm disassemble <address> [<count> ['thumb']]"); | |||
count = 0; | |||
retval = ERROR_FAIL; | |||
@@ -503,7 +503,7 @@ usage: | |||
if (retval != ERROR_OK) | |||
break; | |||
} | |||
command_print(cmd_ctx, "%s", cur_instruction.text); | |||
command_print(CMD_CTX, "%s", cur_instruction.text); | |||
address += cur_instruction.instruction_size; | |||
} | |||
@@ -218,7 +218,7 @@ int armv7a_arch_state(struct target *target) | |||
COMMAND_HANDLER(handle_dap_baseaddr_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct armv7a_common *armv7a = target_to_armv7a(target); | |||
struct swjdp_common *swjdp = &armv7a->swjdp_info; | |||
@@ -227,7 +227,7 @@ COMMAND_HANDLER(handle_dap_baseaddr_command) | |||
COMMAND_HANDLER(handle_dap_memaccess_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct armv7a_common *armv7a = target_to_armv7a(target); | |||
struct swjdp_common *swjdp = &armv7a->swjdp_info; | |||
@@ -236,7 +236,7 @@ COMMAND_HANDLER(handle_dap_memaccess_command) | |||
COMMAND_HANDLER(handle_dap_apsel_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct armv7a_common *armv7a = target_to_armv7a(target); | |||
struct swjdp_common *swjdp = &armv7a->swjdp_info; | |||
@@ -245,7 +245,7 @@ COMMAND_HANDLER(handle_dap_apsel_command) | |||
COMMAND_HANDLER(handle_dap_apid_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct armv7a_common *armv7a = target_to_armv7a(target); | |||
struct swjdp_common *swjdp = &armv7a->swjdp_info; | |||
@@ -254,7 +254,7 @@ COMMAND_HANDLER(handle_dap_apid_command) | |||
COMMAND_HANDLER(handle_dap_info_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct armv7a_common *armv7a = target_to_armv7a(target); | |||
struct swjdp_common *swjdp = &armv7a->swjdp_info; | |||
uint32_t apsel; | |||
@@ -270,7 +270,7 @@ COMMAND_HANDLER(handle_dap_info_command) | |||
return ERROR_COMMAND_SYNTAX_ERROR; | |||
} | |||
return dap_info_command(cmd_ctx, swjdp, apsel); | |||
return dap_info_command(CMD_CTX, swjdp, apsel); | |||
} | |||
int armv7a_register_commands(struct command_context *cmd_ctx) | |||
@@ -759,7 +759,7 @@ int armv7m_blank_check_memory(struct target *target, | |||
*/ | |||
COMMAND_HANDLER(handle_dap_baseaddr_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct armv7m_common *armv7m = target_to_armv7m(target); | |||
struct swjdp_common *swjdp = &armv7m->swjdp_info; | |||
uint32_t apsel, apselsave, baseaddr; | |||
@@ -782,7 +782,7 @@ COMMAND_HANDLER(handle_dap_baseaddr_command) | |||
dap_ap_read_reg_u32(swjdp, 0xF8, &baseaddr); | |||
retval = swjdp_transaction_endcheck(swjdp); | |||
command_print(cmd_ctx, "0x%8.8" PRIx32 "", baseaddr); | |||
command_print(CMD_CTX, "0x%8.8" PRIx32 "", baseaddr); | |||
if (apselsave != apsel) | |||
dap_ap_select(swjdp, apselsave); | |||
@@ -796,7 +796,7 @@ COMMAND_HANDLER(handle_dap_baseaddr_command) | |||
*/ | |||
COMMAND_HANDLER(handle_dap_apid_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct armv7m_common *armv7m = target_to_armv7m(target); | |||
struct swjdp_common *swjdp = &armv7m->swjdp_info; | |||
@@ -805,7 +805,7 @@ COMMAND_HANDLER(handle_dap_apid_command) | |||
COMMAND_HANDLER(handle_dap_apsel_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct armv7m_common *armv7m = target_to_armv7m(target); | |||
struct swjdp_common *swjdp = &armv7m->swjdp_info; | |||
@@ -814,7 +814,7 @@ COMMAND_HANDLER(handle_dap_apsel_command) | |||
COMMAND_HANDLER(handle_dap_memaccess_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct armv7m_common *armv7m = target_to_armv7m(target); | |||
struct swjdp_common *swjdp = &armv7m->swjdp_info; | |||
@@ -824,7 +824,7 @@ COMMAND_HANDLER(handle_dap_memaccess_command) | |||
COMMAND_HANDLER(handle_dap_info_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct armv7m_common *armv7m = target_to_armv7m(target); | |||
struct swjdp_common *swjdp = &armv7m->swjdp_info; | |||
uint32_t apsel; | |||
@@ -840,7 +840,7 @@ COMMAND_HANDLER(handle_dap_info_command) | |||
return ERROR_COMMAND_SYNTAX_ERROR; | |||
} | |||
return dap_info_command(cmd_ctx, swjdp, apsel); | |||
return dap_info_command(CMD_CTX, swjdp, apsel); | |||
} | |||
/** Registers commands used to access DAP resources. */ | |||
@@ -1512,17 +1512,17 @@ static int cortex_a8_target_create(struct target *target, Jim_Interp *interp) | |||
COMMAND_HANDLER(cortex_a8_handle_cache_info_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct armv7a_common *armv7a = target_to_armv7a(target); | |||
return armv4_5_handle_cache_info_command(cmd_ctx, | |||
return armv4_5_handle_cache_info_command(CMD_CTX, | |||
&armv7a->armv4_5_mmu.armv4_5_cache); | |||
} | |||
COMMAND_HANDLER(cortex_a8_handle_dbginit_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
cortex_a8_init_debug_access(target); | |||
@@ -1769,13 +1769,13 @@ static int cortex_m3_verify_pointer(struct command_context *cmd_ctx, | |||
COMMAND_HANDLER(handle_cortex_m3_disassemble_command) | |||
{ | |||
int retval; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct cortex_m3_common *cortex_m3 = target_to_cm3(target); | |||
uint32_t address; | |||
unsigned long count = 1; | |||
struct arm_instruction cur_instruction; | |||
retval = cortex_m3_verify_pointer(cmd_ctx, cortex_m3); | |||
retval = cortex_m3_verify_pointer(CMD_CTX, cortex_m3); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
@@ -1788,7 +1788,7 @@ COMMAND_HANDLER(handle_cortex_m3_disassemble_command) | |||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address); | |||
break; | |||
default: | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
"usage: cortex_m3 disassemble <address> [<count>]"); | |||
return ERROR_OK; | |||
} | |||
@@ -1797,7 +1797,7 @@ COMMAND_HANDLER(handle_cortex_m3_disassemble_command) | |||
retval = thumb2_opcode(target, address, &cur_instruction); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
command_print(cmd_ctx, "%s", cur_instruction.text); | |||
command_print(CMD_CTX, "%s", cur_instruction.text); | |||
address += cur_instruction.instruction_size; | |||
} | |||
@@ -1820,13 +1820,14 @@ static const struct { | |||
COMMAND_HANDLER(handle_cortex_m3_vector_catch_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct cortex_m3_common *cortex_m3 = target_to_cm3(target); | |||
struct armv7m_common *armv7m = &cortex_m3->armv7m; | |||
struct swjdp_common *swjdp = &armv7m->swjdp_info; | |||
uint32_t demcr = 0; | |||
int retval; | |||
retval = cortex_m3_verify_pointer(cmd_ctx, cortex_m3); | |||
retval = cortex_m3_verify_pointer(CMD_CTX, cortex_m3); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
@@ -1868,25 +1869,27 @@ write: | |||
} | |||
for (unsigned i = 0; i < ARRAY_SIZE(vec_ids); i++) | |||
command_print(cmd_ctx, "%9s: %s", vec_ids[i].name, | |||
{ | |||
command_print(CMD_CTX, "%9s: %s", vec_ids[i].name, | |||
(demcr & vec_ids[i].mask) ? "catch" : "ignore"); | |||
} | |||
return ERROR_OK; | |||
} | |||
COMMAND_HANDLER(handle_cortex_m3_mask_interrupts_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct cortex_m3_common *cortex_m3 = target_to_cm3(target); | |||
int retval; | |||
retval = cortex_m3_verify_pointer(cmd_ctx, cortex_m3); | |||
retval = cortex_m3_verify_pointer(CMD_CTX, cortex_m3); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
if (target->state != TARGET_HALTED) | |||
{ | |||
command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME); | |||
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME); | |||
return ERROR_OK; | |||
} | |||
@@ -1902,11 +1905,11 @@ COMMAND_HANDLER(handle_cortex_m3_mask_interrupts_command) | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "usage: cortex_m3 maskisr ['on'|'off']"); | |||
command_print(CMD_CTX, "usage: cortex_m3 maskisr ['on'|'off']"); | |||
} | |||
} | |||
command_print(cmd_ctx, "cortex_m3 interrupt mask %s", | |||
command_print(CMD_CTX, "cortex_m3 interrupt mask %s", | |||
(cortex_m3->dcb_dhcsr & C_MASKINTS) ? "on" : "off"); | |||
return ERROR_OK; | |||
@@ -370,14 +370,14 @@ COMMAND_HANDLER(handle_etb_config_command) | |||
arm = target_to_arm(target); | |||
if (!is_arm(arm)) | |||
{ | |||
command_print(cmd_ctx, "ETB: '%s' isn't an ARM", CMD_ARGV[0]); | |||
command_print(CMD_CTX, "ETB: '%s' isn't an ARM", CMD_ARGV[0]); | |||
return ERROR_FAIL; | |||
} | |||
tap = jtag_tap_by_string(CMD_ARGV[1]); | |||
if (tap == NULL) | |||
{ | |||
command_print(cmd_ctx, "ETB: TAP %s does not exist", CMD_ARGV[1]); | |||
command_print(CMD_CTX, "ETB: TAP %s does not exist", CMD_ARGV[1]); | |||
return ERROR_FAIL; | |||
} | |||
@@ -1189,7 +1189,7 @@ static COMMAND_HELPER(handle_etm_tracemode_command_update, | |||
tracemode = ETMV1_TRACE_DATA | ETMV1_TRACE_ADDR; | |||
else | |||
{ | |||
command_print(cmd_ctx, "invalid option '%s'", CMD_ARGV[0]); | |||
command_print(CMD_CTX, "invalid option '%s'", CMD_ARGV[0]); | |||
return ERROR_INVALID_ARGUMENTS; | |||
} | |||
@@ -1210,7 +1210,7 @@ static COMMAND_HELPER(handle_etm_tracemode_command_update, | |||
tracemode |= ETMV1_CONTEXTID_32; | |||
break; | |||
default: | |||
command_print(cmd_ctx, "invalid option '%s'", CMD_ARGV[1]); | |||
command_print(CMD_CTX, "invalid option '%s'", CMD_ARGV[1]); | |||
return ERROR_INVALID_ARGUMENTS; | |||
} | |||
@@ -1220,7 +1220,7 @@ static COMMAND_HELPER(handle_etm_tracemode_command_update, | |||
tracemode |= 0; | |||
else | |||
{ | |||
command_print(cmd_ctx, "invalid option '%s'", CMD_ARGV[2]); | |||
command_print(CMD_CTX, "invalid option '%s'", CMD_ARGV[2]); | |||
return ERROR_INVALID_ARGUMENTS; | |||
} | |||
@@ -1230,7 +1230,7 @@ static COMMAND_HELPER(handle_etm_tracemode_command_update, | |||
tracemode |= 0; | |||
else | |||
{ | |||
command_print(cmd_ctx, "invalid option '%s'", CMD_ARGV[3]); | |||
command_print(CMD_CTX, "invalid option '%s'", CMD_ARGV[3]); | |||
return ERROR_INVALID_ARGUMENTS; | |||
} | |||
@@ -1246,18 +1246,18 @@ static COMMAND_HELPER(handle_etm_tracemode_command_update, | |||
COMMAND_HANDLER(handle_etm_tracemode_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct arm *arm = target_to_arm(target); | |||
struct etm_context *etm; | |||
if (!is_arm(arm)) { | |||
command_print(cmd_ctx, "ETM: current target isn't an ARM"); | |||
command_print(CMD_CTX, "ETM: current target isn't an ARM"); | |||
return ERROR_FAIL; | |||
} | |||
etm = arm->etm; | |||
if (!etm) { | |||
command_print(cmd_ctx, "current target doesn't have an ETM configured"); | |||
command_print(CMD_CTX, "current target doesn't have an ETM configured"); | |||
return ERROR_FAIL; | |||
} | |||
@@ -1271,7 +1271,7 @@ COMMAND_HANDLER(handle_etm_tracemode_command) | |||
CALL_COMMAND_HANDLER(handle_etm_tracemode_command_update, &tracemode); | |||
break; | |||
default: | |||
command_print(cmd_ctx, "usage: configure trace mode " | |||
command_print(CMD_CTX, "usage: configure trace mode " | |||
"<none | data | address | all> " | |||
"<context id bits> <cycle accurate> <branch output>"); | |||
return ERROR_FAIL; | |||
@@ -1282,56 +1282,56 @@ COMMAND_HANDLER(handle_etm_tracemode_command) | |||
* or couldn't be written; display actual hardware state... | |||
*/ | |||
command_print(cmd_ctx, "current tracemode configuration:"); | |||
command_print(CMD_CTX, "current tracemode configuration:"); | |||
switch (tracemode & ETMV1_TRACE_MASK) | |||
{ | |||
case ETMV1_TRACE_NONE: | |||
command_print(cmd_ctx, "data tracing: none"); | |||
command_print(CMD_CTX, "data tracing: none"); | |||
break; | |||
case ETMV1_TRACE_DATA: | |||
command_print(cmd_ctx, "data tracing: data only"); | |||
command_print(CMD_CTX, "data tracing: data only"); | |||
break; | |||
case ETMV1_TRACE_ADDR: | |||
command_print(cmd_ctx, "data tracing: address only"); | |||
command_print(CMD_CTX, "data tracing: address only"); | |||
break; | |||
case ETMV1_TRACE_DATA | ETMV1_TRACE_ADDR: | |||
command_print(cmd_ctx, "data tracing: address and data"); | |||
command_print(CMD_CTX, "data tracing: address and data"); | |||
break; | |||
} | |||
switch (tracemode & ETMV1_CONTEXTID_MASK) | |||
{ | |||
case ETMV1_CONTEXTID_NONE: | |||
command_print(cmd_ctx, "contextid tracing: none"); | |||
command_print(CMD_CTX, "contextid tracing: none"); | |||
break; | |||
case ETMV1_CONTEXTID_8: | |||
command_print(cmd_ctx, "contextid tracing: 8 bit"); | |||
command_print(CMD_CTX, "contextid tracing: 8 bit"); | |||
break; | |||
case ETMV1_CONTEXTID_16: | |||
command_print(cmd_ctx, "contextid tracing: 16 bit"); | |||
command_print(CMD_CTX, "contextid tracing: 16 bit"); | |||
break; | |||
case ETMV1_CONTEXTID_32: | |||
command_print(cmd_ctx, "contextid tracing: 32 bit"); | |||
command_print(CMD_CTX, "contextid tracing: 32 bit"); | |||
break; | |||
} | |||
if (tracemode & ETMV1_CYCLE_ACCURATE) | |||
{ | |||
command_print(cmd_ctx, "cycle-accurate tracing enabled"); | |||
command_print(CMD_CTX, "cycle-accurate tracing enabled"); | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "cycle-accurate tracing disabled"); | |||
command_print(CMD_CTX, "cycle-accurate tracing disabled"); | |||
} | |||
if (tracemode & ETMV1_BRANCH_OUTPUT) | |||
{ | |||
command_print(cmd_ctx, "full branch address output enabled"); | |||
command_print(CMD_CTX, "full branch address output enabled"); | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "full branch address output disabled"); | |||
command_print(CMD_CTX, "full branch address output disabled"); | |||
} | |||
/* only update ETM_CTRL register if tracemode changed */ | |||
@@ -1386,7 +1386,7 @@ COMMAND_HANDLER(handle_etm_config_command) | |||
arm = target_to_arm(target); | |||
if (!is_arm(arm)) { | |||
command_print(cmd_ctx, "target '%s' is '%s'; not an ARM", | |||
command_print(CMD_CTX, "target '%s' is '%s'; not an ARM", | |||
target->cmd_name, target_get_name(target)); | |||
return ERROR_FAIL; | |||
} | |||
@@ -1437,7 +1437,7 @@ COMMAND_HANDLER(handle_etm_config_command) | |||
portmode |= ETM_PORT_2BIT; | |||
break; | |||
default: | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
"unsupported ETM port width '%s'", CMD_ARGV[1]); | |||
return ERROR_FAIL; | |||
} | |||
@@ -1456,7 +1456,7 @@ COMMAND_HANDLER(handle_etm_config_command) | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "unsupported ETM port mode '%s', must be 'normal', 'multiplexed' or 'demultiplexed'", CMD_ARGV[2]); | |||
command_print(CMD_CTX, "unsupported ETM port mode '%s', must be 'normal', 'multiplexed' or 'demultiplexed'", CMD_ARGV[2]); | |||
return ERROR_FAIL; | |||
} | |||
@@ -1470,7 +1470,7 @@ COMMAND_HANDLER(handle_etm_config_command) | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "unsupported ETM port clocking '%s', must be 'full' or 'half'", CMD_ARGV[3]); | |||
command_print(CMD_CTX, "unsupported ETM port clocking '%s', must be 'full' or 'half'", CMD_ARGV[3]); | |||
return ERROR_FAIL; | |||
} | |||
@@ -1485,7 +1485,7 @@ COMMAND_HANDLER(handle_etm_config_command) | |||
if (strcmp(CMD_ARGV[4], etm_capture_drivers[i]->name) == 0) | |||
{ | |||
int retval; | |||
if ((retval = etm_capture_drivers[i]->register_commands(cmd_ctx)) != ERROR_OK) | |||
if ((retval = etm_capture_drivers[i]->register_commands(CMD_CTX)) != ERROR_OK) | |||
{ | |||
free(etm_ctx); | |||
return retval; | |||
@@ -1513,7 +1513,7 @@ COMMAND_HANDLER(handle_etm_config_command) | |||
arm->etm = etm_ctx; | |||
return etm_register_user_commands(cmd_ctx); | |||
return etm_register_user_commands(CMD_CTX); | |||
} | |||
COMMAND_HANDLER(handle_etm_info_command) | |||
@@ -1525,49 +1525,49 @@ COMMAND_HANDLER(handle_etm_info_command) | |||
int max_port_size; | |||
uint32_t config; | |||
target = get_current_target(cmd_ctx); | |||
target = get_current_target(CMD_CTX); | |||
arm = target_to_arm(target); | |||
if (!is_arm(arm)) | |||
{ | |||
command_print(cmd_ctx, "ETM: current target isn't an ARM"); | |||
command_print(CMD_CTX, "ETM: current target isn't an ARM"); | |||
return ERROR_FAIL; | |||
} | |||
etm = arm->etm; | |||
if (!etm) | |||
{ | |||
command_print(cmd_ctx, "current target doesn't have an ETM configured"); | |||
command_print(CMD_CTX, "current target doesn't have an ETM configured"); | |||
return ERROR_FAIL; | |||
} | |||
command_print(cmd_ctx, "ETM v%d.%d", | |||
command_print(CMD_CTX, "ETM v%d.%d", | |||
etm->bcd_vers >> 4, etm->bcd_vers & 0xf); | |||
command_print(cmd_ctx, "pairs of address comparators: %i", | |||
command_print(CMD_CTX, "pairs of address comparators: %i", | |||
(int) (etm->config >> 0) & 0x0f); | |||
command_print(cmd_ctx, "data comparators: %i", | |||
command_print(CMD_CTX, "data comparators: %i", | |||
(int) (etm->config >> 4) & 0x0f); | |||
command_print(cmd_ctx, "memory map decoders: %i", | |||
command_print(CMD_CTX, "memory map decoders: %i", | |||
(int) (etm->config >> 8) & 0x1f); | |||
command_print(cmd_ctx, "number of counters: %i", | |||
command_print(CMD_CTX, "number of counters: %i", | |||
(int) (etm->config >> 13) & 0x07); | |||
command_print(cmd_ctx, "sequencer %spresent", | |||
command_print(CMD_CTX, "sequencer %spresent", | |||
(int) (etm->config & (1 << 16)) ? "" : "not "); | |||
command_print(cmd_ctx, "number of ext. inputs: %i", | |||
command_print(CMD_CTX, "number of ext. inputs: %i", | |||
(int) (etm->config >> 17) & 0x07); | |||
command_print(cmd_ctx, "number of ext. outputs: %i", | |||
command_print(CMD_CTX, "number of ext. outputs: %i", | |||
(int) (etm->config >> 20) & 0x07); | |||
command_print(cmd_ctx, "FIFO full %spresent", | |||
command_print(CMD_CTX, "FIFO full %spresent", | |||
(int) (etm->config & (1 << 23)) ? "" : "not "); | |||
if (etm->bcd_vers < 0x20) | |||
command_print(cmd_ctx, "protocol version: %i", | |||
command_print(CMD_CTX, "protocol version: %i", | |||
(int) (etm->config >> 28) & 0x07); | |||
else { | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
"coprocessor and memory access %ssupported", | |||
(etm->config & (1 << 26)) ? "" : "not "); | |||
command_print(cmd_ctx, "trace start/stop %spresent", | |||
command_print(CMD_CTX, "trace start/stop %spresent", | |||
(etm->config & (1 << 26)) ? "" : "not "); | |||
command_print(cmd_ctx, "number of context comparators: %i", | |||
command_print(CMD_CTX, "number of context comparators: %i", | |||
(int) (etm->config >> 24) & 0x03); | |||
} | |||
@@ -1619,30 +1619,30 @@ COMMAND_HANDLER(handle_etm_info_command) | |||
LOG_ERROR("Illegal max_port_size"); | |||
return ERROR_FAIL; | |||
} | |||
command_print(cmd_ctx, "max. port size: %i", max_port_size); | |||
command_print(CMD_CTX, "max. port size: %i", max_port_size); | |||
if (etm->bcd_vers < 0x30) { | |||
command_print(cmd_ctx, "half-rate clocking %ssupported", | |||
command_print(CMD_CTX, "half-rate clocking %ssupported", | |||
(config & (1 << 3)) ? "" : "not "); | |||
command_print(cmd_ctx, "full-rate clocking %ssupported", | |||
command_print(CMD_CTX, "full-rate clocking %ssupported", | |||
(config & (1 << 4)) ? "" : "not "); | |||
command_print(cmd_ctx, "normal trace format %ssupported", | |||
command_print(CMD_CTX, "normal trace format %ssupported", | |||
(config & (1 << 5)) ? "" : "not "); | |||
command_print(cmd_ctx, "multiplex trace format %ssupported", | |||
command_print(CMD_CTX, "multiplex trace format %ssupported", | |||
(config & (1 << 6)) ? "" : "not "); | |||
command_print(cmd_ctx, "demultiplex trace format %ssupported", | |||
command_print(CMD_CTX, "demultiplex trace format %ssupported", | |||
(config & (1 << 7)) ? "" : "not "); | |||
} else { | |||
/* REVISIT show which size and format are selected ... */ | |||
command_print(cmd_ctx, "current port size %ssupported", | |||
command_print(CMD_CTX, "current port size %ssupported", | |||
(config & (1 << 10)) ? "" : "not "); | |||
command_print(cmd_ctx, "current trace format %ssupported", | |||
command_print(CMD_CTX, "current trace format %ssupported", | |||
(config & (1 << 11)) ? "" : "not "); | |||
} | |||
if (etm->bcd_vers >= 0x21) | |||
command_print(cmd_ctx, "fetch comparisons %ssupported", | |||
command_print(CMD_CTX, "fetch comparisons %ssupported", | |||
(config & (1 << 17)) ? "not " : ""); | |||
command_print(cmd_ctx, "FIFO full %ssupported", | |||
command_print(CMD_CTX, "FIFO full %ssupported", | |||
(config & (1 << 8)) ? "" : "not "); | |||
return ERROR_OK; | |||
@@ -1655,18 +1655,18 @@ COMMAND_HANDLER(handle_etm_status_command) | |||
struct etm_context *etm; | |||
trace_status_t trace_status; | |||
target = get_current_target(cmd_ctx); | |||
target = get_current_target(CMD_CTX); | |||
arm = target_to_arm(target); | |||
if (!is_arm(arm)) | |||
{ | |||
command_print(cmd_ctx, "ETM: current target isn't an ARM"); | |||
command_print(CMD_CTX, "ETM: current target isn't an ARM"); | |||
return ERROR_FAIL; | |||
} | |||
etm = arm->etm; | |||
if (!etm) | |||
{ | |||
command_print(cmd_ctx, "current target doesn't have an ETM configured"); | |||
command_print(CMD_CTX, "current target doesn't have an ETM configured"); | |||
return ERROR_FAIL; | |||
} | |||
@@ -1680,7 +1680,7 @@ COMMAND_HANDLER(handle_etm_status_command) | |||
if (etm_get_reg(reg) == ERROR_OK) { | |||
unsigned s = buf_get_u32(reg->value, 0, reg->size); | |||
command_print(cmd_ctx, "etm: %s%s%s%s", | |||
command_print(CMD_CTX, "etm: %s%s%s%s", | |||
/* bit(1) == progbit */ | |||
(etm->bcd_vers >= 0x12) | |||
? ((s & (1 << 1)) | |||
@@ -1699,7 +1699,7 @@ COMMAND_HANDLER(handle_etm_status_command) | |||
trace_status = etm->capture_driver->status(etm); | |||
if (trace_status == TRACE_IDLE) | |||
{ | |||
command_print(cmd_ctx, "%s: idle", etm->capture_driver->name); | |||
command_print(CMD_CTX, "%s: idle", etm->capture_driver->name); | |||
} | |||
else | |||
{ | |||
@@ -1708,7 +1708,7 @@ COMMAND_HANDLER(handle_etm_status_command) | |||
static char *overflowed = ", overflowed"; | |||
static char *triggered = ", triggered"; | |||
command_print(cmd_ctx, "%s: trace collection%s%s%s", | |||
command_print(CMD_CTX, "%s: trace collection%s%s%s", | |||
etm->capture_driver->name, | |||
(trace_status & TRACE_RUNNING) ? running : completed, | |||
(trace_status & TRACE_OVERFLOWED) ? overflowed : "", | |||
@@ -1716,7 +1716,7 @@ COMMAND_HANDLER(handle_etm_status_command) | |||
if (etm->trace_depth > 0) | |||
{ | |||
command_print(cmd_ctx, "%i frames of trace data read", | |||
command_print(CMD_CTX, "%i frames of trace data read", | |||
(int)(etm->trace_depth)); | |||
} | |||
} | |||
@@ -1732,22 +1732,22 @@ COMMAND_HANDLER(handle_etm_image_command) | |||
if (CMD_ARGC < 1) | |||
{ | |||
command_print(cmd_ctx, "usage: etm image <file> [base address] [type]"); | |||
command_print(CMD_CTX, "usage: etm image <file> [base address] [type]"); | |||
return ERROR_FAIL; | |||
} | |||
target = get_current_target(cmd_ctx); | |||
target = get_current_target(CMD_CTX); | |||
arm = target_to_arm(target); | |||
if (!is_arm(arm)) | |||
{ | |||
command_print(cmd_ctx, "ETM: current target isn't an ARM"); | |||
command_print(CMD_CTX, "ETM: current target isn't an ARM"); | |||
return ERROR_FAIL; | |||
} | |||
etm_ctx = arm->etm; | |||
if (!etm_ctx) | |||
{ | |||
command_print(cmd_ctx, "current target doesn't have an ETM configured"); | |||
command_print(CMD_CTX, "current target doesn't have an ETM configured"); | |||
return ERROR_FAIL; | |||
} | |||
@@ -1755,7 +1755,7 @@ COMMAND_HANDLER(handle_etm_image_command) | |||
{ | |||
image_close(etm_ctx->image); | |||
free(etm_ctx->image); | |||
command_print(cmd_ctx, "previously loaded image found and closed"); | |||
command_print(CMD_CTX, "previously loaded image found and closed"); | |||
} | |||
etm_ctx->image = malloc(sizeof(struct image)); | |||
@@ -1793,35 +1793,35 @@ COMMAND_HANDLER(handle_etm_dump_command) | |||
if (CMD_ARGC != 1) | |||
{ | |||
command_print(cmd_ctx, "usage: etm dump <file>"); | |||
command_print(CMD_CTX, "usage: etm dump <file>"); | |||
return ERROR_FAIL; | |||
} | |||
target = get_current_target(cmd_ctx); | |||
target = get_current_target(CMD_CTX); | |||
arm = target_to_arm(target); | |||
if (!is_arm(arm)) | |||
{ | |||
command_print(cmd_ctx, "ETM: current target isn't an ARM"); | |||
command_print(CMD_CTX, "ETM: current target isn't an ARM"); | |||
return ERROR_FAIL; | |||
} | |||
etm_ctx = arm->etm; | |||
if (!etm_ctx) | |||
{ | |||
command_print(cmd_ctx, "current target doesn't have an ETM configured"); | |||
command_print(CMD_CTX, "current target doesn't have an ETM configured"); | |||
return ERROR_FAIL; | |||
} | |||
if (etm_ctx->capture_driver->status == TRACE_IDLE) | |||
{ | |||
command_print(cmd_ctx, "trace capture wasn't enabled, no trace data captured"); | |||
command_print(CMD_CTX, "trace capture wasn't enabled, no trace data captured"); | |||
return ERROR_OK; | |||
} | |||
if (etm_ctx->capture_driver->status(etm_ctx) & TRACE_RUNNING) | |||
{ | |||
/* TODO: if on-the-fly capture is to be supported, this needs to be changed */ | |||
command_print(cmd_ctx, "trace capture not completed"); | |||
command_print(CMD_CTX, "trace capture not completed"); | |||
return ERROR_FAIL; | |||
} | |||
@@ -1861,28 +1861,28 @@ COMMAND_HANDLER(handle_etm_load_command) | |||
if (CMD_ARGC != 1) | |||
{ | |||
command_print(cmd_ctx, "usage: etm load <file>"); | |||
command_print(CMD_CTX, "usage: etm load <file>"); | |||
return ERROR_FAIL; | |||
} | |||
target = get_current_target(cmd_ctx); | |||
target = get_current_target(CMD_CTX); | |||
arm = target_to_arm(target); | |||
if (!is_arm(arm)) | |||
{ | |||
command_print(cmd_ctx, "ETM: current target isn't an ARM"); | |||
command_print(CMD_CTX, "ETM: current target isn't an ARM"); | |||
return ERROR_FAIL; | |||
} | |||
etm_ctx = arm->etm; | |||
if (!etm_ctx) | |||
{ | |||
command_print(cmd_ctx, "current target doesn't have an ETM configured"); | |||
command_print(CMD_CTX, "current target doesn't have an ETM configured"); | |||
return ERROR_FAIL; | |||
} | |||
if (etm_ctx->capture_driver->status(etm_ctx) & TRACE_RUNNING) | |||
{ | |||
command_print(cmd_ctx, "trace capture running, stop first"); | |||
command_print(CMD_CTX, "trace capture running, stop first"); | |||
return ERROR_FAIL; | |||
} | |||
@@ -1893,7 +1893,7 @@ COMMAND_HANDLER(handle_etm_load_command) | |||
if (file.size % 4) | |||
{ | |||
command_print(cmd_ctx, "size isn't a multiple of 4, no valid trace data"); | |||
command_print(CMD_CTX, "size isn't a multiple of 4, no valid trace data"); | |||
fileio_close(&file); | |||
return ERROR_FAIL; | |||
} | |||
@@ -1914,7 +1914,7 @@ COMMAND_HANDLER(handle_etm_load_command) | |||
etm_ctx->trace_data = malloc(sizeof(struct etmv1_trace_data) * etm_ctx->trace_depth); | |||
if (etm_ctx->trace_data == NULL) | |||
{ | |||
command_print(cmd_ctx, "not enough memory to perform operation"); | |||
command_print(CMD_CTX, "not enough memory to perform operation"); | |||
fileio_close(&file); | |||
return ERROR_FAIL; | |||
} | |||
@@ -1941,18 +1941,18 @@ COMMAND_HANDLER(handle_etm_trigger_percent_command) | |||
struct arm *arm; | |||
struct etm_context *etm_ctx; | |||
target = get_current_target(cmd_ctx); | |||
target = get_current_target(CMD_CTX); | |||
arm = target_to_arm(target); | |||
if (!is_arm(arm)) | |||
{ | |||
command_print(cmd_ctx, "ETM: current target isn't an ARM"); | |||
command_print(CMD_CTX, "ETM: current target isn't an ARM"); | |||
return ERROR_FAIL; | |||
} | |||
etm_ctx = arm->etm; | |||
if (!etm_ctx) | |||
{ | |||
command_print(cmd_ctx, "current target doesn't have an ETM configured"); | |||
command_print(CMD_CTX, "current target doesn't have an ETM configured"); | |||
return ERROR_FAIL; | |||
} | |||
@@ -1963,7 +1963,7 @@ COMMAND_HANDLER(handle_etm_trigger_percent_command) | |||
if ((new_value < 2) || (new_value > 100)) | |||
{ | |||
command_print(cmd_ctx, "valid settings are 2%% to 100%%"); | |||
command_print(CMD_CTX, "valid settings are 2%% to 100%%"); | |||
} | |||
else | |||
{ | |||
@@ -1971,7 +1971,7 @@ COMMAND_HANDLER(handle_etm_trigger_percent_command) | |||
} | |||
} | |||
command_print(cmd_ctx, "%i percent of the tracebuffer reserved for after the trigger", ((int)(etm_ctx->trigger_percent))); | |||
command_print(CMD_CTX, "%i percent of the tracebuffer reserved for after the trigger", ((int)(etm_ctx->trigger_percent))); | |||
return ERROR_OK; | |||
} | |||
@@ -1983,18 +1983,18 @@ COMMAND_HANDLER(handle_etm_start_command) | |||
struct etm_context *etm_ctx; | |||
struct reg *etm_ctrl_reg; | |||
target = get_current_target(cmd_ctx); | |||
target = get_current_target(CMD_CTX); | |||
arm = target_to_arm(target); | |||
if (!is_arm(arm)) | |||
{ | |||
command_print(cmd_ctx, "ETM: current target isn't an ARM"); | |||
command_print(CMD_CTX, "ETM: current target isn't an ARM"); | |||
return ERROR_FAIL; | |||
} | |||
etm_ctx = arm->etm; | |||
if (!etm_ctx) | |||
{ | |||
command_print(cmd_ctx, "current target doesn't have an ETM configured"); | |||
command_print(CMD_CTX, "current target doesn't have an ETM configured"); | |||
return ERROR_FAIL; | |||
} | |||
@@ -2031,18 +2031,18 @@ COMMAND_HANDLER(handle_etm_stop_command) | |||
struct etm_context *etm_ctx; | |||
struct reg *etm_ctrl_reg; | |||
target = get_current_target(cmd_ctx); | |||
target = get_current_target(CMD_CTX); | |||
arm = target_to_arm(target); | |||
if (!is_arm(arm)) | |||
{ | |||
command_print(cmd_ctx, "ETM: current target isn't an ARM"); | |||
command_print(CMD_CTX, "ETM: current target isn't an ARM"); | |||
return ERROR_FAIL; | |||
} | |||
etm_ctx = arm->etm; | |||
if (!etm_ctx) | |||
{ | |||
command_print(cmd_ctx, "current target doesn't have an ETM configured"); | |||
command_print(CMD_CTX, "current target doesn't have an ETM configured"); | |||
return ERROR_FAIL; | |||
} | |||
@@ -2070,36 +2070,36 @@ COMMAND_HANDLER(handle_etm_analyze_command) | |||
struct etm_context *etm_ctx; | |||
int retval; | |||
target = get_current_target(cmd_ctx); | |||
target = get_current_target(CMD_CTX); | |||
arm = target_to_arm(target); | |||
if (!is_arm(arm)) | |||
{ | |||
command_print(cmd_ctx, "ETM: current target isn't an ARM"); | |||
command_print(CMD_CTX, "ETM: current target isn't an ARM"); | |||
return ERROR_FAIL; | |||
} | |||
etm_ctx = arm->etm; | |||
if (!etm_ctx) | |||
{ | |||
command_print(cmd_ctx, "current target doesn't have an ETM configured"); | |||
command_print(CMD_CTX, "current target doesn't have an ETM configured"); | |||
return ERROR_FAIL; | |||
} | |||
if ((retval = etmv1_analyze_trace(etm_ctx, cmd_ctx)) != ERROR_OK) | |||
if ((retval = etmv1_analyze_trace(etm_ctx, CMD_CTX)) != ERROR_OK) | |||
{ | |||
switch (retval) | |||
{ | |||
case ERROR_ETM_ANALYSIS_FAILED: | |||
command_print(cmd_ctx, "further analysis failed (corrupted trace data or just end of data"); | |||
command_print(CMD_CTX, "further analysis failed (corrupted trace data or just end of data"); | |||
break; | |||
case ERROR_TRACE_INSTRUCTION_UNAVAILABLE: | |||
command_print(cmd_ctx, "no instruction for current address available, analysis aborted"); | |||
command_print(CMD_CTX, "no instruction for current address available, analysis aborted"); | |||
break; | |||
case ERROR_TRACE_IMAGE_UNAVAILABLE: | |||
command_print(cmd_ctx, "no image available for trace analysis"); | |||
command_print(CMD_CTX, "no image available for trace analysis"); | |||
break; | |||
default: | |||
command_print(cmd_ctx, "unknown error: %i", retval); | |||
command_print(CMD_CTX, "unknown error: %i", retval); | |||
} | |||
} | |||
@@ -41,7 +41,7 @@ COMMAND_HANDLER(handle_etm_dummy_config_command) | |||
arm = target_to_arm(target); | |||
if (!is_arm(arm)) | |||
{ | |||
command_print(cmd_ctx, "target '%s' isn't an ARM", CMD_ARGV[0]); | |||
command_print(CMD_CTX, "target '%s' isn't an ARM", CMD_ARGV[0]); | |||
return ERROR_FAIL; | |||
} | |||
@@ -300,11 +300,11 @@ COMMAND_HANDLER(handle_oocd_trace_config_command) | |||
return ERROR_FAIL; | |||
} | |||
target = get_current_target(cmd_ctx); | |||
target = get_current_target(CMD_CTX); | |||
arm = target_to_arm(target); | |||
if (!is_arm(arm)) | |||
{ | |||
command_print(cmd_ctx, "current target isn't an ARM"); | |||
command_print(CMD_CTX, "current target isn't an ARM"); | |||
return ERROR_FAIL; | |||
} | |||
@@ -333,24 +333,24 @@ COMMAND_HANDLER(handle_oocd_trace_status_command) | |||
struct oocd_trace *oocd_trace; | |||
uint32_t status; | |||
target = get_current_target(cmd_ctx); | |||
target = get_current_target(CMD_CTX); | |||
arm = target_to_arm(target); | |||
if (!is_arm(arm)) | |||
{ | |||
command_print(cmd_ctx, "current target isn't an ARM"); | |||
command_print(CMD_CTX, "current target isn't an ARM"); | |||
return ERROR_FAIL; | |||
} | |||
if (!arm->etm) | |||
{ | |||
command_print(cmd_ctx, "current target doesn't have an ETM configured"); | |||
command_print(CMD_CTX, "current target doesn't have an ETM configured"); | |||
return ERROR_FAIL; | |||
} | |||
if (strcmp(arm->etm->capture_driver->name, "oocd_trace") != 0) | |||
{ | |||
command_print(cmd_ctx, "current target's ETM capture driver isn't 'oocd_trace'"); | |||
command_print(CMD_CTX, "current target's ETM capture driver isn't 'oocd_trace'"); | |||
return ERROR_FAIL; | |||
} | |||
@@ -359,9 +359,9 @@ COMMAND_HANDLER(handle_oocd_trace_status_command) | |||
oocd_trace_read_reg(oocd_trace, OOCD_TRACE_STATUS, &status); | |||
if (status & 0x8) | |||
command_print(cmd_ctx, "trace clock locked"); | |||
command_print(CMD_CTX, "trace clock locked"); | |||
else | |||
command_print(cmd_ctx, "no trace clock"); | |||
command_print(CMD_CTX, "no trace clock"); | |||
return ERROR_OK; | |||
} | |||
@@ -374,24 +374,24 @@ COMMAND_HANDLER(handle_oocd_trace_resync_command) | |||
size_t bytes_written; | |||
uint8_t cmd_array[1]; | |||
target = get_current_target(cmd_ctx); | |||
target = get_current_target(CMD_CTX); | |||
arm = target_to_arm(target); | |||
if (!is_arm(arm)) | |||
{ | |||
command_print(cmd_ctx, "current target isn't an ARM"); | |||
command_print(CMD_CTX, "current target isn't an ARM"); | |||
return ERROR_FAIL; | |||
} | |||
if (!arm->etm) | |||
{ | |||
command_print(cmd_ctx, "current target doesn't have an ETM configured"); | |||
command_print(CMD_CTX, "current target doesn't have an ETM configured"); | |||
return ERROR_FAIL; | |||
} | |||
if (strcmp(arm->etm->capture_driver->name, "oocd_trace") != 0) | |||
{ | |||
command_print(cmd_ctx, "current target's ETM capture driver isn't 'oocd_trace'"); | |||
command_print(CMD_CTX, "current target's ETM capture driver isn't 'oocd_trace'"); | |||
return ERROR_FAIL; | |||
} | |||
@@ -401,7 +401,7 @@ COMMAND_HANDLER(handle_oocd_trace_resync_command) | |||
bytes_written = write(oocd_trace->tty_fd, cmd_array, 1); | |||
command_print(cmd_ctx, "requesting traceclock resync"); | |||
command_print(CMD_CTX, "requesting traceclock resync"); | |||
LOG_DEBUG("resyncing traceclk pll"); | |||
return ERROR_OK; | |||
@@ -1652,24 +1652,24 @@ COMMAND_HANDLER(handle_targets_command) | |||
{ | |||
target = get_target(CMD_ARGV[0]); | |||
if (target == NULL) { | |||
command_print(cmd_ctx,"Target: %s is unknown, try one of:\n", CMD_ARGV[0]); | |||
command_print(CMD_CTX,"Target: %s is unknown, try one of:\n", CMD_ARGV[0]); | |||
goto DumpTargets; | |||
} | |||
if (!target->tap->enabled) { | |||
command_print(cmd_ctx,"Target: TAP %s is disabled, " | |||
command_print(CMD_CTX,"Target: TAP %s is disabled, " | |||
"can't be the current target\n", | |||
target->tap->dotted_name); | |||
return ERROR_FAIL; | |||
} | |||
cmd_ctx->current_target = target->target_number; | |||
CMD_CTX->current_target = target->target_number; | |||
return ERROR_OK; | |||
} | |||
DumpTargets: | |||
target = all_targets; | |||
command_print(cmd_ctx, " TargetName Type Endian TapName State "); | |||
command_print(cmd_ctx, "-- ------------------ ---------- ------ ------------------ ------------"); | |||
command_print(CMD_CTX, " TargetName Type Endian TapName State "); | |||
command_print(CMD_CTX, "-- ------------------ ---------- ------ ------------------ ------------"); | |||
while (target) | |||
{ | |||
const char *state; | |||
@@ -1680,11 +1680,11 @@ DumpTargets: | |||
else | |||
state = "tap-disabled"; | |||
if (cmd_ctx->current_target == target->target_number) | |||
if (CMD_CTX->current_target == target->target_number) | |||
marker = '*'; | |||
/* keep columns lined up to match the headers above */ | |||
command_print(cmd_ctx, "%2d%c %-18s %-10s %-6s %-18s %s", | |||
command_print(CMD_CTX, "%2d%c %-18s %-10s %-6s %-18s %s", | |||
target->target_number, | |||
marker, | |||
target->cmd_name, | |||
@@ -1865,7 +1865,7 @@ COMMAND_HANDLER(handle_reg_command) | |||
LOG_DEBUG("-"); | |||
target = get_current_target(cmd_ctx); | |||
target = get_current_target(CMD_CTX); | |||
/* list all available registers for the current target */ | |||
if (CMD_ARGC == 0) | |||
@@ -1877,7 +1877,7 @@ COMMAND_HANDLER(handle_reg_command) | |||
{ | |||
int i; | |||
command_print(cmd_ctx, "===== %s", cache->name); | |||
command_print(CMD_CTX, "===== %s", cache->name); | |||
for (i = 0, reg = cache->reg_list; | |||
i < cache->num_regs; | |||
@@ -1887,7 +1887,7 @@ COMMAND_HANDLER(handle_reg_command) | |||
if (reg->valid) { | |||
value = buf_to_str(reg->value, | |||
reg->size, 16); | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
"(%i) %s (/%" PRIu32 "): 0x%s%s", | |||
count, reg->name, | |||
reg->size, value, | |||
@@ -1896,7 +1896,7 @@ COMMAND_HANDLER(handle_reg_command) | |||
: ""); | |||
free(value); | |||
} else { | |||
command_print(cmd_ctx, "(%i) %s (/%" PRIu32 ")", | |||
command_print(CMD_CTX, "(%i) %s (/%" PRIu32 ")", | |||
count, reg->name, | |||
reg->size) ; | |||
} | |||
@@ -1933,7 +1933,7 @@ COMMAND_HANDLER(handle_reg_command) | |||
if (!reg) | |||
{ | |||
command_print(cmd_ctx, "%i is out of bounds, the current target has only %i registers (0 - %i)", num, count, count - 1); | |||
command_print(CMD_CTX, "%i is out of bounds, the current target has only %i registers (0 - %i)", num, count, count - 1); | |||
return ERROR_OK; | |||
} | |||
} else /* access a single register by its name */ | |||
@@ -1942,7 +1942,7 @@ COMMAND_HANDLER(handle_reg_command) | |||
if (!reg) | |||
{ | |||
command_print(cmd_ctx, "register %s not found in current target", CMD_ARGV[0]); | |||
command_print(CMD_CTX, "register %s not found in current target", CMD_ARGV[0]); | |||
return ERROR_OK; | |||
} | |||
} | |||
@@ -1958,7 +1958,7 @@ COMMAND_HANDLER(handle_reg_command) | |||
reg->type->get(reg); | |||
} | |||
value = buf_to_str(reg->value, reg->size, 16); | |||
command_print(cmd_ctx, "%s (/%i): 0x%s", reg->name, (int)(reg->size), value); | |||
command_print(CMD_CTX, "%s (/%i): 0x%s", reg->name, (int)(reg->size), value); | |||
free(value); | |||
return ERROR_OK; | |||
} | |||
@@ -1972,7 +1972,7 @@ COMMAND_HANDLER(handle_reg_command) | |||
reg->type->set(reg, buf); | |||
value = buf_to_str(reg->value, reg->size, 16); | |||
command_print(cmd_ctx, "%s (/%i): 0x%s", reg->name, (int)(reg->size), value); | |||
command_print(CMD_CTX, "%s (/%i): 0x%s", reg->name, (int)(reg->size), value); | |||
free(value); | |||
free(buf); | |||
@@ -1980,7 +1980,7 @@ COMMAND_HANDLER(handle_reg_command) | |||
return ERROR_OK; | |||
} | |||
command_print(cmd_ctx, "usage: reg <#|name> [value]"); | |||
command_print(CMD_CTX, "usage: reg <#|name> [value]"); | |||
return ERROR_OK; | |||
} | |||
@@ -1988,13 +1988,13 @@ COMMAND_HANDLER(handle_reg_command) | |||
COMMAND_HANDLER(handle_poll_command) | |||
{ | |||
int retval = ERROR_OK; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
if (CMD_ARGC == 0) | |||
{ | |||
command_print(cmd_ctx, "background polling: %s", | |||
command_print(CMD_CTX, "background polling: %s", | |||
jtag_poll_get_enabled() ? "on" : "off"); | |||
command_print(cmd_ctx, "TAP: %s (%s)", | |||
command_print(CMD_CTX, "TAP: %s (%s)", | |||
target->tap->dotted_name, | |||
target->tap->enabled ? "enabled" : "disabled"); | |||
if (!target->tap->enabled) | |||
@@ -2017,7 +2017,7 @@ COMMAND_HANDLER(handle_poll_command) | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "arg is \"on\" or \"off\""); | |||
command_print(CMD_CTX, "arg is \"on\" or \"off\""); | |||
} | |||
} else | |||
{ | |||
@@ -2038,14 +2038,14 @@ COMMAND_HANDLER(handle_wait_halt_command) | |||
int retval = parse_uint(CMD_ARGV[0], &ms); | |||
if (ERROR_OK != retval) | |||
{ | |||
command_print(cmd_ctx, "usage: %s [seconds]", CMD_NAME); | |||
command_print(CMD_CTX, "usage: %s [seconds]", CMD_NAME); | |||
return ERROR_COMMAND_SYNTAX_ERROR; | |||
} | |||
// convert seconds (given) to milliseconds (needed) | |||
ms *= 1000; | |||
} | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
return target_wait_state(target, TARGET_HALTED, ms); | |||
} | |||
@@ -2098,7 +2098,7 @@ COMMAND_HANDLER(handle_halt_command) | |||
{ | |||
LOG_DEBUG("-"); | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
int retval = target_halt(target); | |||
if (ERROR_OK != retval) | |||
return retval; | |||
@@ -2118,7 +2118,7 @@ COMMAND_HANDLER(handle_halt_command) | |||
COMMAND_HANDLER(handle_soft_reset_halt_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
LOG_USER("requesting target halt and executing a soft reset"); | |||
@@ -2144,7 +2144,7 @@ COMMAND_HANDLER(handle_reset_command) | |||
} | |||
/* reset *all* targets */ | |||
return target_process_reset(cmd_ctx, reset_mode); | |||
return target_process_reset(CMD_CTX, reset_mode); | |||
} | |||
@@ -2154,7 +2154,7 @@ COMMAND_HANDLER(handle_resume_command) | |||
if (CMD_ARGC > 1) | |||
return ERROR_COMMAND_SYNTAX_ERROR; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
target_handle_event(target, TARGET_EVENT_OLD_pre_resume); | |||
/* with no CMD_ARGV, resume from current pc, addr = 0, | |||
@@ -2188,7 +2188,7 @@ COMMAND_HANDLER(handle_step_command) | |||
current_pc = 0; | |||
} | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
return target->type->step(target, current_pc, addr, 1); | |||
} | |||
@@ -2282,10 +2282,10 @@ COMMAND_HANDLER(handle_md_command) | |||
uint8_t *buffer = calloc(count, size); | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
int retval = fn(target, address, size, count, buffer); | |||
if (ERROR_OK == retval) | |||
handle_md_output(cmd_ctx, target, address, size, count, buffer); | |||
handle_md_output(CMD_CTX, target, address, size, count, buffer); | |||
free(buffer); | |||
@@ -2324,7 +2324,7 @@ COMMAND_HANDLER(handle_mw_command) | |||
if (CMD_ARGC == 3) | |||
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[2], count); | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
unsigned wordsize; | |||
uint8_t value_buf[4]; | |||
switch (cmd_name[6]) | |||
@@ -2409,7 +2409,7 @@ COMMAND_HANDLER(handle_load_image_command) | |||
if (ERROR_OK != retval) | |||
return retval; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct duration bench; | |||
duration_start(&bench); | |||
@@ -2426,7 +2426,7 @@ COMMAND_HANDLER(handle_load_image_command) | |||
buffer = malloc(image.sections[i].size); | |||
if (buffer == NULL) | |||
{ | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
"error allocating buffer for section (%d bytes)", | |||
(int)(image.sections[i].size)); | |||
break; | |||
@@ -2464,7 +2464,7 @@ COMMAND_HANDLER(handle_load_image_command) | |||
break; | |||
} | |||
image_size += length; | |||
command_print(cmd_ctx, "%u bytes written at address 0x%8.8" PRIx32 "", | |||
command_print(CMD_CTX, "%u bytes written at address 0x%8.8" PRIx32 "", | |||
(unsigned int)length, | |||
image.sections[i].base_address + offset); | |||
} | |||
@@ -2474,7 +2474,7 @@ COMMAND_HANDLER(handle_load_image_command) | |||
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) | |||
{ | |||
command_print(cmd_ctx, "downloaded %" PRIu32 " bytes " | |||
command_print(CMD_CTX, "downloaded %" PRIu32 " bytes " | |||
"in %fs (%0.3f kb/s)", image_size, | |||
duration_elapsed(&bench), duration_kbps(&bench, image_size)); | |||
} | |||
@@ -2493,11 +2493,11 @@ COMMAND_HANDLER(handle_dump_image_command) | |||
int retvaltemp; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
if (CMD_ARGC != 3) | |||
{ | |||
command_print(cmd_ctx, "usage: dump_image <filename> <address> <size>"); | |||
command_print(CMD_CTX, "usage: dump_image <filename> <address> <size>"); | |||
return ERROR_OK; | |||
} | |||
@@ -2540,7 +2540,7 @@ COMMAND_HANDLER(handle_dump_image_command) | |||
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) | |||
{ | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
"dumped %zu bytes in %fs (%0.3f kb/s)", fileio.size, | |||
duration_elapsed(&bench), duration_kbps(&bench, fileio.size)); | |||
} | |||
@@ -2560,7 +2560,7 @@ static COMMAND_HELPER(handle_verify_image_command_internal, int verify) | |||
struct image image; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
if (CMD_ARGC < 1) | |||
{ | |||
@@ -2603,7 +2603,7 @@ static COMMAND_HELPER(handle_verify_image_command_internal, int verify) | |||
buffer = malloc(image.sections[i].size); | |||
if (buffer == NULL) | |||
{ | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
"error allocating buffer for section (%d bytes)", | |||
(int)(image.sections[i].size)); | |||
break; | |||
@@ -2631,7 +2631,7 @@ static COMMAND_HELPER(handle_verify_image_command_internal, int verify) | |||
/* failed crc checksum, fall back to a binary compare */ | |||
uint8_t *data; | |||
command_print(cmd_ctx, "checksum mismatch - attempting binary compare"); | |||
command_print(CMD_CTX, "checksum mismatch - attempting binary compare"); | |||
data = (uint8_t*)malloc(buf_cnt); | |||
@@ -2651,7 +2651,7 @@ static COMMAND_HELPER(handle_verify_image_command_internal, int verify) | |||
{ | |||
if (data[t] != buffer[t]) | |||
{ | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
"Verify operation failed address 0x%08x. Was 0x%02x instead of 0x%02x\n", | |||
(unsigned)(t + image.sections[i].base_address), | |||
data[t], | |||
@@ -2672,7 +2672,7 @@ static COMMAND_HELPER(handle_verify_image_command_internal, int verify) | |||
} | |||
} else | |||
{ | |||
command_print(cmd_ctx, "address 0x%08" PRIx32 " length 0x%08zx", | |||
command_print(CMD_CTX, "address 0x%08" PRIx32 " length 0x%08zx", | |||
image.sections[i].base_address, | |||
buf_cnt); | |||
} | |||
@@ -2683,7 +2683,7 @@ static COMMAND_HELPER(handle_verify_image_command_internal, int verify) | |||
done: | |||
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) | |||
{ | |||
command_print(cmd_ctx, "verified %" PRIu32 " bytes " | |||
command_print(CMD_CTX, "verified %" PRIu32 " bytes " | |||
"in %fs (%0.3f kb/s)", image_size, | |||
duration_elapsed(&bench), duration_kbps(&bench, image_size)); | |||
} | |||
@@ -2746,11 +2746,11 @@ static int handle_bp_command_set(struct command_context *cmd_ctx, | |||
COMMAND_HANDLER(handle_bp_command) | |||
{ | |||
if (CMD_ARGC == 0) | |||
return handle_bp_command_list(cmd_ctx); | |||
return handle_bp_command_list(CMD_CTX); | |||
if (CMD_ARGC < 2 || CMD_ARGC > 3) | |||
{ | |||
command_print(cmd_ctx, "usage: bp <address> <length> ['hw']"); | |||
command_print(CMD_CTX, "usage: bp <address> <length> ['hw']"); | |||
return ERROR_COMMAND_SYNTAX_ERROR; | |||
} | |||
@@ -2768,7 +2768,7 @@ COMMAND_HANDLER(handle_bp_command) | |||
return ERROR_COMMAND_SYNTAX_ERROR; | |||
} | |||
return handle_bp_command_set(cmd_ctx, addr, length, hw); | |||
return handle_bp_command_set(CMD_CTX, addr, length, hw); | |||
} | |||
COMMAND_HANDLER(handle_rbp_command) | |||
@@ -2779,7 +2779,7 @@ COMMAND_HANDLER(handle_rbp_command) | |||
uint32_t addr; | |||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], addr); | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
breakpoint_remove(target, addr); | |||
return ERROR_OK; | |||
@@ -2787,7 +2787,7 @@ COMMAND_HANDLER(handle_rbp_command) | |||
COMMAND_HANDLER(handle_wp_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
if (CMD_ARGC == 0) | |||
{ | |||
@@ -2795,7 +2795,7 @@ COMMAND_HANDLER(handle_wp_command) | |||
while (watchpoint) | |||
{ | |||
command_print(cmd_ctx, "address: 0x%8.8" PRIx32 | |||
command_print(CMD_CTX, "address: 0x%8.8" PRIx32 | |||
", len: 0x%8.8" PRIx32 | |||
", r/w/a: %i, value: 0x%8.8" PRIx32 | |||
", mask: 0x%8.8" PRIx32, | |||
@@ -2846,7 +2846,7 @@ COMMAND_HANDLER(handle_wp_command) | |||
break; | |||
default: | |||
command_print(cmd_ctx, "usage: wp [address length " | |||
command_print(CMD_CTX, "usage: wp [address length " | |||
"[(r|w|a) [value [mask]]]]"); | |||
return ERROR_COMMAND_SYNTAX_ERROR; | |||
} | |||
@@ -2867,7 +2867,7 @@ COMMAND_HANDLER(handle_rwp_command) | |||
uint32_t addr; | |||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], addr); | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
watchpoint_remove(target, addr); | |||
return ERROR_OK; | |||
@@ -2889,10 +2889,10 @@ COMMAND_HANDLER(handle_virt2phys_command) | |||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], va); | |||
uint32_t pa; | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
int retval = target->type->virt2phys(target, va, &pa); | |||
if (retval == ERROR_OK) | |||
command_print(cmd_ctx, "Physical address 0x%08" PRIx32 "", pa); | |||
command_print(CMD_CTX, "Physical address 0x%08" PRIx32 "", pa); | |||
return retval; | |||
} | |||
@@ -3016,7 +3016,7 @@ static void writeGmon(uint32_t *samples, uint32_t sampleNum, const char *filenam | |||
/* profiling samples the CPU PC as quickly as OpenOCD is able, which will be used as a random sampling of PC */ | |||
COMMAND_HANDLER(handle_profile_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct timeval timeout, now; | |||
gettimeofday(&timeout, NULL); | |||
@@ -3029,7 +3029,7 @@ COMMAND_HANDLER(handle_profile_command) | |||
timeval_add_time(&timeout, offset, 0); | |||
command_print(cmd_ctx, "Starting profiling. Halting and resuming the target as often as we can..."); | |||
command_print(CMD_CTX, "Starting profiling. Halting and resuming the target as often as we can..."); | |||
static const int maxSample = 10000; | |||
uint32_t *samples = malloc(sizeof(uint32_t)*maxSample); | |||
@@ -3061,7 +3061,7 @@ COMMAND_HANDLER(handle_profile_command) | |||
} | |||
} else | |||
{ | |||
command_print(cmd_ctx, "Target not halted or running"); | |||
command_print(CMD_CTX, "Target not halted or running"); | |||
retval = ERROR_OK; | |||
break; | |||
} | |||
@@ -3073,7 +3073,7 @@ COMMAND_HANDLER(handle_profile_command) | |||
gettimeofday(&now, NULL); | |||
if ((numSamples >= maxSample) || ((now.tv_sec >= timeout.tv_sec) && (now.tv_usec >= timeout.tv_usec))) | |||
{ | |||
command_print(cmd_ctx, "Profiling completed. %d samples.", numSamples); | |||
command_print(CMD_CTX, "Profiling completed. %d samples.", numSamples); | |||
if ((retval = target_poll(target)) != ERROR_OK) | |||
{ | |||
free(samples); | |||
@@ -3089,7 +3089,7 @@ COMMAND_HANDLER(handle_profile_command) | |||
return retval; | |||
} | |||
writeGmon(samples, numSamples, CMD_ARGV[1]); | |||
command_print(cmd_ctx, "Wrote %s", CMD_ARGV[1]); | |||
command_print(CMD_CTX, "Wrote %s", CMD_ARGV[1]); | |||
break; | |||
} | |||
} | |||
@@ -4571,7 +4571,7 @@ COMMAND_HANDLER(handle_fast_load_image_command) | |||
buffer = malloc(image.sections[i].size); | |||
if (buffer == NULL) | |||
{ | |||
command_print(cmd_ctx, "error allocating buffer for section (%d bytes)", | |||
command_print(CMD_CTX, "error allocating buffer for section (%d bytes)", | |||
(int)(image.sections[i].size)); | |||
break; | |||
} | |||
@@ -4614,7 +4614,7 @@ COMMAND_HANDLER(handle_fast_load_image_command) | |||
fastload[i].length = length; | |||
image_size += length; | |||
command_print(cmd_ctx, "%u bytes written at address 0x%8.8x", | |||
command_print(CMD_CTX, "%u bytes written at address 0x%8.8x", | |||
(unsigned int)length, | |||
((unsigned int)(image.sections[i].base_address + offset))); | |||
} | |||
@@ -4624,11 +4624,11 @@ COMMAND_HANDLER(handle_fast_load_image_command) | |||
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) | |||
{ | |||
command_print(cmd_ctx, "Loaded %" PRIu32 " bytes " | |||
command_print(CMD_CTX, "Loaded %" PRIu32 " bytes " | |||
"in %fs (%0.3f kb/s)", image_size, | |||
duration_elapsed(&bench), duration_kbps(&bench, image_size)); | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
"WARNING: image has not been loaded to target!" | |||
"You can issue a 'fast_load' to finish loading."); | |||
} | |||
@@ -4658,8 +4658,8 @@ COMMAND_HANDLER(handle_fast_load_command) | |||
int retval = ERROR_OK; | |||
for (i = 0; i < fastload_num;i++) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
command_print(cmd_ctx, "Write to 0x%08x, length 0x%08x", | |||
struct target *target = get_current_target(CMD_CTX); | |||
command_print(CMD_CTX, "Write to 0x%08x, length 0x%08x", | |||
(unsigned int)(fastload[i].address), | |||
(unsigned int)(fastload[i].length)); | |||
if (retval == ERROR_OK) | |||
@@ -4669,7 +4669,7 @@ COMMAND_HANDLER(handle_fast_load_command) | |||
size += fastload[i].length; | |||
} | |||
int after = timeval_ms(); | |||
command_print(cmd_ctx, "Loaded image %f kBytes/s", (float)(size/1024.0)/((float)(after-ms)/1000.0)); | |||
command_print(CMD_CTX, "Loaded image %f kBytes/s", (float)(size/1024.0)/((float)(after-ms)/1000.0)); | |||
return retval; | |||
} | |||
@@ -260,12 +260,12 @@ int delete_debug_msg_receiver(struct command_context *cmd_ctx, struct target *ta | |||
COMMAND_HANDLER(handle_target_request_debugmsgs_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
int receiving = 0; | |||
/* see if reciever is already registered */ | |||
if (find_debug_msg_receiver(cmd_ctx, target) != NULL) | |||
if (find_debug_msg_receiver(CMD_CTX, target) != NULL) | |||
receiving = 1; | |||
if (CMD_ARGC > 0) | |||
@@ -276,7 +276,7 @@ COMMAND_HANDLER(handle_target_request_debugmsgs_command) | |||
if (!receiving) | |||
{ | |||
receiving = 1; | |||
add_debug_msg_receiver(cmd_ctx, target); | |||
add_debug_msg_receiver(CMD_CTX, target); | |||
} | |||
charmsg_mode = !strcmp(CMD_ARGV[0], "charmsg"); | |||
} | |||
@@ -286,16 +286,16 @@ COMMAND_HANDLER(handle_target_request_debugmsgs_command) | |||
if (receiving) | |||
{ | |||
receiving = 0; | |||
delete_debug_msg_receiver(cmd_ctx, target); | |||
delete_debug_msg_receiver(CMD_CTX, target); | |||
} | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "usage: target_request debugmsgs ['enable'|'disable'|'charmsg']"); | |||
command_print(CMD_CTX, "usage: target_request debugmsgs ['enable'|'disable'|'charmsg']"); | |||
} | |||
} | |||
command_print(cmd_ctx, "receiving debug messages from current target %s", | |||
command_print(CMD_CTX, "receiving debug messages from current target %s", | |||
(receiving) ? (charmsg_mode?"charmsg":"enabled") : "disabled"); | |||
return ERROR_OK; | |||
} | |||
@@ -49,7 +49,7 @@ int trace_point(struct target *target, uint32_t number) | |||
COMMAND_HANDLER(handle_trace_point_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct trace *trace = target->trace_info; | |||
if (CMD_ARGC == 0) | |||
@@ -58,7 +58,7 @@ COMMAND_HANDLER(handle_trace_point_command) | |||
for (i = 0; i < trace->num_trace_points; i++) | |||
{ | |||
command_print(cmd_ctx, "trace point 0x%8.8" PRIx32 " (%lld times hit)", | |||
command_print(CMD_CTX, "trace point 0x%8.8" PRIx32 " (%lld times hit)", | |||
trace->trace_points[i].address, | |||
(long long)trace->trace_points[i].hit_counter); | |||
} | |||
@@ -97,7 +97,7 @@ COMMAND_HANDLER(handle_trace_point_command) | |||
COMMAND_HANDLER(handle_trace_history_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct trace *trace = target->trace_info; | |||
if (CMD_ARGC > 0) | |||
@@ -117,7 +117,7 @@ COMMAND_HANDLER(handle_trace_history_command) | |||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], trace->trace_history_size); | |||
trace->trace_history = malloc(sizeof(uint32_t) * trace->trace_history_size); | |||
command_print(cmd_ctx, "new trace history size: %i", (int)(trace->trace_history_size)); | |||
command_print(CMD_CTX, "new trace history size: %i", (int)(trace->trace_history_size)); | |||
} | |||
else | |||
{ | |||
@@ -126,7 +126,7 @@ COMMAND_HANDLER(handle_trace_history_command) | |||
uint32_t last = trace->trace_history_pos; | |||
if (!trace->trace_history_size) { | |||
command_print(cmd_ctx, "trace history buffer is not allocated"); | |||
command_print(CMD_CTX, "trace history buffer is not allocated"); | |||
return ERROR_OK; | |||
} | |||
if (trace->trace_history_overflowed) | |||
@@ -141,14 +141,14 @@ COMMAND_HANDLER(handle_trace_history_command) | |||
{ | |||
uint32_t address; | |||
address = trace->trace_points[trace->trace_history[i % trace->trace_history_size]].address; | |||
command_print(cmd_ctx, "trace point %i: 0x%8.8" PRIx32 "", | |||
command_print(CMD_CTX, "trace point %i: 0x%8.8" PRIx32 "", | |||
(int)(trace->trace_history[i % trace->trace_history_size]), | |||
address); | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "trace point %i: -not defined-", (int)(trace->trace_history[i % trace->trace_history_size])); | |||
command_print(CMD_CTX, "trace point %i: -not defined-", (int)(trace->trace_history[i % trace->trace_history_size])); | |||
} | |||
} | |||
} | |||
@@ -3008,7 +3008,7 @@ COMMAND_HANDLER(xscale_handle_debug_handler_command) | |||
} | |||
xscale = target_to_xscale(target); | |||
retval = xscale_verify_pointer(cmd_ctx, xscale); | |||
retval = xscale_verify_pointer(CMD_CTX, xscale); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
@@ -3047,7 +3047,7 @@ COMMAND_HANDLER(xscale_handle_cache_clean_address_command) | |||
return ERROR_FAIL; | |||
} | |||
xscale = target_to_xscale(target); | |||
retval = xscale_verify_pointer(cmd_ctx, xscale); | |||
retval = xscale_verify_pointer(CMD_CTX, xscale); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
@@ -3067,15 +3067,15 @@ COMMAND_HANDLER(xscale_handle_cache_clean_address_command) | |||
COMMAND_HANDLER(xscale_handle_cache_info_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct xscale_common *xscale = target_to_xscale(target); | |||
int retval; | |||
retval = xscale_verify_pointer(cmd_ctx, xscale); | |||
retval = xscale_verify_pointer(CMD_CTX, xscale); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
return armv4_5_handle_cache_info_command(cmd_ctx, &xscale->armv4_5_mmu.armv4_5_cache); | |||
return armv4_5_handle_cache_info_command(CMD_CTX, &xscale->armv4_5_mmu.armv4_5_cache); | |||
} | |||
static int xscale_virt2phys(struct target *target, | |||
@@ -3116,17 +3116,17 @@ static int xscale_mmu(struct target *target, int *enabled) | |||
COMMAND_HANDLER(xscale_handle_mmu_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct xscale_common *xscale = target_to_xscale(target); | |||
int retval; | |||
retval = xscale_verify_pointer(cmd_ctx, xscale); | |||
retval = xscale_verify_pointer(CMD_CTX, xscale); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
if (target->state != TARGET_HALTED) | |||
{ | |||
command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME); | |||
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME); | |||
return ERROR_OK; | |||
} | |||
@@ -3144,25 +3144,25 @@ COMMAND_HANDLER(xscale_handle_mmu_command) | |||
} | |||
} | |||
command_print(cmd_ctx, "mmu %s", (xscale->armv4_5_mmu.mmu_enabled) ? "enabled" : "disabled"); | |||
command_print(CMD_CTX, "mmu %s", (xscale->armv4_5_mmu.mmu_enabled) ? "enabled" : "disabled"); | |||
return ERROR_OK; | |||
} | |||
COMMAND_HANDLER(xscale_handle_idcache_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct xscale_common *xscale = target_to_xscale(target); | |||
int icache = 0, dcache = 0; | |||
int retval; | |||
retval = xscale_verify_pointer(cmd_ctx, xscale); | |||
retval = xscale_verify_pointer(CMD_CTX, xscale); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
if (target->state != TARGET_HALTED) | |||
{ | |||
command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME); | |||
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME); | |||
return ERROR_OK; | |||
} | |||
@@ -3194,27 +3194,27 @@ COMMAND_HANDLER(xscale_handle_idcache_command) | |||
} | |||
if (icache) | |||
command_print(cmd_ctx, "icache %s", (xscale->armv4_5_mmu.armv4_5_cache.i_cache_enabled) ? "enabled" : "disabled"); | |||
command_print(CMD_CTX, "icache %s", (xscale->armv4_5_mmu.armv4_5_cache.i_cache_enabled) ? "enabled" : "disabled"); | |||
if (dcache) | |||
command_print(cmd_ctx, "dcache %s", (xscale->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled) ? "enabled" : "disabled"); | |||
command_print(CMD_CTX, "dcache %s", (xscale->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled) ? "enabled" : "disabled"); | |||
return ERROR_OK; | |||
} | |||
COMMAND_HANDLER(xscale_handle_vector_catch_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct xscale_common *xscale = target_to_xscale(target); | |||
int retval; | |||
retval = xscale_verify_pointer(cmd_ctx, xscale); | |||
retval = xscale_verify_pointer(CMD_CTX, xscale); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
if (CMD_ARGC < 1) | |||
{ | |||
command_print(cmd_ctx, "usage: xscale vector_catch [mask]"); | |||
command_print(CMD_CTX, "usage: xscale vector_catch [mask]"); | |||
} | |||
else | |||
{ | |||
@@ -3223,7 +3223,7 @@ COMMAND_HANDLER(xscale_handle_vector_catch_command) | |||
xscale_write_dcsr(target, -1, -1); | |||
} | |||
command_print(cmd_ctx, "vector catch mask: 0x%2.2x", xscale->vector_catch); | |||
command_print(CMD_CTX, "vector catch mask: 0x%2.2x", xscale->vector_catch); | |||
return ERROR_OK; | |||
} | |||
@@ -3231,12 +3231,12 @@ COMMAND_HANDLER(xscale_handle_vector_catch_command) | |||
COMMAND_HANDLER(xscale_handle_vector_table_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct xscale_common *xscale = target_to_xscale(target); | |||
int err = 0; | |||
int retval; | |||
retval = xscale_verify_pointer(cmd_ctx, xscale); | |||
retval = xscale_verify_pointer(CMD_CTX, xscale); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
@@ -3244,13 +3244,13 @@ COMMAND_HANDLER(xscale_handle_vector_table_command) | |||
{ | |||
int idx; | |||
command_print(cmd_ctx, "active user-set static vectors:"); | |||
command_print(CMD_CTX, "active user-set static vectors:"); | |||
for (idx = 1; idx < 8; idx++) | |||
if (xscale->static_low_vectors_set & (1 << idx)) | |||
command_print(cmd_ctx, "low %d: 0x%" PRIx32, idx, xscale->static_low_vectors[idx]); | |||
command_print(CMD_CTX, "low %d: 0x%" PRIx32, idx, xscale->static_low_vectors[idx]); | |||
for (idx = 1; idx < 8; idx++) | |||
if (xscale->static_high_vectors_set & (1 << idx)) | |||
command_print(cmd_ctx, "high %d: 0x%" PRIx32, idx, xscale->static_high_vectors[idx]); | |||
command_print(CMD_CTX, "high %d: 0x%" PRIx32, idx, xscale->static_high_vectors[idx]); | |||
return ERROR_OK; | |||
} | |||
@@ -3281,7 +3281,7 @@ COMMAND_HANDLER(xscale_handle_vector_table_command) | |||
} | |||
if (err) | |||
command_print(cmd_ctx, "usage: xscale vector_table <high|low> <index> <code>"); | |||
command_print(CMD_CTX, "usage: xscale vector_table <high|low> <index> <code>"); | |||
return ERROR_OK; | |||
} | |||
@@ -3289,19 +3289,19 @@ COMMAND_HANDLER(xscale_handle_vector_table_command) | |||
COMMAND_HANDLER(xscale_handle_trace_buffer_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct xscale_common *xscale = target_to_xscale(target); | |||
struct armv4_5_common_s *armv4_5 = &xscale->armv4_5_common; | |||
uint32_t dcsr_value; | |||
int retval; | |||
retval = xscale_verify_pointer(cmd_ctx, xscale); | |||
retval = xscale_verify_pointer(CMD_CTX, xscale); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
if (target->state != TARGET_HALTED) | |||
{ | |||
command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME); | |||
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME); | |||
return ERROR_OK; | |||
} | |||
@@ -3353,7 +3353,7 @@ COMMAND_HANDLER(xscale_handle_trace_buffer_command) | |||
xscale->trace.pc_ok = 0; | |||
} | |||
command_print(cmd_ctx, "trace buffer %s (%s)", | |||
command_print(CMD_CTX, "trace buffer %s (%s)", | |||
(xscale->trace.buffer_enabled) ? "enabled" : "disabled", | |||
(xscale->trace.buffer_fill > 0) ? "fill" : "wrap"); | |||
@@ -3368,17 +3368,17 @@ COMMAND_HANDLER(xscale_handle_trace_buffer_command) | |||
COMMAND_HANDLER(xscale_handle_trace_image_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct xscale_common *xscale = target_to_xscale(target); | |||
int retval; | |||
if (CMD_ARGC < 1) | |||
{ | |||
command_print(cmd_ctx, "usage: xscale trace_image <file> [base address] [type]"); | |||
command_print(CMD_CTX, "usage: xscale trace_image <file> [base address] [type]"); | |||
return ERROR_OK; | |||
} | |||
retval = xscale_verify_pointer(cmd_ctx, xscale); | |||
retval = xscale_verify_pointer(CMD_CTX, xscale); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
@@ -3386,7 +3386,7 @@ COMMAND_HANDLER(xscale_handle_trace_image_command) | |||
{ | |||
image_close(xscale->trace.image); | |||
free(xscale->trace.image); | |||
command_print(cmd_ctx, "previously loaded image found and closed"); | |||
command_print(CMD_CTX, "previously loaded image found and closed"); | |||
} | |||
xscale->trace.image = malloc(sizeof(struct image)); | |||
@@ -3416,25 +3416,25 @@ COMMAND_HANDLER(xscale_handle_trace_image_command) | |||
COMMAND_HANDLER(xscale_handle_dump_trace_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct xscale_common *xscale = target_to_xscale(target); | |||
struct xscale_trace_data *trace_data; | |||
struct fileio file; | |||
int retval; | |||
retval = xscale_verify_pointer(cmd_ctx, xscale); | |||
retval = xscale_verify_pointer(CMD_CTX, xscale); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
if (target->state != TARGET_HALTED) | |||
{ | |||
command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME); | |||
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME); | |||
return ERROR_OK; | |||
} | |||
if (CMD_ARGC < 1) | |||
{ | |||
command_print(cmd_ctx, "usage: xscale dump_trace <file>"); | |||
command_print(CMD_CTX, "usage: xscale dump_trace <file>"); | |||
return ERROR_OK; | |||
} | |||
@@ -3442,7 +3442,7 @@ COMMAND_HANDLER(xscale_handle_dump_trace_command) | |||
if (!trace_data) | |||
{ | |||
command_print(cmd_ctx, "no trace data collected"); | |||
command_print(CMD_CTX, "no trace data collected"); | |||
return ERROR_OK; | |||
} | |||
@@ -3473,32 +3473,32 @@ COMMAND_HANDLER(xscale_handle_dump_trace_command) | |||
COMMAND_HANDLER(xscale_handle_analyze_trace_buffer_command) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct xscale_common *xscale = target_to_xscale(target); | |||
int retval; | |||
retval = xscale_verify_pointer(cmd_ctx, xscale); | |||
retval = xscale_verify_pointer(CMD_CTX, xscale); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
xscale_analyze_trace(target, cmd_ctx); | |||
xscale_analyze_trace(target, CMD_CTX); | |||
return ERROR_OK; | |||
} | |||
COMMAND_HANDLER(xscale_handle_cp15) | |||
{ | |||
struct target *target = get_current_target(cmd_ctx); | |||
struct target *target = get_current_target(CMD_CTX); | |||
struct xscale_common *xscale = target_to_xscale(target); | |||
int retval; | |||
retval = xscale_verify_pointer(cmd_ctx, xscale); | |||
retval = xscale_verify_pointer(CMD_CTX, xscale); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
if (target->state != TARGET_HALTED) | |||
{ | |||
command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME); | |||
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME); | |||
return ERROR_OK; | |||
} | |||
uint32_t reg_no = 0; | |||
@@ -3534,7 +3534,7 @@ COMMAND_HANDLER(xscale_handle_cp15) | |||
reg_no = XSCALE_CPACCESS; | |||
break; | |||
default: | |||
command_print(cmd_ctx, "invalid register number"); | |||
command_print(CMD_CTX, "invalid register number"); | |||
return ERROR_INVALID_ARGUMENTS; | |||
} | |||
reg = &xscale->reg_cache->reg_list[reg_no]; | |||
@@ -3547,7 +3547,7 @@ COMMAND_HANDLER(xscale_handle_cp15) | |||
/* read cp15 control register */ | |||
xscale_get_reg(reg); | |||
value = buf_get_u32(reg->value, 0, 32); | |||
command_print(cmd_ctx, "%s (/%i): 0x%" PRIx32 "", reg->name, (int)(reg->size), value); | |||
command_print(CMD_CTX, "%s (/%i): 0x%" PRIx32 "", reg->name, (int)(reg->size), value); | |||
} | |||
else if (CMD_ARGC == 2) | |||
{ | |||
@@ -3568,7 +3568,7 @@ COMMAND_HANDLER(xscale_handle_cp15) | |||
} | |||
else | |||
{ | |||
command_print(cmd_ctx, "usage: cp15 [register]<, [value]>"); | |||
command_print(CMD_CTX, "usage: cp15 [register]<, [value]>"); | |||
} | |||
return ERROR_OK; | |||
@@ -221,7 +221,7 @@ COMMAND_HANDLER(handle_xsvf_command) | |||
if (CMD_ARGC < 2) | |||
{ | |||
command_print(cmd_ctx, "usage: xsvf <device#|plain> <file> [<variant>] [quiet]"); | |||
command_print(CMD_CTX, "usage: xsvf <device#|plain> <file> [<variant>] [quiet]"); | |||
return ERROR_FAIL; | |||
} | |||
@@ -233,14 +233,14 @@ COMMAND_HANDLER(handle_xsvf_command) | |||
tap = jtag_tap_by_string(CMD_ARGV[0]); | |||
if (!tap) | |||
{ | |||
command_print(cmd_ctx, "Tap: %s unknown", CMD_ARGV[0]); | |||
command_print(CMD_CTX, "Tap: %s unknown", CMD_ARGV[0]); | |||
return ERROR_FAIL; | |||
} | |||
} | |||
if ((xsvf_fd = open(filename, O_RDONLY)) < 0) | |||
{ | |||
command_print(cmd_ctx, "file \"%s\" not found", filename); | |||
command_print(CMD_CTX, "file \"%s\" not found", filename); | |||
return ERROR_FAIL; | |||
} | |||
@@ -1012,7 +1012,7 @@ COMMAND_HANDLER(handle_xsvf_command) | |||
if (tdo_mismatch) | |||
{ | |||
command_print(cmd_ctx, "TDO mismatch, somewhere near offset %lu in xsvf file, aborting", | |||
command_print(CMD_CTX, "TDO mismatch, somewhere near offset %lu in xsvf file, aborting", | |||
file_offset); | |||
@@ -1022,7 +1022,7 @@ COMMAND_HANDLER(handle_xsvf_command) | |||
if (unsupported) | |||
{ | |||
off_t offset = lseek(xsvf_fd, 0, SEEK_CUR) - 1; | |||
command_print(cmd_ctx, | |||
command_print(CMD_CTX, | |||
"unsupported xsvf command (0x%02X) at offset %jd, aborting", | |||
uc, (intmax_t)offset); | |||
return ERROR_FAIL; | |||
@@ -1030,7 +1030,7 @@ COMMAND_HANDLER(handle_xsvf_command) | |||
if (do_abort) | |||
{ | |||
command_print(cmd_ctx, "premature end of xsvf file detected, aborting"); | |||
command_print(CMD_CTX, "premature end of xsvf file detected, aborting"); | |||
return ERROR_FAIL; | |||
} | |||
@@ -1045,7 +1045,7 @@ COMMAND_HANDLER(handle_xsvf_command) | |||
close(xsvf_fd); | |||
command_print(cmd_ctx, "XSVF file programmed successfully"); | |||
command_print(CMD_CTX, "XSVF file programmed successfully"); | |||
return ERROR_OK; | |||
} | |||