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# Configuration for the ST SPEAr320 CPU board |
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# EVAL_SPEAr320CPU Rev. 2.0 |
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# http://www.st.com/spear |
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# |
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# Date: 2011-11-18 |
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# Author: Antonio Borneo <borneo.antonio@gmail.com> |
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# The standard board has JTAG SRST not connected. |
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# This script targets such boards using quirky code to bypass the issue. |
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source [find mem_helper.tcl] |
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source [find target/spear3xx.cfg] |
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source [find chip/st/spear/spear3xx_ddr.tcl] |
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source [find chip/st/spear/spear3xx.tcl] |
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arm7_9 dcc_downloads enable |
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arm7_9 fast_memory_access enable |
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# Serial NOR on SMI CS0. 8Mbyte. |
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set _FLASHNAME1 $_CHIPNAME.snor |
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flash bank $_FLASHNAME1 stmsmi 0xf8000000 0 0 0 $_TARGETNAME |
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if { [info exists BOARD_HAS_SRST] } { |
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# Modified board has SRST on JTAG connector |
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reset_config trst_and_srst separate srst_gates_jtag \ |
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trst_push_pull srst_open_drain |
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} else { |
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# Standard board has no SRST on JTAG connector |
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reset_config trst_only separate srst_gates_jtag trst_push_pull |
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source [find chip/st/spear/quirk_no_srst.tcl] |
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} |
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$_TARGETNAME configure -event reset-init { spear320cpu_init } |
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proc spear320cpu_init {} { |
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reg pc 0xffff0020; # loop forever |
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sp3xx_clock_default |
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sp3xx_common_init |
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sp3xx_ddr_init "mt47h64m16_3_333_cl5_async" $DDR_CHIPS |
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sp320_init |
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} |