Working area pointers shouldn't be re-used, so there's no point in storing them in the flash bank struct. Make all such pointers local. Change-Id: Iab65b4e8b475fed7fc72fb8928f54590fa69d260 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/865 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>tags/v0.7.0-rc1
@@ -43,21 +43,12 @@ static int aduc702x_set_write_enable(struct target *target, int enable); | |||
#define ADUC702x_FLASH_FEEPRO (6*4) | |||
#define ADUC702x_FLASH_FEEHIDE (7*4) | |||
struct aduc702x_flash_bank { | |||
struct working_area *write_algorithm; | |||
}; | |||
/* flash bank aduc702x 0 0 0 0 <target#> | |||
* The ADC7019-28 devices all have the same flash layout */ | |||
FLASH_BANK_COMMAND_HANDLER(aduc702x_flash_bank_command) | |||
{ | |||
struct aduc702x_flash_bank *nbank; | |||
nbank = malloc(sizeof(struct aduc702x_flash_bank)); | |||
bank->base = 0x80000; | |||
bank->size = 0xF800; /* top 4k not accessible */ | |||
bank->driver_priv = nbank; | |||
aduc702x_build_sector_list(bank); | |||
@@ -157,9 +148,9 @@ static int aduc702x_write_block(struct flash_bank *bank, | |||
uint32_t offset, | |||
uint32_t count) | |||
{ | |||
struct aduc702x_flash_bank *aduc702x_info = bank->driver_priv; | |||
struct target *target = bank->target; | |||
uint32_t buffer_size = 7000; | |||
struct working_area *write_algorithm; | |||
struct working_area *source; | |||
uint32_t address = bank->base + offset; | |||
struct reg_param reg_params[6]; | |||
@@ -210,12 +201,12 @@ static int aduc702x_write_block(struct flash_bank *bank, | |||
/* flash write code */ | |||
if (target_alloc_working_area(target, sizeof(aduc702x_flash_write_code), | |||
&aduc702x_info->write_algorithm) != ERROR_OK) { | |||
&write_algorithm) != ERROR_OK) { | |||
LOG_WARNING("no working area available, can't do block memory writes"); | |||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | |||
} | |||
retval = target_write_buffer(target, aduc702x_info->write_algorithm->address, | |||
retval = target_write_buffer(target, write_algorithm->address, | |||
sizeof(aduc702x_flash_write_code), (uint8_t *)aduc702x_flash_write_code); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
@@ -224,10 +215,9 @@ static int aduc702x_write_block(struct flash_bank *bank, | |||
while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) { | |||
buffer_size /= 2; | |||
if (buffer_size <= 256) { | |||
/* if we already allocated the writing code, but failed to get a buffer, | |||
/* we already allocated the writing code, but failed to get a buffer, | |||
*free the algorithm */ | |||
if (aduc702x_info->write_algorithm) | |||
target_free_working_area(target, aduc702x_info->write_algorithm); | |||
target_free_working_area(target, write_algorithm); | |||
LOG_WARNING("no large enough working area available, can't do block memory writes"); | |||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | |||
@@ -257,8 +247,8 @@ static int aduc702x_write_block(struct flash_bank *bank, | |||
buf_set_u32(reg_params[4].value, 0, 32, 0xFFFFF800); | |||
retval = target_run_algorithm(target, 0, NULL, 5, | |||
reg_params, aduc702x_info->write_algorithm->address, | |||
aduc702x_info->write_algorithm->address + | |||
reg_params, write_algorithm->address, | |||
write_algorithm->address + | |||
sizeof(aduc702x_flash_write_code) - 4, | |||
10000, &arm_algo); | |||
if (retval != ERROR_OK) { | |||
@@ -279,7 +269,7 @@ static int aduc702x_write_block(struct flash_bank *bank, | |||
} | |||
target_free_working_area(target, source); | |||
target_free_working_area(target, aduc702x_info->write_algorithm); | |||
target_free_working_area(target, write_algorithm); | |||
destroy_reg_param(®_params[0]); | |||
destroy_reg_param(®_params[1]); | |||
@@ -825,8 +825,6 @@ FLASH_BANK_COMMAND_HANDLER(cfi_flash_bank_command) | |||
cfi_info->pri_ext = NULL; | |||
bank->driver_priv = cfi_info; | |||
cfi_info->write_algorithm = NULL; | |||
cfi_info->x16_as_x8 = 0; | |||
cfi_info->jedec_probe = 0; | |||
cfi_info->not_cfi = 0; | |||
@@ -838,8 +836,6 @@ FLASH_BANK_COMMAND_HANDLER(cfi_flash_bank_command) | |||
cfi_info->jedec_probe = 1; | |||
} | |||
cfi_info->write_algorithm = NULL; | |||
/* bank wasn't probed yet */ | |||
cfi_info->qry[0] = 0xff; | |||
@@ -1143,10 +1139,10 @@ static uint32_t cfi_command_val(struct flash_bank *bank, uint8_t cmd) | |||
static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
uint32_t address, uint32_t count) | |||
{ | |||
struct cfi_flash_bank *cfi_info = bank->driver_priv; | |||
struct target *target = bank->target; | |||
struct reg_param reg_params[7]; | |||
struct arm_algorithm arm_algo; | |||
struct working_area *write_algorithm; | |||
struct working_area *source = NULL; | |||
uint32_t buffer_size = 32768; | |||
uint32_t write_command_val, busy_pattern_val, error_pattern_val; | |||
@@ -1260,31 +1256,29 @@ static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
} | |||
/* flash write code */ | |||
if (!cfi_info->write_algorithm) { | |||
if (target_code_size > sizeof(target_code)) { | |||
LOG_WARNING("Internal error - target code buffer to small. " | |||
if (target_code_size > sizeof(target_code)) { | |||
LOG_WARNING("Internal error - target code buffer to small. " | |||
"Increase CFI_MAX_INTEL_CODESIZE and recompile."); | |||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | |||
} | |||
cfi_fix_code_endian(target, target_code, target_code_src, target_code_size / 4); | |||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | |||
} | |||
cfi_fix_code_endian(target, target_code, target_code_src, target_code_size / 4); | |||
/* Get memory for block write handler */ | |||
retval = target_alloc_working_area(target, | |||
target_code_size, | |||
&cfi_info->write_algorithm); | |||
if (retval != ERROR_OK) { | |||
LOG_WARNING("No working area available, can't do block memory writes"); | |||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | |||
} | |||
; | |||
/* Get memory for block write handler */ | |||
retval = target_alloc_working_area(target, | |||
target_code_size, | |||
&write_algorithm); | |||
if (retval != ERROR_OK) { | |||
LOG_WARNING("No working area available, can't do block memory writes"); | |||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | |||
} | |||
; | |||
/* write algorithm code to working area */ | |||
retval = target_write_buffer(target, cfi_info->write_algorithm->address, | |||
target_code_size, target_code); | |||
if (retval != ERROR_OK) { | |||
LOG_ERROR("Unable to write block write code to target"); | |||
goto cleanup; | |||
} | |||
/* write algorithm code to working area */ | |||
retval = target_write_buffer(target, write_algorithm->address, | |||
target_code_size, target_code); | |||
if (retval != ERROR_OK) { | |||
LOG_ERROR("Unable to write block write code to target"); | |||
goto cleanup; | |||
} | |||
/* Get a workspace buffer for the data to flash starting with 32k size. | |||
@@ -1340,8 +1334,8 @@ static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
/* Execute algorithm, assume breakpoint for last instruction */ | |||
retval = target_run_algorithm(target, 0, NULL, 7, reg_params, | |||
cfi_info->write_algorithm->address, | |||
cfi_info->write_algorithm->address + target_code_size - | |||
write_algorithm->address, | |||
write_algorithm->address + target_code_size - | |||
sizeof(uint32_t), | |||
10000, /* 10s should be enough for max. 32k of data */ | |||
&arm_algo); | |||
@@ -1381,10 +1375,7 @@ cleanup: | |||
if (source) | |||
target_free_working_area(target, source); | |||
if (cfi_info->write_algorithm) { | |||
target_free_working_area(target, cfi_info->write_algorithm); | |||
cfi_info->write_algorithm = NULL; | |||
} | |||
target_free_working_area(target, write_algorithm); | |||
destroy_reg_param(®_params[0]); | |||
destroy_reg_param(®_params[1]); | |||
@@ -1405,6 +1396,7 @@ static int cfi_spansion_write_block_mips(struct flash_bank *bank, uint8_t *buffe | |||
struct target *target = bank->target; | |||
struct reg_param reg_params[10]; | |||
struct mips32_algorithm mips32_info; | |||
struct working_area *write_algorithm; | |||
struct working_area *source; | |||
uint32_t buffer_size = 32768; | |||
uint32_t status; | |||
@@ -1518,44 +1510,42 @@ static int cfi_spansion_write_block_mips(struct flash_bank *bank, uint8_t *buffe | |||
} | |||
/* flash write code */ | |||
if (!cfi_info->write_algorithm) { | |||
uint8_t *target_code; | |||
uint8_t *target_code; | |||
/* convert bus-width dependent algorithm code to correct endiannes */ | |||
target_code = malloc(target_code_size); | |||
if (target_code == NULL) { | |||
LOG_ERROR("Out of memory"); | |||
return ERROR_FAIL; | |||
} | |||
cfi_fix_code_endian(target, target_code, target_code_src, target_code_size / 4); | |||
/* allocate working area */ | |||
retval = target_alloc_working_area(target, target_code_size, | |||
&cfi_info->write_algorithm); | |||
if (retval != ERROR_OK) { | |||
free(target_code); | |||
return retval; | |||
} | |||
/* convert bus-width dependent algorithm code to correct endiannes */ | |||
target_code = malloc(target_code_size); | |||
if (target_code == NULL) { | |||
LOG_ERROR("Out of memory"); | |||
return ERROR_FAIL; | |||
} | |||
cfi_fix_code_endian(target, target_code, target_code_src, target_code_size / 4); | |||
/* write algorithm code to working area */ | |||
retval = target_write_buffer(target, cfi_info->write_algorithm->address, | |||
target_code_size, target_code); | |||
if (retval != ERROR_OK) { | |||
free(target_code); | |||
return retval; | |||
} | |||
/* allocate working area */ | |||
retval = target_alloc_working_area(target, target_code_size, | |||
&write_algorithm); | |||
if (retval != ERROR_OK) { | |||
free(target_code); | |||
return retval; | |||
} | |||
/* write algorithm code to working area */ | |||
retval = target_write_buffer(target, write_algorithm->address, | |||
target_code_size, target_code); | |||
if (retval != ERROR_OK) { | |||
free(target_code); | |||
return retval; | |||
} | |||
free(target_code); | |||
/* the following code still assumes target code is fixed 24*4 bytes */ | |||
while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) { | |||
buffer_size /= 2; | |||
if (buffer_size <= 256) { | |||
/* if we already allocated the writing code, but failed to get a | |||
/* we already allocated the writing code, but failed to get a | |||
* buffer, free the algorithm */ | |||
if (cfi_info->write_algorithm) | |||
target_free_working_area(target, cfi_info->write_algorithm); | |||
target_free_working_area(target, write_algorithm); | |||
LOG_WARNING( | |||
"not enough working area available, can't do block memory writes"); | |||
@@ -1593,8 +1583,8 @@ static int cfi_spansion_write_block_mips(struct flash_bank *bank, uint8_t *buffe | |||
buf_set_u32(reg_params[9].value, 0, 32, 0x55555555); | |||
retval = target_run_algorithm(target, 0, NULL, 10, reg_params, | |||
cfi_info->write_algorithm->address, | |||
cfi_info->write_algorithm->address + ((target_code_size) - 4), | |||
write_algorithm->address, | |||
write_algorithm->address + ((target_code_size) - 4), | |||
10000, &mips32_info); | |||
if (retval != ERROR_OK) | |||
break; | |||
@@ -1637,6 +1627,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
void *arm_algo; | |||
struct arm_algorithm armv4_5_algo; | |||
struct armv7m_algorithm armv7m_algo; | |||
struct working_area *write_algorithm; | |||
struct working_area *source; | |||
uint32_t buffer_size = 32768; | |||
uint32_t status; | |||
@@ -1880,44 +1871,42 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
} | |||
/* flash write code */ | |||
if (!cfi_info->write_algorithm) { | |||
uint8_t *target_code; | |||
uint8_t *target_code; | |||
/* convert bus-width dependent algorithm code to correct endiannes */ | |||
target_code = malloc(target_code_size); | |||
if (target_code == NULL) { | |||
LOG_ERROR("Out of memory"); | |||
return ERROR_FAIL; | |||
} | |||
cfi_fix_code_endian(target, target_code, target_code_src, target_code_size / 4); | |||
/* allocate working area */ | |||
retval = target_alloc_working_area(target, target_code_size, | |||
&cfi_info->write_algorithm); | |||
if (retval != ERROR_OK) { | |||
free(target_code); | |||
return retval; | |||
} | |||
/* convert bus-width dependent algorithm code to correct endiannes */ | |||
target_code = malloc(target_code_size); | |||
if (target_code == NULL) { | |||
LOG_ERROR("Out of memory"); | |||
return ERROR_FAIL; | |||
} | |||
cfi_fix_code_endian(target, target_code, target_code_src, target_code_size / 4); | |||
/* write algorithm code to working area */ | |||
retval = target_write_buffer(target, cfi_info->write_algorithm->address, | |||
target_code_size, target_code); | |||
if (retval != ERROR_OK) { | |||
free(target_code); | |||
return retval; | |||
} | |||
/* allocate working area */ | |||
retval = target_alloc_working_area(target, target_code_size, | |||
&write_algorithm); | |||
if (retval != ERROR_OK) { | |||
free(target_code); | |||
return retval; | |||
} | |||
/* write algorithm code to working area */ | |||
retval = target_write_buffer(target, write_algorithm->address, | |||
target_code_size, target_code); | |||
if (retval != ERROR_OK) { | |||
free(target_code); | |||
return retval; | |||
} | |||
free(target_code); | |||
/* the following code still assumes target code is fixed 24*4 bytes */ | |||
while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) { | |||
buffer_size /= 2; | |||
if (buffer_size <= 256) { | |||
/* if we already allocated the writing code, but failed to get a | |||
/* we already allocated the writing code, but failed to get a | |||
* buffer, free the algorithm */ | |||
if (cfi_info->write_algorithm) | |||
target_free_working_area(target, cfi_info->write_algorithm); | |||
target_free_working_area(target, write_algorithm); | |||
LOG_WARNING( | |||
"not enough working area available, can't do block memory writes"); | |||
@@ -1955,8 +1944,8 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
buf_set_u32(reg_params[9].value, 0, 32, 0x55555555); | |||
retval = target_run_algorithm(target, 0, NULL, 10, reg_params, | |||
cfi_info->write_algorithm->address, | |||
cfi_info->write_algorithm->address + ((target_code_size) - 4), | |||
write_algorithm->address, | |||
write_algorithm->address + ((target_code_size) - 4), | |||
10000, arm_algo); | |||
if (retval != ERROR_OK) | |||
break; | |||
@@ -25,8 +25,6 @@ | |||
#define CFI_STATUS_POLL_MASK_DQ6_DQ7 0xC0 /* DQ6..DQ7 */ | |||
struct cfi_flash_bank { | |||
struct working_area *write_algorithm; | |||
int x16_as_x8; | |||
int jedec_probe; | |||
int not_cfi; | |||
@@ -88,7 +88,6 @@ struct em357_options { | |||
struct em357_flash_bank { | |||
struct em357_options option_bytes; | |||
struct working_area *write_algorithm; | |||
int ppage_size; | |||
int probed; | |||
}; | |||
@@ -107,7 +106,6 @@ FLASH_BANK_COMMAND_HANDLER(em357_flash_bank_command) | |||
em357_info = malloc(sizeof(struct em357_flash_bank)); | |||
bank->driver_priv = em357_info; | |||
em357_info->write_algorithm = NULL; | |||
em357_info->probed = 0; | |||
return ERROR_OK; | |||
@@ -457,9 +455,9 @@ static int em357_protect(struct flash_bank *bank, int set, int first, int last) | |||
static int em357_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
uint32_t offset, uint32_t count) | |||
{ | |||
struct em357_flash_bank *em357_info = bank->driver_priv; | |||
struct target *target = bank->target; | |||
uint32_t buffer_size = 16384; | |||
struct working_area *write_algorithm; | |||
struct working_area *source; | |||
uint32_t address = bank->base + offset; | |||
struct reg_param reg_params[4]; | |||
@@ -497,13 +495,13 @@ static int em357_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
/* flash write code */ | |||
if (target_alloc_working_area(target, sizeof(em357_flash_write_code), | |||
&em357_info->write_algorithm) != ERROR_OK) { | |||
&write_algorithm) != ERROR_OK) { | |||
LOG_WARNING("no working area available, can't do block memory writes"); | |||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | |||
} | |||
; | |||
retval = target_write_buffer(target, em357_info->write_algorithm->address, | |||
retval = target_write_buffer(target, write_algorithm->address, | |||
sizeof(em357_flash_write_code), (uint8_t *)em357_flash_write_code); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
@@ -512,10 +510,9 @@ static int em357_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) { | |||
buffer_size /= 2; | |||
if (buffer_size <= 256) { | |||
/* if we already allocated the writing code, but failed to get a | |||
/* we already allocated the writing code, but failed to get a | |||
* buffer, free the algorithm */ | |||
if (em357_info->write_algorithm) | |||
target_free_working_area(target, em357_info->write_algorithm); | |||
target_free_working_area(target, write_algorithm); | |||
LOG_WARNING( | |||
"no large enough working area available, can't do block memory writes"); | |||
@@ -546,7 +543,7 @@ static int em357_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
buf_set_u32(reg_params[3].value, 0, 32, 0); | |||
retval = target_run_algorithm(target, 0, NULL, 4, reg_params, | |||
em357_info->write_algorithm->address, 0, 10000, &armv7m_info); | |||
write_algorithm->address, 0, 10000, &armv7m_info); | |||
if (retval != ERROR_OK) { | |||
LOG_ERROR("error executing em357 flash write algorithm"); | |||
break; | |||
@@ -574,7 +571,7 @@ static int em357_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
} | |||
target_free_working_area(target, source); | |||
target_free_working_area(target, em357_info->write_algorithm); | |||
target_free_working_area(target, write_algorithm); | |||
destroy_reg_param(®_params[0]); | |||
destroy_reg_param(®_params[1]); | |||
@@ -53,7 +53,6 @@ enum fm3_flash_type { | |||
}; | |||
struct fm3_flash_bank { | |||
struct working_area *write_algorithm; | |||
enum fm3_variant variant; | |||
enum fm3_flash_type flashtype; | |||
int probed; | |||
@@ -115,7 +114,6 @@ FLASH_BANK_COMMAND_HANDLER(fm3_flash_bank_command) | |||
return ERROR_FLASH_BANK_INVALID; | |||
} | |||
fm3_info->write_algorithm = NULL; | |||
fm3_info->probed = 0; | |||
return ERROR_OK; | |||
@@ -282,6 +280,7 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
struct fm3_flash_bank *fm3_info = bank->driver_priv; | |||
struct target *target = bank->target; | |||
uint32_t buffer_size = 2048; /* 8192 for MB9Bxx6! */ | |||
struct working_area *write_algorithm; | |||
struct working_area *source; | |||
uint32_t address = bank->base + offset; | |||
struct reg_param reg_params[6]; | |||
@@ -461,12 +460,12 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
/* allocate working area with flash programming code */ | |||
if (target_alloc_working_area(target, sizeof(fm3_flash_write_code), | |||
&fm3_info->write_algorithm) != ERROR_OK) { | |||
&write_algorithm) != ERROR_OK) { | |||
LOG_WARNING("no working area available, can't do block memory writes"); | |||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | |||
} | |||
retval = target_write_buffer(target, fm3_info->write_algorithm->address, | |||
retval = target_write_buffer(target, write_algorithm->address, | |||
sizeof(fm3_flash_write_code), fm3_flash_write_code); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
@@ -477,9 +476,8 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) { | |||
buffer_size /= 2; | |||
if (buffer_size <= 256) { | |||
/* free working area, if write algorithm already allocated */ | |||
if (fm3_info->write_algorithm) | |||
target_free_working_area(target, fm3_info->write_algorithm); | |||
/* free working area, write algorithm already allocated */ | |||
target_free_working_area(target, write_algorithm); | |||
LOG_WARNING("No large enough working area available, can't do block memory writes"); | |||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | |||
@@ -501,22 +499,22 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
while (count > 0) { | |||
uint32_t thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count; | |||
retval = target_write_buffer(target, fm3_info->write_algorithm->address, 8, | |||
retval = target_write_buffer(target, write_algorithm->address, 8, | |||
fm3_flash_write_code); | |||
if (retval != ERROR_OK) | |||
break; | |||
/* Patching 'local variable address' for different RAM addresses */ | |||
if (fm3_info->write_algorithm->address != 0x1FFF8008) { | |||
if (write_algorithm->address != 0x1FFF8008) { | |||
/* Algorithm: u32DummyRead: */ | |||
retval = target_write_u32(target, (fm3_info->write_algorithm->address) | |||
+ sizeof(fm3_flash_write_code) - 8, (fm3_info->write_algorithm->address) - 8); | |||
retval = target_write_u32(target, (write_algorithm->address) | |||
+ sizeof(fm3_flash_write_code) - 8, (write_algorithm->address) - 8); | |||
if (retval != ERROR_OK) | |||
break; | |||
/* Algorithm: u32FlashResult: */ | |||
retval = target_write_u32(target, (fm3_info->write_algorithm->address) | |||
+ sizeof(fm3_flash_write_code) - 4, (fm3_info->write_algorithm->address) - 4); | |||
retval = target_write_u32(target, (write_algorithm->address) | |||
+ sizeof(fm3_flash_write_code) - 4, (write_algorithm->address) - 4); | |||
if (retval != ERROR_OK) | |||
break; | |||
} | |||
@@ -532,7 +530,7 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
buf_set_u32(reg_params[4].value, 0, 32, u32FlashSeqAddress2); | |||
retval = target_run_algorithm(target, 0, NULL, 6, reg_params, | |||
fm3_info->write_algorithm->address, 0, 1000, &armv7m_info); | |||
write_algorithm->address, 0, 1000, &armv7m_info); | |||
if (retval != ERROR_OK) { | |||
LOG_ERROR("Error executing fm3 Flash programming algorithm"); | |||
retval = ERROR_FLASH_OPERATION_FAILED; | |||
@@ -552,7 +550,7 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
} | |||
target_free_working_area(target, source); | |||
target_free_working_area(target, fm3_info->write_algorithm); | |||
target_free_working_area(target, write_algorithm); | |||
destroy_reg_param(®_params[0]); | |||
destroy_reg_param(®_params[1]); | |||
@@ -96,7 +96,6 @@ | |||
#define MX_1_2 1 /* PIC32mx1xx/2xx */ | |||
struct pic32mx_flash_bank { | |||
struct working_area *write_algorithm; | |||
int probed; | |||
int dev_type; /* Default 0. 1 for Pic32MX1XX/2XX variant */ | |||
}; | |||
@@ -193,7 +192,6 @@ FLASH_BANK_COMMAND_HANDLER(pic32mx_flash_bank_command) | |||
pic32mx_info = malloc(sizeof(struct pic32mx_flash_bank)); | |||
bank->driver_priv = pic32mx_info; | |||
pic32mx_info->write_algorithm = NULL; | |||
pic32mx_info->probed = 0; | |||
pic32mx_info->dev_type = 0; | |||
@@ -417,6 +415,7 @@ static int pic32mx_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
{ | |||
struct target *target = bank->target; | |||
uint32_t buffer_size = 16384; | |||
struct working_area *write_algorithm; | |||
struct working_area *source; | |||
uint32_t address = bank->base + offset; | |||
struct reg_param reg_params[3]; | |||
@@ -428,7 +427,7 @@ static int pic32mx_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
/* flash write code */ | |||
if (target_alloc_working_area(target, sizeof(pic32mx_flash_write_code), | |||
&pic32mx_info->write_algorithm) != ERROR_OK) { | |||
&write_algorithm) != ERROR_OK) { | |||
LOG_WARNING("no working area available, can't do block memory writes"); | |||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | |||
}; | |||
@@ -450,7 +449,7 @@ static int pic32mx_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
row_size = 512; | |||
} | |||
retval = target_write_buffer(target, pic32mx_info->write_algorithm->address, | |||
retval = target_write_buffer(target, write_algorithm->address, | |||
sizeof(pic32mx_flash_write_code), (uint8_t *)pic32mx_flash_write_code); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
@@ -459,10 +458,9 @@ static int pic32mx_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) { | |||
buffer_size /= 2; | |||
if (buffer_size <= 256) { | |||
/* if we already allocated the writing code, but failed to get a | |||
/* we already allocated the writing code, but failed to get a | |||
* buffer, free the algorithm */ | |||
if (pic32mx_info->write_algorithm) | |||
target_free_working_area(target, pic32mx_info->write_algorithm); | |||
target_free_working_area(target, write_algorithm); | |||
LOG_WARNING("no large enough working area available, can't do block memory writes"); | |||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | |||
@@ -518,7 +516,7 @@ static int pic32mx_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
buf_set_u32(reg_params[2].value, 0, 32, thisrun_count + row_offset / 4); | |||
retval = target_run_algorithm(target, 0, NULL, 3, reg_params, | |||
pic32mx_info->write_algorithm->address, | |||
write_algorithm->address, | |||
0, 10000, &mips32_info); | |||
if (retval != ERROR_OK) { | |||
LOG_ERROR("error executing pic32mx flash write algorithm"); | |||
@@ -550,7 +548,7 @@ static int pic32mx_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
} | |||
target_free_working_area(target, source); | |||
target_free_working_area(target, pic32mx_info->write_algorithm); | |||
target_free_working_area(target, write_algorithm); | |||
destroy_reg_param(®_params[0]); | |||
destroy_reg_param(®_params[1]); | |||
@@ -110,7 +110,6 @@ struct stm32x_options { | |||
struct stm32x_flash_bank { | |||
struct stm32x_options option_bytes; | |||
struct working_area *write_algorithm; | |||
int ppage_size; | |||
int probed; | |||
@@ -134,7 +133,6 @@ FLASH_BANK_COMMAND_HANDLER(stm32x_flash_bank_command) | |||
stm32x_info = malloc(sizeof(struct stm32x_flash_bank)); | |||
bank->driver_priv = stm32x_info; | |||
stm32x_info->write_algorithm = NULL; | |||
stm32x_info->probed = 0; | |||
stm32x_info->has_dual_banks = false; | |||
stm32x_info->register_base = FLASH_REG_BASE_B0; | |||
@@ -603,6 +601,7 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
struct stm32x_flash_bank *stm32x_info = bank->driver_priv; | |||
struct target *target = bank->target; | |||
uint32_t buffer_size = 16384; | |||
struct working_area *write_algorithm; | |||
struct working_area *source; | |||
uint32_t address = bank->base + offset; | |||
struct reg_param reg_params[5]; | |||
@@ -652,12 +651,12 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
/* flash write code */ | |||
if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code), | |||
&stm32x_info->write_algorithm) != ERROR_OK) { | |||
&write_algorithm) != ERROR_OK) { | |||
LOG_WARNING("no working area available, can't do block memory writes"); | |||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | |||
}; | |||
retval = target_write_buffer(target, stm32x_info->write_algorithm->address, | |||
retval = target_write_buffer(target, write_algorithm->address, | |||
sizeof(stm32x_flash_write_code), (uint8_t *)stm32x_flash_write_code); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
@@ -667,10 +666,9 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
buffer_size /= 2; | |||
buffer_size &= ~3UL; /* Make sure it's 4 byte aligned */ | |||
if (buffer_size <= 256) { | |||
/* if we already allocated the writing code, but failed to get a | |||
/* we already allocated the writing code, but failed to get a | |||
* buffer, free the algorithm */ | |||
if (stm32x_info->write_algorithm) | |||
target_free_working_area(target, stm32x_info->write_algorithm); | |||
target_free_working_area(target, write_algorithm); | |||
LOG_WARNING("no large enough working area available, can't do block memory writes"); | |||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | |||
@@ -696,7 +694,7 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
0, NULL, | |||
5, reg_params, | |||
source->address, source->size, | |||
stm32x_info->write_algorithm->address, 0, | |||
write_algorithm->address, 0, | |||
&armv7m_info); | |||
if (retval == ERROR_FLASH_OPERATION_FAILED) { | |||
@@ -717,7 +715,7 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
} | |||
target_free_working_area(target, source); | |||
target_free_working_area(target, stm32x_info->write_algorithm); | |||
target_free_working_area(target, write_algorithm); | |||
destroy_reg_param(®_params[0]); | |||
destroy_reg_param(®_params[1]); | |||
@@ -150,7 +150,6 @@ | |||
#define KEY2 0xCDEF89AB | |||
struct stm32x_flash_bank { | |||
struct working_area *write_algorithm; | |||
int probed; | |||
}; | |||
@@ -167,7 +166,6 @@ FLASH_BANK_COMMAND_HANDLER(stm32x_flash_bank_command) | |||
stm32x_info = malloc(sizeof(struct stm32x_flash_bank)); | |||
bank->driver_priv = stm32x_info; | |||
stm32x_info->write_algorithm = NULL; | |||
stm32x_info->probed = 0; | |||
return ERROR_OK; | |||
@@ -316,9 +314,9 @@ static int stm32x_protect(struct flash_bank *bank, int set, int first, int last) | |||
static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
uint32_t offset, uint32_t count) | |||
{ | |||
struct stm32x_flash_bank *stm32x_info = bank->driver_priv; | |||
struct target *target = bank->target; | |||
uint32_t buffer_size = 16384; | |||
struct working_area *write_algorithm; | |||
struct working_area *source; | |||
uint32_t address = bank->base + offset; | |||
struct reg_param reg_params[5]; | |||
@@ -366,12 +364,12 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
}; | |||
if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code), | |||
&stm32x_info->write_algorithm) != ERROR_OK) { | |||
&write_algorithm) != ERROR_OK) { | |||
LOG_WARNING("no working area available, can't do block memory writes"); | |||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | |||
}; | |||
retval = target_write_buffer(target, stm32x_info->write_algorithm->address, | |||
retval = target_write_buffer(target, write_algorithm->address, | |||
sizeof(stm32x_flash_write_code), | |||
(uint8_t *)stm32x_flash_write_code); | |||
if (retval != ERROR_OK) | |||
@@ -381,10 +379,9 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) { | |||
buffer_size /= 2; | |||
if (buffer_size <= 256) { | |||
/* if we already allocated the writing code, but failed to get a | |||
/* we already allocated the writing code, but failed to get a | |||
* buffer, free the algorithm */ | |||
if (stm32x_info->write_algorithm) | |||
target_free_working_area(target, stm32x_info->write_algorithm); | |||
target_free_working_area(target, write_algorithm); | |||
LOG_WARNING("no large enough working area available, can't do block memory writes"); | |||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | |||
@@ -410,7 +407,7 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
0, NULL, | |||
5, reg_params, | |||
source->address, source->size, | |||
stm32x_info->write_algorithm->address, 0, | |||
write_algorithm->address, 0, | |||
&armv7m_info); | |||
if (retval == ERROR_FLASH_OPERATION_FAILED) { | |||
@@ -430,7 +427,7 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
} | |||
target_free_working_area(target, source); | |||
target_free_working_area(target, stm32x_info->write_algorithm); | |||
target_free_working_area(target, write_algorithm); | |||
destroy_reg_param(®_params[0]); | |||
destroy_reg_param(®_params[1]); | |||
@@ -119,7 +119,6 @@ static int stm32lx_erase_sector(struct flash_bank *bank, int sector); | |||
static int stm32lx_wait_until_bsy_clear(struct flash_bank *bank); | |||
struct stm32lx_flash_bank { | |||
struct working_area *write_algorithm; | |||
int probed; | |||
}; | |||
@@ -142,7 +141,6 @@ FLASH_BANK_COMMAND_HANDLER(stm32lx_flash_bank_command) | |||
bank->driver_priv = stm32lx_info; | |||
stm32lx_info->write_algorithm = NULL; | |||
stm32lx_info->probed = 0; | |||
return ERROR_OK; | |||
@@ -213,9 +211,9 @@ static int stm32lx_protect(struct flash_bank *bank, int set, int first, | |||
static int stm32lx_write_half_pages(struct flash_bank *bank, uint8_t *buffer, | |||
uint32_t offset, uint32_t count) | |||
{ | |||
struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv; | |||
struct target *target = bank->target; | |||
uint32_t buffer_size = 4096 * 4; | |||
struct working_area *write_algorithm; | |||
struct working_area *source; | |||
uint32_t address = bank->base + offset; | |||
@@ -264,17 +262,17 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, uint8_t *buffer, | |||
/* Add bytes to make 4byte aligned */ | |||
reg32 += (4 - (reg32 % 4)) % 4; | |||
retval = target_alloc_working_area(target, reg32, | |||
&stm32lx_info->write_algorithm); | |||
&write_algorithm); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
/* Write the flashing code */ | |||
retval = target_write_buffer(target, | |||
stm32lx_info->write_algorithm->address, | |||
write_algorithm->address, | |||
sizeof(stm32lx_flash_write_code), | |||
(uint8_t *)stm32lx_flash_write_code); | |||
if (retval != ERROR_OK) { | |||
target_free_working_area(target, stm32lx_info->write_algorithm); | |||
target_free_working_area(target, write_algorithm); | |||
return retval; | |||
} | |||
@@ -287,10 +285,9 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, uint8_t *buffer, | |||
buffer_size /= 2; | |||
if (buffer_size <= 256) { | |||
/* if we already allocated the writing code, but failed to get a | |||
/* we already allocated the writing code, but failed to get a | |||
* buffer, free the algorithm */ | |||
if (stm32lx_info->write_algorithm) | |||
target_free_working_area(target, stm32lx_info->write_algorithm); | |||
target_free_working_area(target, write_algorithm); | |||
LOG_WARNING("no large enough working area available, can't do block memory writes"); | |||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | |||
@@ -310,7 +307,7 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, uint8_t *buffer, | |||
retval = stm32lx_enable_write_half_page(bank); | |||
if (retval != ERROR_OK) { | |||
target_free_working_area(target, source); | |||
target_free_working_area(target, stm32lx_info->write_algorithm); | |||
target_free_working_area(target, write_algorithm); | |||
destroy_reg_param(®_params[0]); | |||
destroy_reg_param(®_params[1]); | |||
@@ -341,7 +338,7 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, uint8_t *buffer, | |||
/* 5: Execute the bunch of code */ | |||
retval = target_run_algorithm(target, 0, NULL, sizeof(reg_params) | |||
/ sizeof(*reg_params), reg_params, | |||
stm32lx_info->write_algorithm->address, 0, 20000, &armv7m_info); | |||
write_algorithm->address, 0, 20000, &armv7m_info); | |||
if (retval != ERROR_OK) | |||
break; | |||
@@ -359,7 +356,7 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, uint8_t *buffer, | |||
retval = stm32lx_lock_program_memory(bank); | |||
target_free_working_area(target, source); | |||
target_free_working_area(target, stm32lx_info->write_algorithm); | |||
target_free_working_area(target, write_algorithm); | |||
destroy_reg_param(®_params[0]); | |||
destroy_reg_param(®_params[1]); | |||
@@ -90,7 +90,6 @@ struct str7x_flash_bank { | |||
uint32_t disable_bit; | |||
uint32_t busy_bits; | |||
uint32_t register_base; | |||
struct working_area *write_algorithm; | |||
}; | |||
struct str7x_mem_layout { | |||
@@ -227,8 +226,6 @@ FLASH_BANK_COMMAND_HANDLER(str7x_flash_bank_command) | |||
str7x_build_block_list(bank); | |||
str7x_info->write_algorithm = NULL; | |||
return ERROR_OK; | |||
} | |||
@@ -451,6 +448,7 @@ static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
struct str7x_flash_bank *str7x_info = bank->driver_priv; | |||
struct target *target = bank->target; | |||
uint32_t buffer_size = 32768; | |||
struct working_area *write_algorithm; | |||
struct working_area *source; | |||
uint32_t address = bank->base + offset; | |||
struct reg_param reg_params[6]; | |||
@@ -487,11 +485,11 @@ static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
/* flash write code */ | |||
if (target_alloc_working_area_try(target, sizeof(str7x_flash_write_code), | |||
&str7x_info->write_algorithm) != ERROR_OK) { | |||
&write_algorithm) != ERROR_OK) { | |||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | |||
}; | |||
target_write_buffer(target, str7x_info->write_algorithm->address, | |||
target_write_buffer(target, write_algorithm->address, | |||
sizeof(str7x_flash_write_code), | |||
(uint8_t *)str7x_flash_write_code); | |||
@@ -499,10 +497,9 @@ static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) { | |||
buffer_size /= 2; | |||
if (buffer_size <= 256) { | |||
/* if we already allocated the writing code, but failed to get a | |||
/* we already allocated the writing code, but failed to get a | |||
* buffer, free the algorithm */ | |||
if (str7x_info->write_algorithm) | |||
target_free_working_area(target, str7x_info->write_algorithm); | |||
target_free_working_area(target, write_algorithm); | |||
LOG_WARNING("no large enough working area available, can't do block memory writes"); | |||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | |||
@@ -532,8 +529,8 @@ static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
buf_set_u32(reg_params[5].value, 0, 32, str7x_info->busy_bits); | |||
retval = target_run_algorithm(target, 0, NULL, 6, reg_params, | |||
str7x_info->write_algorithm->address, | |||
str7x_info->write_algorithm->address + (sizeof(str7x_flash_write_code) - 4), | |||
write_algorithm->address, | |||
write_algorithm->address + (sizeof(str7x_flash_write_code) - 4), | |||
10000, &arm_algo); | |||
if (retval != ERROR_OK) | |||
break; | |||
@@ -549,7 +546,7 @@ static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, | |||
} | |||
target_free_working_area(target, source); | |||
target_free_working_area(target, str7x_info->write_algorithm); | |||
target_free_working_area(target, write_algorithm); | |||
destroy_reg_param(®_params[0]); | |||
destroy_reg_param(®_params[1]); | |||
@@ -46,7 +46,6 @@ struct str9x_flash_bank { | |||
uint32_t *sector_bits; | |||
int variant; | |||
int bank1; | |||
struct working_area *write_algorithm; | |||
}; | |||
enum str9x_status_codes { | |||
@@ -158,8 +157,6 @@ FLASH_BANK_COMMAND_HANDLER(str9x_flash_bank_command) | |||
str9x_build_block_list(bank); | |||
str9x_info->write_algorithm = NULL; | |||
return ERROR_OK; | |||
} | |||
@@ -352,9 +349,9 @@ static int str9x_protect(struct flash_bank *bank, | |||
static int str9x_write_block(struct flash_bank *bank, | |||
uint8_t *buffer, uint32_t offset, uint32_t count) | |||
{ | |||
struct str9x_flash_bank *str9x_info = bank->driver_priv; | |||
struct target *target = bank->target; | |||
uint32_t buffer_size = 32768; | |||
struct working_area *write_algorithm; | |||
struct working_area *source; | |||
uint32_t address = bank->base + offset; | |||
struct reg_param reg_params[4]; | |||
@@ -390,12 +387,12 @@ static int str9x_write_block(struct flash_bank *bank, | |||
/* flash write code */ | |||
if (target_alloc_working_area(target, sizeof(str9x_flash_write_code), | |||
&str9x_info->write_algorithm) != ERROR_OK) { | |||
&write_algorithm) != ERROR_OK) { | |||
LOG_WARNING("no working area available, can't do block memory writes"); | |||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | |||
}; | |||
target_write_buffer(target, str9x_info->write_algorithm->address, | |||
target_write_buffer(target, write_algorithm->address, | |||
sizeof(str9x_flash_write_code), | |||
(uint8_t *)str9x_flash_write_code); | |||
@@ -403,10 +400,9 @@ static int str9x_write_block(struct flash_bank *bank, | |||
while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) { | |||
buffer_size /= 2; | |||
if (buffer_size <= 256) { | |||
/* if we already allocated the writing code, but failed to get a | |||
/* we already allocated the writing code, but failed to get a | |||
* buffer, free the algorithm */ | |||
if (str9x_info->write_algorithm) | |||
target_free_working_area(target, str9x_info->write_algorithm); | |||
target_free_working_area(target, write_algorithm); | |||
LOG_WARNING("no large enough working area available, can't do block memory writes"); | |||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | |||
@@ -432,7 +428,7 @@ static int str9x_write_block(struct flash_bank *bank, | |||
buf_set_u32(reg_params[2].value, 0, 32, thisrun_count); | |||
retval = target_run_algorithm(target, 0, NULL, 4, reg_params, | |||
str9x_info->write_algorithm->address, | |||
write_algorithm->address, | |||
0, 10000, &arm_algo); | |||
if (retval != ERROR_OK) { | |||
LOG_ERROR("error executing str9x flash write algorithm"); | |||
@@ -451,7 +447,7 @@ static int str9x_write_block(struct flash_bank *bank, | |||
} | |||
target_free_working_area(target, source); | |||
target_free_working_area(target, str9x_info->write_algorithm); | |||
target_free_working_area(target, write_algorithm); | |||
destroy_reg_param(®_params[0]); | |||
destroy_reg_param(®_params[1]); | |||