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@@ -3506,6 +3506,85 @@ ldrsb_literal: |
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return ERROR_INVALID_ARGUMENTS; |
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} |
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static int t2ev_load_halfword(uint32_t opcode, uint32_t address, |
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arm_instruction_t *instruction, char *cp) |
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{ |
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int rn = (opcode >> 16) & 0xf; |
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int rt = (opcode >> 12) & 0xf; |
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int op2 = (opcode >> 6) & 0x3f; |
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char *sign = (opcode & (1 < 24)) ? "S" : ""; |
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unsigned immed; |
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if (rt == 0xf) { |
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sprintf(cp, "HINT (UNALLOCATED)"); |
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return ERROR_OK; |
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} |
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if ((opcode & (1 << 23)) == 0) { |
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if (rn == 0xf) { |
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ldrh_literal: |
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if (rt == 0xf) |
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return ERROR_INVALID_ARGUMENTS; |
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immed = opcode & 0xfff; |
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address = thumb_alignpc4(address); |
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if (opcode & (1 << 23)) |
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address += immed; |
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else |
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address -= immed; |
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sprintf(cp, "LDR%sH\tr%d, %#8.8" PRIx32, |
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sign, rt, address); |
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return ERROR_OK; |
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} |
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if (rt == 0xf) |
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return ERROR_INVALID_ARGUMENTS; |
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if (op2 == 0) { |
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int rm = opcode & 0xf; |
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immed = (opcode >> 4) & 0x3; |
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sprintf(cp, "LDR%sH.W\tr%d, [r%d, r%d, LSL #%d]", |
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sign, rt, rn, rm, immed); |
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return ERROR_OK; |
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} |
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if ((op2 & 0x3c) == 0x38) { |
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immed = (opcode >> 4) & 0x3; |
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sprintf(cp, "LDR%sHT\tr%d, [r%d, #%d]\t; %#2.2x", |
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sign, rt, rn, immed, immed); |
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return ERROR_OK; |
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} |
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if ((op2 & 0x3c) == 0x30 || (op2 & 0x24) == 0x24) { |
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char *p1 = "]", *p2 = ""; |
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immed = opcode & 0xff; |
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if (opcode & 0x200) |
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immed = -immed; |
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/* two indexed modes will write back rn */ |
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if (opcode & 0x100) { |
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if (opcode & 0x400) /* pre-indexed */ |
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p2 = "]!"; |
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else { /* post-indexed */ |
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p1 = "]"; |
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p2 = ""; |
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} |
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} |
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sprintf(cp, "LDR%sH\tr%d, [r%d%s, #%d%s\t; %#8.8x", |
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sign, rt, rn, p1, immed, p2, immed); |
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return ERROR_OK; |
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} |
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} else { |
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if (rn == 0xf) |
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goto ldrh_literal; |
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if (rt != 0x0f) { |
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immed = opcode & 0xfff; |
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sprintf(cp, "LDR%sH.W\tr%d, [r%d, #%d]\t; %#6.6x", |
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sign, rt, rn, immed, immed); |
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return ERROR_OK; |
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} |
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} |
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return ERROR_INVALID_ARGUMENTS; |
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} |
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/* |
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* REVISIT for Thumb2 instructions, instruction->type and friends aren't |
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* always set. That means eventual arm_simulate_step() support for Thumb2 |
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@@ -3573,6 +3652,10 @@ int thumb2_opcode(target_t *target, uint32_t address, arm_instruction_t *instruc |
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else if ((opcode & 0x1f700000) == 0x18500000) |
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retval = t2ev_load_word(opcode, address, instruction, cp); |
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/* ARMv7-M: A5.3.8 Load halfword, unallocated memory hints */ |
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else if ((opcode & 0x1e700000) == 0x18e00000) |
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retval = t2ev_load_halfword(opcode, address, instruction, cp); |
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/* ARMv7-M: A5.3.9 Load byte, memory hints */ |
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else if ((opcode & 0x1e700000) == 0x18100000) |
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retval = t2ev_load_byte_hints(opcode, address, instruction, cp); |
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@@ -3585,7 +3668,9 @@ int thumb2_opcode(target_t *target, uint32_t address, arm_instruction_t *instruc |
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else if ((opcode & 0x1e000000) == 0x0a000000) |
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retval = t2ev_data_shift(opcode, address, instruction, cp); |
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/* ARMv7-M: A5.3.12 Data processing (register) */ |
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/* ARMv7-M: A5.3.12 Data processing (register) |
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* and A5.3.13 Miscellaneous operations |
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*/ |
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else if ((opcode & 0x1f000000) == 0x1a000000) |
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retval = t2ev_data_reg(opcode, address, instruction, cp); |
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