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@@ -772,7 +772,7 @@ static int cortex_a8_resume(struct target *target, int current, |
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static int cortex_a8_debug_entry(struct target *target) |
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{ |
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int i; |
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uint32_t regfile[16], pc, cpsr, dscr; |
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uint32_t regfile[16], wfar, cpsr, dscr; |
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int retval = ERROR_OK; |
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struct working_area *regfile_working_area = NULL; |
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struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target); |
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@@ -811,9 +811,12 @@ static int cortex_a8_debug_entry(struct target *target) |
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case 2: /* asynch watchpoint */ |
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case 10: /* precise watchpoint */ |
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target->debug_reason = DBG_REASON_WATCHPOINT; |
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/* REVISIT could collect WFAR later, to see just |
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* which instruction triggered the watchpoint. |
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*/ |
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/* save address of faulting instruction */ |
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retval = mem_ap_read_atomic_u32(swjdp, |
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armv7a->debug_base + CPUDBG_WFAR, |
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&wfar); |
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arm_dpm_report_wfar(&armv7a->dpm, wfar); |
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break; |
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default: |
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target->debug_reason = DBG_REASON_UNDEFINED; |
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@@ -841,7 +844,6 @@ static int cortex_a8_debug_entry(struct target *target) |
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/* read Current PSR */ |
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cortex_a8_dap_read_coreregister_u32(target, &cpsr, 16); |
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pc = regfile[15]; |
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dap_ap_select(swjdp, swjdp_debugap); |
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LOG_DEBUG("cpsr: %8.8" PRIx32, cpsr); |
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@@ -892,10 +894,7 @@ static int cortex_a8_debug_entry(struct target *target) |
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if (armv7a->post_debug_entry) |
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armv7a->post_debug_entry(target); |
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return retval; |
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} |
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static void cortex_a8_post_debug_entry(struct target *target) |
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@@ -1527,20 +1526,7 @@ static int cortex_a8_examine_first(struct target *target) |
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cortex_a8->brp_list[i].BRPn = i; |
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} |
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/* Setup Watchpoint Register Pairs */ |
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cortex_a8->wrp_num = ((didr >> 28) & 0x0F) + 1; |
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cortex_a8->wrp_num_available = cortex_a8->wrp_num; |
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cortex_a8->wrp_list = calloc(cortex_a8->wrp_num, sizeof(struct cortex_a8_wrp)); |
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for (i = 0; i < cortex_a8->wrp_num; i++) |
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{ |
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cortex_a8->wrp_list[i].used = 0; |
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cortex_a8->wrp_list[i].type = 0; |
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cortex_a8->wrp_list[i].value = 0; |
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cortex_a8->wrp_list[i].control = 0; |
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cortex_a8->wrp_list[i].WRPn = i; |
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} |
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LOG_DEBUG("Configured %i hw breakpoint pairs and %i hw watchpoint pairs", |
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cortex_a8->brp_num , cortex_a8->wrp_num); |
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LOG_DEBUG("Configured %i hw breakpoints", cortex_a8->brp_num); |
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target_set_examined(target); |
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return ERROR_OK; |
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