- cleanup target config scripts

git-svn-id: svn://svn.berlios.de/openocd/trunk@1202 b42882b7-edfa-0310-969c-e2dbd0fdcd60

src/target/target/lm3s3748.cfg

@@ -20,7 +20,7 @@ if { [info exists CPUTAPID ] } {
    set _CPUTAPID $CPUTAPID
 } else {
   # force an error till we get a good number
-   set _CPUTAPID 0xffffffff
+   set _CPUTAPID 0x3ba00477
 }
 
 # RCLK 

src/target/target/lm3s6965.cfg

@@ -18,7 +18,7 @@ if { [info exists CPUTAPID ] } {
    set _CPUTAPID $CPUTAPID
 } else {
   # force an error till we get a good number
-   set _CPUTAPID 0xffffffff
+   set _CPUTAPID 0x3ba00477
 }
 
 # jtag speed
@@ -33,7 +33,6 @@ reset_config srst_only
 #jtag scan chain
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0xf -expected-id $_CPUTAPID
 
-
 # the luminary variant causes a software reset rather than asserting SRST
 # this stops the debug registers from being cleared
 # this will be fixed in later revisions of silicon

src/target/target/lm3s811.cfg

@@ -17,7 +17,7 @@ if { [info exists CPUTAPID ] } {
    set _CPUTAPID $CPUTAPID
 } else {
   # force an error till we get a good number
-   set _CPUTAPID 0xffffffff
+   set _CPUTAPID 0x3ba00477
 }
 
 # jtag speed

src/target/target/stm32.cfg

@@ -12,7 +12,6 @@ if { [info exists ENDIAN] } {
    set  _ENDIAN little
 }
 
-
 # jtag speed
 jtag_khz 500
 
@@ -51,7 +50,6 @@ target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNA
 
 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0
 
-
 flash bank stm32x 0 0 0 0 0
 
 # For more information about the configuration files, take a look at:

src/target/target/stm32stick.cfg

@@ -35,7 +35,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xf -irmask 0xe -expected-id $_CP
 # The boundery scan register, leave the "expected-id" undefined.
 jtag newtap $_CHIPNAME bs  -irlen 5 -ircapture 0x1 -irmask 0x1e 
 
-# What is this? It must be some extra chip on the stm32stick...
+# configure str750 connected to jtag chain
 jtag newtap $_CHIPNAME unknown -irlen 4 -ircapture 0x1 -irmask 0x0f
 
 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]

src/target/target/str710.cfg

@@ -16,10 +16,9 @@ if { [info exists ENDIAN] } {
 if { [info exists CPUTAPID] } {	
    set  _CPUTAPID $CPUTAPID    
 } else {	 
-   set  _CPUTAPID 0xffffffff
+   set  _CPUTAPID 0x3f0f0f0f
 }
 
-
 #use combined on interfaces or targets that can't set TRST/SRST separately
 reset_config trst_and_srst srst_pulls_trst
 

src/target/target/str730.cfg

@@ -17,10 +17,9 @@ if { [info exists ENDIAN] } {
 if { [info exists CPUTAPID] } {	
    set  _CPUTAPID $CPUTAPID    
 } else {	 
-   set  _CPUTAPID 0xffffffff
+   set  _CPUTAPID 0x3f0f0f0f
 }
 
-
 #use combined on interfaces or targets that can't set TRST/SRST separately
 #reset_config trst_and_srst srst_pulls_trst
 reset_config trst_and_srst srst_pulls_trst

src/target/target/str750.cfg

@@ -15,13 +15,12 @@ if { [info exists ENDIAN] } {
 if { [info exists CPUTAPID] } {	
    set  _CPUTAPID $CPUTAPID    
 } else {	 
-   set  _CPUTAPID 0xffffffff
+   set  _CPUTAPID 0x4f1f0041
 }
 
 # jtag speed
 jtag_khz 10
 
-
 #use combined on interfaces or targets that can't set TRST/SRST separately
 #reset_config trst_and_srst srst_pulls_trst
 reset_config trst_and_srst srst_pulls_trst

src/target/target/str910-eval.cfg

@@ -18,8 +18,7 @@ if { [info exists ENDIAN] } {
 if { [info exists FLASHTAPID ] } {
    set _FLASHTAPID $FLASHTAPID
 } else {
-  # Fixme with a correct number!
-   set _FLASHTAPID 0xFFFFFFFF
+   set _FLASHTAPID 0x04570041
 }
 jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0xfe -expected-id $_FLASHTAPID
 
@@ -34,7 +33,7 @@ jtag newtap $_CHIPNAME cpu   -irlen 4 -ircapture 0x1 -irmask 0xe -expected-id $_
 if { [info exists BSTAPID ] } {
    set _BSTAPID $BSTAPID
 } else {
-   set _BSTAPID 0xFFFFFFFF
+   set _BSTAPID 0x1457f041
 }
 jtag newtap $_CHIPNAME bs    -irlen 5 -ircapture 0x1 -irmask 0x1e -expected-id $_BSTAPID
 
@@ -42,9 +41,21 @@ set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
 target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e
 $_TARGETNAME configure -work-area-phys 0x50000000 -work-area-virt 0x50000000 -work-area-size 16384 -work-area-backup 1
 
-flash bank str9xpec 0x00000000 0x00080000 0 0 0
+$_TARGETNAME configure -event reset-init {
+	# We can increase speed now that we know the target is halted.
+	#jtag_rclk 3000
+	
+	# -- Enable 96K RAM
+	# PFQBC enabled / DTCM & AHB wait-states disabled
+	mww 0x5C002034 0x0191 
 
-str9xpec enable_turbo 0
-str9xpec options_read 0
-str9xpec options_cmap 0 bank 1
-str9xpec options_write 0
+	str9x flash_config 0 4 2 0 0x80000
+	flash protect 0 0 7 off
+}
+
+#flash bank str9x <base> <size> 0 0 <target#> <variant>
+flash bank str9x 0x00000000 0x00080000 0 0 0
+flash bank str9x 0x00080000 0x00008000 0 0 0
+
+# For more information about the configuration files, take a look at:
+# openocd.texi

src/target/target/str912.cfg

@@ -12,8 +12,6 @@ if { [info exists ENDIAN] } {
    set  _ENDIAN little
 }
 
-
-
 # jtag speed. We need to stick to 16kHz until we've finished reset.
 jtag_rclk 16
 
@@ -26,7 +24,7 @@ reset_config trst_and_srst
 if { [info exists FLASHTAPID ] } {
    set _FLASHTAPID $FLASHTAPID
 } else {
-   set _FLASHTAPID 0x25966041
+   set _FLASHTAPID 0x04570041
 }
 jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0xfe -expected-id $_FLASHTAPID
 

src/target/target/str9comstick.cfg

@@ -14,7 +14,7 @@ reset_config trst_and_srst
 if { [info exists FLASHTAPID ] } {
    set _FLASHTAPID $FLASHTAPID
 } else {
-   set _FLASHTAPID 0xFFFFFFFF
+   set _FLASHTAPID 0x04570041
 }
 jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID
 
@@ -29,7 +29,7 @@ jtag newtap $_CHIPNAME cpu   -irlen 4 -ircapture 0xf -irmask 0xe -expected-id $_
 if { [info exists BSTAPID ] } {
    set _BSTAPID $BSTAPID
 } else {
-   set _BSTAPID 0xFFFFFFFF
+   set _BSTAPID 0x1457f041
 }
 jtag newtap $_CHIPNAME bs    -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID