Browse Source

Rick Altherr <kc8apf@kc8apf.net> - In cortex_m3_resume if debug_execution is non-zero, the PRIMASK and xSPR are modified. The problem is that while the register value is changed, it isn't marked valid or dirty.

git-svn-id: svn://svn.berlios.de/openocd/trunk@1119 b42882b7-edfa-0310-969c-e2dbd0fdcd60
tags/v0.1.0
oharboe 15 years ago
parent
commit
95c3a1758f
1 changed files with 5 additions and 0 deletions
  1. +5
    -0
      src/target/cortex_m3.c

+ 5
- 0
src/target/cortex_m3.c View File

@@ -567,9 +567,14 @@ int cortex_m3_resume(struct target_s *target, int current, u32 address, int hand
* This is probably the same inssue as Cortex-M3 Errata 377493:
* C_MASKINTS in parallel with disabled interrupts can cause local faults to not be taken. */
buf_set_u32(armv7m->core_cache->reg_list[ARMV7M_PRIMASK].value, 0, 32, 1);
armv7m->core_cache->reg_list[ARMV7M_PRIMASK].dirty = 1;
armv7m->core_cache->reg_list[ARMV7M_PRIMASK].valid = 1;

/* Make sure we are in Thumb mode */
buf_set_u32(armv7m->core_cache->reg_list[ARMV7M_xPSR].value, 0, 32,
buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_xPSR].value, 0, 32) | (1<<24));
armv7m->core_cache->reg_list[ARMV7M_xPSR].dirty = 1;
armv7m->core_cache->reg_list[ARMV7M_xPSR].valid = 1;
}

/* current = 1: continue on current pc, otherwise continue at <address> */


Loading…
Cancel
Save