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@@ -135,6 +135,7 @@ int armv7m_restore_context(struct target *target) |
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{ |
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int i; |
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struct armv7m_common *armv7m = target_to_armv7m(target); |
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struct reg_cache *cache = armv7m->arm.core_cache; |
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LOG_DEBUG(" "); |
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@@ -142,8 +143,10 @@ int armv7m_restore_context(struct target *target) |
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armv7m->pre_restore_context(target); |
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for (i = ARMV7M_NUM_REGS - 1; i >= 0; i--) { |
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if (armv7m->arm.core_cache->reg_list[i].dirty) |
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armv7m->write_core_reg(target, i); |
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if (cache->reg_list[i].dirty) { |
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uint32_t value = buf_get_u32(cache->reg_list[i].value, 0, 32); |
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armv7m->arm.write_core_reg(target, &cache->reg_list[i], i, ARM_MODE_ANY, value); |
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} |
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} |
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return ERROR_OK; |
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@@ -175,12 +178,12 @@ static int armv7m_get_core_reg(struct reg *reg) |
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int retval; |
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struct arm_reg *armv7m_reg = reg->arch_info; |
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struct target *target = armv7m_reg->target; |
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struct armv7m_common *armv7m = target_to_armv7m(target); |
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struct arm *arm = target_to_arm(target); |
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if (target->state != TARGET_HALTED) |
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return ERROR_TARGET_NOT_HALTED; |
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retval = armv7m->read_core_reg(target, armv7m_reg->num); |
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retval = arm->read_core_reg(target, reg, armv7m_reg->num, arm->core_mode); |
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return retval; |
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} |
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@@ -201,20 +204,20 @@ static int armv7m_set_core_reg(struct reg *reg, uint8_t *buf) |
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return ERROR_OK; |
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} |
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static int armv7m_read_core_reg(struct target *target, unsigned num) |
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static int armv7m_read_core_reg(struct target *target, struct reg *r, |
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int num, enum arm_mode mode) |
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{ |
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uint32_t reg_value; |
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int retval; |
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struct arm_reg *armv7m_core_reg; |
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struct armv7m_common *armv7m = target_to_armv7m(target); |
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if (num >= ARMV7M_NUM_REGS) |
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return ERROR_COMMAND_SYNTAX_ERROR; |
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assert(num < (int)armv7m->arm.core_cache->num_regs); |
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armv7m_core_reg = armv7m->arm.core_cache->reg_list[num].arch_info; |
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retval = armv7m->load_core_reg_u32(target, |
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armv7m_core_reg->num, |
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®_value); |
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armv7m_core_reg->num, ®_value); |
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buf_set_u32(armv7m->arm.core_cache->reg_list[num].value, 0, 32, reg_value); |
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armv7m->arm.core_cache->reg_list[num].valid = 1; |
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armv7m->arm.core_cache->reg_list[num].dirty = 0; |
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@@ -222,15 +225,15 @@ static int armv7m_read_core_reg(struct target *target, unsigned num) |
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return retval; |
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} |
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static int armv7m_write_core_reg(struct target *target, unsigned num) |
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static int armv7m_write_core_reg(struct target *target, struct reg *r, |
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int num, enum arm_mode mode, uint32_t value) |
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{ |
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int retval; |
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uint32_t reg_value; |
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struct arm_reg *armv7m_core_reg; |
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struct armv7m_common *armv7m = target_to_armv7m(target); |
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if (num >= ARMV7M_NUM_REGS) |
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return ERROR_COMMAND_SYNTAX_ERROR; |
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assert(num < (int)armv7m->arm.core_cache->num_regs); |
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reg_value = buf_get_u32(armv7m->arm.core_cache->reg_list[num].value, 0, 32); |
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armv7m_core_reg = armv7m->arm.core_cache->reg_list[num].arch_info; |
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@@ -242,6 +245,7 @@ static int armv7m_write_core_reg(struct target *target, unsigned num) |
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armv7m->arm.core_cache->reg_list[num].dirty = armv7m->arm.core_cache->reg_list[num].valid; |
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return ERROR_JTAG_DEVICE_ERROR; |
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} |
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LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num, reg_value); |
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armv7m->arm.core_cache->reg_list[num].valid = 1; |
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armv7m->arm.core_cache->reg_list[num].dirty = 0; |
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@@ -344,8 +348,7 @@ int armv7m_start_algorithm(struct target *target, |
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/* refresh core register cache |
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* Not needed if core register cache is always consistent with target process state */ |
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for (unsigned i = 0; i < ARMV7M_NUM_REGS; i++) { |
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if (!armv7m->arm.core_cache->reg_list[i].valid) |
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armv7m->read_core_reg(target, i); |
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armv7m_algorithm_info->context[i] = buf_get_u32( |
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armv7m->arm.core_cache->reg_list[i].value, |
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0, |
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@@ -578,11 +581,8 @@ int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m) |
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arm->arch_info = armv7m; |
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arm->setup_semihosting = armv7m_setup_semihosting; |
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/* FIXME remove v7m-specific r/w core_reg functions; |
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* use the generic ARM core support.. |
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*/ |
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armv7m->read_core_reg = armv7m_read_core_reg; |
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armv7m->write_core_reg = armv7m_write_core_reg; |
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arm->read_core_reg = armv7m_read_core_reg; |
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arm->write_core_reg = armv7m_write_core_reg; |
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return arm_init_arch_info(target, arm); |
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} |
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