@@ -9,13 +9,9 @@
# source [find target/...cfg]
# Define basic characteristics for the CPU. The AT91SAM9G20 processor is a subtle variant of
# the AT91SAM9260 and shares the same tap ID as it.
source [find target/at91sam9g20.cfg]
set _CHIPNAME at91sam9g20
set _FLASHTYPE nandflash_cs3
set _ENDIAN little
set _CPUTAPID 0x0792603f
# Set reset type. Note that the AT91SAM9G20-EK board has the trst signal disconnected. Therefore
# the reset needs to be configured for "srst_only". If for some reason, a zero-ohm jumper is
@@ -23,31 +19,9 @@ set _CPUTAPID 0x0792603f
# Set up the CPU and generate a new jtag tap for AT91SAM9G20.
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
# Use caution changing the delays listed below. These seem to be
# affected by the board and type of JTAG adapter. A value of 200 ms seems
# to work reliably for the configuration listed in the file header above.
# Set fallback clock to 1/6 of worst-case clock speed (which would be the 32.768 kHz slow clock).
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
# Establish internal SRAM memory work areas that are important to pre-bootstrap loaders, etc. The
# AT91SAM9G20 has two SRAM areas, one starting at 0x00200000 and the other starting at 0x00300000.
# Both areas are 16 kB long.
#$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 1
$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x4000 -work-area-backup 1
# If you don't want to execute built-in boot rom code (and there are good reasons at times not to do that) in the
# AT91SAM9 family, the microcontroller is a lump on a log without initialization. Because this family has
# some powerful features, we want to have a special function that handles "reset init". To do this we declare