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at91sam9: factorise cpu support

all at91sam9 are nearly the same except sram and soc name

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
tags/v0.5.0-rc1
Jean-Christophe PLAGNIOL-VILLARD 13 years ago
committed by Øyvind Harboe
parent
commit
e941805713
6 changed files with 70 additions and 127 deletions
  1. +1
    -27
      tcl/board/at91sam9g20-ek.cfg
  2. +39
    -0
      tcl/target/at91sam9.cfg
  3. +3
    -33
      tcl/target/at91sam9260.cfg
  4. +2
    -34
      tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
  5. +22
    -0
      tcl/target/at91sam9g20.cfg
  6. +3
    -33
      tcl/target/at91sam9rl.cfg

+ 1
- 27
tcl/board/at91sam9g20-ek.cfg View File

@@ -9,13 +9,9 @@
#
# source [find target/...cfg]

# Define basic characteristics for the CPU. The AT91SAM9G20 processor is a subtle variant of
# the AT91SAM9260 and shares the same tap ID as it.
source [find target/at91sam9g20.cfg]

set _CHIPNAME at91sam9g20
set _FLASHTYPE nandflash_cs3
set _ENDIAN little
set _CPUTAPID 0x0792603f

# Set reset type. Note that the AT91SAM9G20-EK board has the trst signal disconnected. Therefore
# the reset needs to be configured for "srst_only". If for some reason, a zero-ohm jumper is
@@ -23,31 +19,9 @@ set _CPUTAPID 0x0792603f

reset_config srst_only

# Set up the CPU and generate a new jtag tap for AT91SAM9G20.

jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID

# Use caution changing the delays listed below. These seem to be
# affected by the board and type of JTAG adapter. A value of 200 ms seems
# to work reliably for the configuration listed in the file header above.

adapter_nsrst_delay 200
jtag_ntrst_delay 200

# Set fallback clock to 1/6 of worst-case clock speed (which would be the 32.768 kHz slow clock).

jtag_rclk 5

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME

# Establish internal SRAM memory work areas that are important to pre-bootstrap loaders, etc. The
# AT91SAM9G20 has two SRAM areas, one starting at 0x00200000 and the other starting at 0x00300000.
# Both areas are 16 kB long.

#$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 1
$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x4000 -work-area-backup 1

# If you don't want to execute built-in boot rom code (and there are good reasons at times not to do that) in the
# AT91SAM9 family, the microcontroller is a lump on a log without initialization. Because this family has
# some powerful features, we want to have a special function that handles "reset init". To do this we declare


+ 39
- 0
tcl/target/at91sam9.cfg View File

@@ -0,0 +1,39 @@
######################################
# Target: Atmel AT91SAM9
######################################

if { [info exists AT91_CHIPNAME] } {
set _CHIPNAME $AT91_CHIPNAME
} else {
error "you must specify a chip name"
}

if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}

if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
# force an error till we get a good number
set _CPUTAPID 0x0792603f
}

reset_config trst_and_srst separate trst_push_pull srst_open_drain

#
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID

adapter_nsrst_delay 300
jtag_ntrst_delay 200

jtag_rclk 3

######################
# Target configuration
######################

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs

+ 3
- 33
tcl/target/at91sam9260.cfg View File

@@ -3,42 +3,12 @@
######################################

if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
set AT91_CHIPNAME $CHIPNAME
} else {
set _CHIPNAME at91sam9260
set AT91_CHIPNAME at91sam9260
}

if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}

if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
# force an error till we get a good number
set _CPUTAPID 0x0792603f
}

reset_config trst_and_srst separate trst_push_pull srst_open_drain

#
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID

adapter_nsrst_delay 300
jtag_ntrst_delay 200

jtag_rclk 3

######################
# Target configuration
######################

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
source [find target/at91sam9.cfg]

# Internal sram1 memory
$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1



+ 2
- 34
tcl/target/at91sam9260_ext_RAM_ext_flash.cfg View File

@@ -1,48 +1,16 @@
jtag_rclk 4

######################################
# Target: Atmel AT91SAM9260
######################################

if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME at91sam9260
}

if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}

if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
# force an error till we get a good number
set _CPUTAPID 0x0792603f
}
source [find target/at91sam9261.cfg]

reset_config trst_and_srst

jtag_rclk 4

adapter_nsrst_delay 200
jtag_ntrst_delay 200


jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID


######################
# Target configuration
######################

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs

# Internal sram1 memory
$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1

scan_chain
$_TARGETNAME configure -event reset-start {
# at reset chip runs at 32khz


+ 22
- 0
tcl/target/at91sam9g20.cfg View File

@@ -0,0 +1,22 @@
######################################
# Target: Atmel AT91SAM9G20
######################################

if { [info exists CHIPNAME] } {
set AT91_CHIPNAME $CHIPNAME
} else {
set AT91_CHIPNAME at91sam9g20
}

source [find target/at91sam9.cfg]

# Set fallback clock to 1/6 of worst-case clock speed (which would be the 32.768 kHz slow clock).

jtag_rclk 5

# Establish internal SRAM memory work areas that are important to pre-bootstrap loaders, etc. The
# AT91SAM9G20 has two SRAM areas, one starting at 0x00200000 and the other starting at 0x00300000.
# Both areas are 16 kB long.

#$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 1
$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x4000 -work-area-backup 1

+ 3
- 33
tcl/target/at91sam9rl.cfg View File

@@ -3,42 +3,12 @@
######################################

if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
set AT91_CHIPNAME $CHIPNAME
} else {
set _CHIPNAME at91sam9rl
set AT91_CHIPNAME at91sam9rl
}

if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}

if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
# force an error till we get a good number
set _CPUTAPID 0x0792603f
}

reset_config trst_and_srst separate trst_push_pull srst_open_drain

#
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID

adapter_nsrst_delay 300
jtag_ntrst_delay 200

jtag_rclk 3

######################
# Target configuration
######################

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
source [find target/at91sam9.cfg]

# Internal sram1 memory
$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x10000 -work-area-backup 1



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