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@@ -1,15 +1,9 @@ |
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Some outstanding issues w.r.t. non-ARM32 targets |
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================================================ |
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This file describes outstanding issues w.r.t. |
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non-ARM32 targets. |
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/** @page targetnotarm OpenOCD Non-ARM Targets |
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Ideas & patches welcome! |
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This page describes outstanding issues w.r.t. non-ARM targets. |
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@section targetnotarmflash Flash drivers |
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Flash drivers |
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------------- |
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The flash drivers contain ARM32 code that is used |
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to execute code on the target. |
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@@ -26,23 +20,22 @@ compile the target flash drivers. Perhaps |
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using automake? |
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eCos has CFI driver that could probably be compiled |
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for all targets. The trick is to figure out a |
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way to make the compiled flash drivers work |
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on all target memory maps + sort out all the |
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little details |
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32 vs. 64 bit |
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------------- |
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@section targetnotarm32v64 32 vs. 64 bit |
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Currently OpenOCD only supports 32 bit targets. |
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Adding 64 bit support would be nice but there |
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hasn't been any call for it in the openocd development |
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mailing list |
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target support |
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-------------- |
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@section targetnotarmsupport Target Support |
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target.h is relatively CPU agnostic and |
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the intention is to move in the direction of less |
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instruction set specific. |
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@@ -53,8 +46,8 @@ An example is FPGA programming support via JTAG, |
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but also flash chips can be programmed directly |
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using JTAG. |
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non-JTAG physical layer |
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----------------------- |
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@section targetnotarmphy non-JTAG physical layer |
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JTAG is not the only physical protocol used to talk to |
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CPUs. |
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@@ -64,13 +57,15 @@ The actual physical layer is a relatively modest part |
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of the total OpenOCD system. |
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PowerPC |
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------- |
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@section targetnotarmppc PowerPC |
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there exists open source implementations of powerpc |
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target manipulation, but there hasn't been a lot |
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of activity in the mailing list. |
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MIPS |
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---- |
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@section targetnotarmmips MIPS |
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Currently OpenOCD has a MIPS target defined. This is the |
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first non-ARM example of a CPU target |
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first non-ARM example of a CPU target |
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*/ |