You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
 
 
 
 
 
 

91 lines
4.2 KiB

  1. # stm32h754i-disco and stm32h750b-dk dual quad qspi.
  2. # QUADSPI initialization
  3. # qpi: 4-line mode
  4. proc qspi_init { qpi } {
  5. global a
  6. mmw 0x580244E0 0x000007FF 0 ;# RCC_AHB4ENR |= GPIOAEN-GPIOKEN (enable clocks)
  7. mmw 0x580244D4 0x00004000 0 ;# RCC_AHB3ENR |= QSPIEN (enable clock)
  8. sleep 1 ;# Wait for clock startup
  9. # PG06: BK1_NCS, PF10: CLK, PF06: BK1_IO3, PF07: BK1_IO2, PF09: BK1_IO1, PD11: BK1_IO0,
  10. # PG14: BK2_IO3, PG09: BK2_IO2, PH03: BK2_IO1, PH02: BK2_IO0
  11. # PD11:AF09:V, PF10:AF09:V, PF09:AF10:V, PF07:AF09:V, PF06:AF09:V, PG14:AF09:H
  12. # PG09:AF09:V, PG06:AF10:H, PH03:AF09:V, PH02:AF09:V
  13. # Port D: PD11:AF09:V
  14. mmw 0x58020C00 0x00800000 0x00400000 ;# MODER
  15. mmw 0x58020C08 0x00C00000 0x00000000 ;# OSPEEDR
  16. mmw 0x58020C24 0x00009000 0x00006000 ;# AFRH
  17. # Port F: PF10:AF09:V, PF09:AF10:V, PF07:AF09:V, PF06:AF09:V
  18. mmw 0x58021400 0x0028A000 0x00145000 ;# MODER
  19. mmw 0x58021408 0x003CF000 0x00000000 ;# OSPEEDR
  20. mmw 0x58021420 0x99000000 0x66000000 ;# AFRL
  21. mmw 0x58021424 0x000009A0 0x00000650 ;# AFRH
  22. # Port G: PG14:AF09:H, PG09:AF09:V, PG06:AF10:H
  23. mmw 0x58021800 0x20082000 0x10041000 ;# MODER
  24. mmw 0x58021808 0x200C2000 0x10001000 ;# OSPEEDR
  25. mmw 0x58021820 0x0A000000 0x05000000 ;# AFRL
  26. mmw 0x58021824 0x09000090 0x06000060 ;# AFRH
  27. # Port H: PH03:AF09:V, PH02:AF09:V
  28. mmw 0x58021C00 0x000000A0 0x00000050 ;# MODER
  29. mmw 0x58021C08 0x000000F0 0x00000000 ;# OSPEEDR
  30. mmw 0x58021C20 0x00009900 0x00006600 ;# AFRL
  31. # correct FSIZE is 0x1A, however, this causes trouble when
  32. # reading the last bytes at end of bank in *memory mapped* mode
  33. # for dual flash mode 2 * mt25ql512
  34. mww 0x52005000 0x05500058 ;# QUADSPI_CR: PRESCALER=5, APMS=1, FTHRES=0, FSEL=0, DFM=1, SSHIFT=1, TCEN=1
  35. mww 0x52005004 0x001A0200 ;# QUADSPI_DCR: FSIZE=0x1A, CSHT=0x02, CKMODE=0
  36. mww 0x52005030 0x00001000 ;# QUADSPI_LPTR: deactivate CS after 4096 clocks when FIFO is full
  37. mww 0x52005014 0x0D002503 ;# QUADSPI_CCR: FMODE=0x3, DMODE=0x1, DCYC=0x0, ADSIZE=0x3, ADMODE=0x1, IMODE=0x1
  38. mmw 0x52005000 0x00000001 0 ;# QUADSPI_CR: EN=1
  39. # Exit QPI mode
  40. mmw 0x52005000 0x00000002 0 ;# QUADSPI_CR: ABORT=1
  41. mww 0x52005014 0x000003F5 ;# QUADSPI_CCR: FMODE=0x0, DMODE=0x0, DCYC=0x0, ADSIZE=0x0, ADMODE=0x0, IMODE=0x3, INSTR=Exit QPI
  42. sleep 1
  43. if { $qpi == 1 } {
  44. # Write Enable
  45. mmw 0x52005000 0x00000002 0 ;# QUADSPI_CR: ABORT=1
  46. mww 0x52005014 0x00000106 ;# QUADSPI_CCR: FMODE=0x0, DMODE=0x0, DCYC=0x0, ADSIZE=0x0, ADMODE=0x0, IMODE=0x1, INSTR=Write Enable
  47. sleep 1
  48. # Configure dummy clocks via volatile configuration register
  49. mmw 0x52005000 0x00000002 0 ;# QUADSPI_CR: ABORT=1
  50. mww 0x52005010 0x00000001 ;# QUADSPI_DLR: 2 data bytes
  51. mww 0x52005014 0x01000181 ;# QUADSPI_CCR: FMODE=0x0, DMODE=0x1, DCYC=0x0, ADSIZE=0x0, ADMODE=0x0, IMODE=0x1, INSTR=Write Volatile Conf. Reg.
  52. mwh 0x52005020 0xABAB ;# QUADSPI_DR: 0xAB 0xAB for 10 dummy clocks
  53. sleep 1
  54. # Write Enable
  55. mmw 0x52005000 0x00000002 0 ;# QUADSPI_CR: ABORT=1
  56. mww 0x52005014 0x00000106 ;# QUADSPI_CCR: FMODE=0x0, DMODE=0x0, DCYC=0x0, ADSIZE=0x0, ADMODE=0x0, IMODE=0x1, INSTR=Write Enable
  57. sleep 1
  58. # Enable QPI mode via enhanced volatile configuration register
  59. mmw 0x52005000 0x00000002 0 ;# QUADSPI_CR: ABORT=1
  60. mww 0x52005010 0x00000001 ;# QUADSPI_DLR: 2 data bytes
  61. mww 0x52005014 0x01000161 ;# QUADSPI_CCR: FMODE=0x0, DMODE=0x1, DCYC=0x0, ADSIZE=0x0, ADMODE=0x0, IMODE=0x1, INSTR=Write Enhanced Conf. Reg.
  62. mwh 0x52005020 0x3F3F ;# QUADSPI_DR: 0x3F 0x3F to enable QPI and DPI mode
  63. sleep 1
  64. # Enter QPI mode
  65. mmw 0x52005000 0x00000002 0 ;# QUADSPI_CR: ABORT=1
  66. mww 0x52005014 0x00000135 ;# QUADSPI_CCR: FMODE=0x0, DMODE=0x0, DCYC=0x0, ADSIZE=0x0, ADMODE=0x0, IMODE=0x1, INSTR=Enter QPI
  67. sleep 1
  68. # memory-mapped fast read mode with 4-byte addresses and 10 dummy cycles (for read only)
  69. mmw 0x52005000 0x00000002 0 ;# QUADSPI_CR: ABORT=1
  70. mww 0x52005014 0x0F283FEC ;# QUADSPI_CCR: FMODE=0x3, DMODE=0x3, DCYC=0xA, ADSIZE=0x3, ADMODE=0x3, IMODE=0x3, INSTR=Fast READ
  71. } else {
  72. # memory-mapped read mode with 4-byte addresses
  73. mmw 0x52005000 0x00000002 0 ;# QUADSPI_CR: ABORT=1
  74. mww 0x52005014 0x0D003513 ;# QUADSPI_CCR: FMODE=0x3, DMODE=0x1, DCYC=0x0, ADSIZE=0x3, ADMODE=0x1, IMODE=0x1, INSTR=READ
  75. }
  76. }