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  1. /*
  2. * Copyright (C) 2009 by Marvell Semiconductors, Inc.
  3. * Written by Nicolas Pitre <nico at marvell.com>
  4. *
  5. * Copyright (C) 2009 by David Brownell
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the
  19. * Free Software Foundation, Inc.,
  20. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  21. */
  22. #ifdef HAVE_CONFIG_H
  23. #include "config.h"
  24. #endif
  25. #include "core.h"
  26. #include "arm_io.h"
  27. #include <helper/binarybuffer.h>
  28. #include <target/arm.h>
  29. #include <target/armv7m.h>
  30. #include <target/algorithm.h>
  31. /**
  32. * Copies code to a working area. This will allocate room for the code plus the
  33. * additional amount requested if the working area pointer is null.
  34. *
  35. * @param target Pointer to the target to copy code to
  36. * @param code Pointer to the code area to be copied
  37. * @param code_size Size of the code being copied
  38. * @param additional Size of the additional area to be allocated in addition to
  39. * code
  40. * @param area Pointer to a pointer to a working area to copy code to
  41. * @return Success or failure of the operation
  42. */
  43. static int arm_code_to_working_area(struct target *target,
  44. const uint32_t *code, unsigned code_size,
  45. unsigned additional, struct working_area **area)
  46. {
  47. uint8_t code_buf[code_size];
  48. unsigned i;
  49. int retval;
  50. unsigned size = code_size + additional;
  51. /* REVISIT this assumes size doesn't ever change.
  52. * That's usually correct; but there are boards with
  53. * both large and small page chips, where it won't be...
  54. */
  55. /* make sure we have a working area */
  56. if (NULL == *area) {
  57. retval = target_alloc_working_area(target, size, area);
  58. if (retval != ERROR_OK) {
  59. LOG_DEBUG("%s: no %d byte buffer", __func__, (int) size);
  60. return ERROR_NAND_NO_BUFFER;
  61. }
  62. }
  63. /* buffer code in target endianness */
  64. for (i = 0; i < code_size / 4; i++)
  65. target_buffer_set_u32(target, code_buf + i * 4, code[i]);
  66. /* copy code to work area */
  67. retval = target_write_memory(target, (*area)->address,
  68. 4, code_size / 4, code_buf);
  69. return retval;
  70. }
  71. /**
  72. * ARM-specific bulk write from buffer to address of 8-bit wide NAND.
  73. * For now this supports ARMv4,ARMv5 and ARMv7-M cores.
  74. *
  75. * Enhancements to target_run_algorithm() could enable:
  76. * - ARMv6 and ARMv7 cores in ARM mode
  77. *
  78. * Different code fragments could handle:
  79. * - 16-bit wide data (needs different setup)
  80. *
  81. * @param nand Pointer to the arm_nand_data struct that defines the I/O
  82. * @param data Pointer to the data to be copied to flash
  83. * @param size Size of the data being copied
  84. * @return Success or failure of the operation
  85. */
  86. int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
  87. {
  88. struct target *target = nand->target;
  89. struct arm_algorithm armv4_5_algo;
  90. struct armv7m_algorithm armv7m_algo;
  91. void *arm_algo;
  92. struct arm *arm = target->arch_info;
  93. struct reg_param reg_params[3];
  94. uint32_t target_buf;
  95. uint32_t exit_var = 0;
  96. int retval;
  97. /* Inputs:
  98. * r0 NAND data address (byte wide)
  99. * r1 buffer address
  100. * r2 buffer length
  101. */
  102. static const uint32_t code_armv4_5[] = {
  103. 0xe4d13001, /* s: ldrb r3, [r1], #1 */
  104. 0xe5c03000, /* strb r3, [r0] */
  105. 0xe2522001, /* subs r2, r2, #1 */
  106. 0x1afffffb, /* bne s */
  107. /* exit: ARMv4 needs hardware breakpoint */
  108. 0xe1200070, /* e: bkpt #0 */
  109. };
  110. /* Inputs:
  111. * r0 NAND data address (byte wide)
  112. * r1 buffer address
  113. * r2 buffer length
  114. *
  115. * see contrib/loaders/flash/armv7m_io.s for src
  116. */
  117. static const uint32_t code_armv7m[] = {
  118. 0x3b01f811,
  119. 0x3a017003,
  120. 0xaffaf47f,
  121. 0xbf00be00,
  122. };
  123. int target_code_size = 0;
  124. const uint32_t *target_code_src = NULL;
  125. /* set up algorithm */
  126. if (is_armv7m(target_to_armv7m(target))) { /* armv7m target */
  127. armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
  128. armv7m_algo.core_mode = ARM_MODE_THREAD;
  129. arm_algo = &armv7m_algo;
  130. target_code_size = sizeof(code_armv7m);
  131. target_code_src = code_armv7m;
  132. } else {
  133. armv4_5_algo.common_magic = ARM_COMMON_MAGIC;
  134. armv4_5_algo.core_mode = ARM_MODE_SVC;
  135. armv4_5_algo.core_state = ARM_STATE_ARM;
  136. arm_algo = &armv4_5_algo;
  137. target_code_size = sizeof(code_armv4_5);
  138. target_code_src = code_armv4_5;
  139. }
  140. if (nand->op != ARM_NAND_WRITE || !nand->copy_area) {
  141. retval = arm_code_to_working_area(target, target_code_src, target_code_size,
  142. nand->chunk_size, &nand->copy_area);
  143. if (retval != ERROR_OK)
  144. return retval;
  145. }
  146. nand->op = ARM_NAND_WRITE;
  147. /* copy data to work area */
  148. target_buf = nand->copy_area->address + target_code_size;
  149. retval = target_write_buffer(target, target_buf, size, data);
  150. if (retval != ERROR_OK)
  151. return retval;
  152. /* set up parameters */
  153. init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);
  154. init_reg_param(&reg_params[1], "r1", 32, PARAM_IN);
  155. init_reg_param(&reg_params[2], "r2", 32, PARAM_IN);
  156. buf_set_u32(reg_params[0].value, 0, 32, nand->data);
  157. buf_set_u32(reg_params[1].value, 0, 32, target_buf);
  158. buf_set_u32(reg_params[2].value, 0, 32, size);
  159. /* armv4 must exit using a hardware breakpoint */
  160. if (arm->is_armv4)
  161. exit_var = nand->copy_area->address + target_code_size - 4;
  162. /* use alg to write data from work area to NAND chip */
  163. retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
  164. nand->copy_area->address, exit_var, 1000, arm_algo);
  165. if (retval != ERROR_OK)
  166. LOG_ERROR("error executing hosted NAND write");
  167. destroy_reg_param(&reg_params[0]);
  168. destroy_reg_param(&reg_params[1]);
  169. destroy_reg_param(&reg_params[2]);
  170. return retval;
  171. }
  172. /**
  173. * Uses an on-chip algorithm for an ARM device to read from a NAND device and
  174. * store the data into the host machine's memory.
  175. *
  176. * @param nand Pointer to the arm_nand_data struct that defines the I/O
  177. * @param data Pointer to the data buffer to store the read data
  178. * @param size Amount of data to be stored to the buffer.
  179. * @return Success or failure of the operation
  180. */
  181. int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
  182. {
  183. struct target *target = nand->target;
  184. struct arm_algorithm armv4_5_algo;
  185. struct armv7m_algorithm armv7m_algo;
  186. void *arm_algo;
  187. struct arm *arm = target->arch_info;
  188. struct reg_param reg_params[3];
  189. uint32_t target_buf;
  190. uint32_t exit_var = 0;
  191. int retval;
  192. /* Inputs:
  193. * r0 buffer address
  194. * r1 NAND data address (byte wide)
  195. * r2 buffer length
  196. */
  197. static const uint32_t code_armv4_5[] = {
  198. 0xe5d13000, /* s: ldrb r3, [r1] */
  199. 0xe4c03001, /* strb r3, [r0], #1 */
  200. 0xe2522001, /* subs r2, r2, #1 */
  201. 0x1afffffb, /* bne s */
  202. /* exit: ARMv4 needs hardware breakpoint */
  203. 0xe1200070, /* e: bkpt #0 */
  204. };
  205. /* Inputs:
  206. * r0 buffer address
  207. * r1 NAND data address (byte wide)
  208. * r2 buffer length
  209. *
  210. * see contrib/loaders/flash/armv7m_io.s for src
  211. */
  212. static const uint32_t code_armv7m[] = {
  213. 0xf800780b,
  214. 0x3a013b01,
  215. 0xaffaf47f,
  216. 0xbf00be00,
  217. };
  218. int target_code_size = 0;
  219. const uint32_t *target_code_src = NULL;
  220. /* set up algorithm */
  221. if (is_armv7m(target_to_armv7m(target))) { /* armv7m target */
  222. armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
  223. armv7m_algo.core_mode = ARM_MODE_THREAD;
  224. arm_algo = &armv7m_algo;
  225. target_code_size = sizeof(code_armv7m);
  226. target_code_src = code_armv7m;
  227. } else {
  228. armv4_5_algo.common_magic = ARM_COMMON_MAGIC;
  229. armv4_5_algo.core_mode = ARM_MODE_SVC;
  230. armv4_5_algo.core_state = ARM_STATE_ARM;
  231. arm_algo = &armv4_5_algo;
  232. target_code_size = sizeof(code_armv4_5);
  233. target_code_src = code_armv4_5;
  234. }
  235. /* create the copy area if not yet available */
  236. if (nand->op != ARM_NAND_READ || !nand->copy_area) {
  237. retval = arm_code_to_working_area(target, target_code_src, target_code_size,
  238. nand->chunk_size, &nand->copy_area);
  239. if (retval != ERROR_OK)
  240. return retval;
  241. }
  242. nand->op = ARM_NAND_READ;
  243. target_buf = nand->copy_area->address + target_code_size;
  244. /* set up parameters */
  245. init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);
  246. init_reg_param(&reg_params[1], "r1", 32, PARAM_IN);
  247. init_reg_param(&reg_params[2], "r2", 32, PARAM_IN);
  248. buf_set_u32(reg_params[0].value, 0, 32, target_buf);
  249. buf_set_u32(reg_params[1].value, 0, 32, nand->data);
  250. buf_set_u32(reg_params[2].value, 0, 32, size);
  251. /* armv4 must exit using a hardware breakpoint */
  252. if (arm->is_armv4)
  253. exit_var = nand->copy_area->address + target_code_size - 4;
  254. /* use alg to write data from NAND chip to work area */
  255. retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
  256. nand->copy_area->address, exit_var, 1000, arm_algo);
  257. if (retval != ERROR_OK)
  258. LOG_ERROR("error executing hosted NAND read");
  259. destroy_reg_param(&reg_params[0]);
  260. destroy_reg_param(&reg_params[1]);
  261. destroy_reg_param(&reg_params[2]);
  262. /* read from work area to the host's memory */
  263. retval = target_read_buffer(target, target_buf, size, data);
  264. return retval;
  265. }