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  1. /***************************************************************************
  2. * Copyright (C) 2007, 2008 by Ben Dooks *
  3. * ben@fluff.org *
  4. * *
  5. * This program is free software; you can redistribute it and/or modify *
  6. * it under the terms of the GNU General Public License as published by *
  7. * the Free Software Foundation; either version 2 of the License, or *
  8. * (at your option) any later version. *
  9. * *
  10. * This program is distributed in the hope that it will be useful, *
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  13. * GNU General Public License for more details. *
  14. * *
  15. * You should have received a copy of the GNU General Public License *
  16. * along with this program; if not, write to the *
  17. * Free Software Foundation, Inc., *
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
  19. ***************************************************************************/
  20. /*
  21. * S3C2410 OpenOCD NAND Flash controller support.
  22. *
  23. * Many thanks to Simtec Electronics for sponsoring this work.
  24. */
  25. #ifdef HAVE_CONFIG_H
  26. #include "config.h"
  27. #endif
  28. #include "s3c24xx.h"
  29. NAND_DEVICE_COMMAND_HANDLER(s3c2410_nand_device_command)
  30. {
  31. struct s3c24xx_nand_controller *info;
  32. CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
  33. /* fill in the address fields for the core device */
  34. info->cmd = S3C2410_NFCMD;
  35. info->addr = S3C2410_NFADDR;
  36. info->data = S3C2410_NFDATA;
  37. info->nfstat = S3C2410_NFSTAT;
  38. return ERROR_OK;
  39. }
  40. static int s3c2410_init(struct nand_device *nand)
  41. {
  42. struct target *target = nand->target;
  43. target_write_u32(target, S3C2410_NFCONF,
  44. S3C2410_NFCONF_EN | S3C2410_NFCONF_TACLS(3) |
  45. S3C2410_NFCONF_TWRPH0(5) | S3C2410_NFCONF_TWRPH1(3));
  46. return ERROR_OK;
  47. }
  48. static int s3c2410_write_data(struct nand_device *nand, uint16_t data)
  49. {
  50. struct target *target = nand->target;
  51. if (target->state != TARGET_HALTED) {
  52. LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
  53. return ERROR_NAND_OPERATION_FAILED;
  54. }
  55. target_write_u32(target, S3C2410_NFDATA, data);
  56. return ERROR_OK;
  57. }
  58. static int s3c2410_read_data(struct nand_device *nand, void *data)
  59. {
  60. struct target *target = nand->target;
  61. if (target->state != TARGET_HALTED) {
  62. LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
  63. return ERROR_NAND_OPERATION_FAILED;
  64. }
  65. target_read_u8(target, S3C2410_NFDATA, data);
  66. return ERROR_OK;
  67. }
  68. static int s3c2410_nand_ready(struct nand_device *nand, int timeout)
  69. {
  70. struct target *target = nand->target;
  71. uint8_t status;
  72. if (target->state != TARGET_HALTED) {
  73. LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
  74. return ERROR_NAND_OPERATION_FAILED;
  75. }
  76. do {
  77. target_read_u8(target, S3C2410_NFSTAT, &status);
  78. if (status & S3C2410_NFSTAT_BUSY)
  79. return 1;
  80. alive_sleep(1);
  81. } while (timeout-- > 0);
  82. return 0;
  83. }
  84. struct nand_flash_controller s3c2410_nand_controller = {
  85. .name = "s3c2410",
  86. .nand_device_command = &s3c2410_nand_device_command,
  87. .init = &s3c2410_init,
  88. .reset = &s3c24xx_reset,
  89. .command = &s3c24xx_command,
  90. .address = &s3c24xx_address,
  91. .write_data = &s3c2410_write_data,
  92. .read_data = &s3c2410_read_data,
  93. .write_page = s3c24xx_write_page,
  94. .read_page = s3c24xx_read_page,
  95. .nand_ready = &s3c2410_nand_ready,
  96. };