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  1. /***************************************************************************
  2. * Copyright (C) 2007 by Dominic Rath <Dominic.Rath@gmx.de> *
  3. * Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de> *
  4. * Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
  5. * *
  6. * Partially based on drivers/mtd/nand_ids.c from Linux. *
  7. * *
  8. * This program is free software; you can redistribute it and/or modify *
  9. * it under the terms of the GNU General Public License as published by *
  10. * the Free Software Foundation; either version 2 of the License, or *
  11. * (at your option) any later version. *
  12. * *
  13. * This program is distributed in the hope that it will be useful, *
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  16. * GNU General Public License for more details. *
  17. * *
  18. * You should have received a copy of the GNU General Public License *
  19. * along with this program; if not, write to the *
  20. * Free Software Foundation, Inc., *
  21. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
  22. ***************************************************************************/
  23. #ifdef HAVE_CONFIG_H
  24. #include "config.h"
  25. #endif
  26. #include "core.h"
  27. #include "imp.h"
  28. #include "fileio.h"
  29. #include <target/target.h>
  30. /* to be removed */
  31. extern struct nand_device *nand_devices;
  32. COMMAND_HANDLER(handle_nand_list_command)
  33. {
  34. struct nand_device *p;
  35. int i;
  36. if (!nand_devices) {
  37. command_print(CMD_CTX, "no NAND flash devices configured");
  38. return ERROR_OK;
  39. }
  40. for (p = nand_devices, i = 0; p; p = p->next, i++) {
  41. if (p->device)
  42. command_print(CMD_CTX, "#%i: %s (%s) "
  43. "pagesize: %i, buswidth: %i,\n\t"
  44. "blocksize: %i, blocks: %i",
  45. i, p->device->name, p->manufacturer->name,
  46. p->page_size, p->bus_width,
  47. p->erase_size, p->num_blocks);
  48. else
  49. command_print(CMD_CTX, "#%i: not probed", i);
  50. }
  51. return ERROR_OK;
  52. }
  53. COMMAND_HANDLER(handle_nand_info_command)
  54. {
  55. int i = 0;
  56. int j = 0;
  57. int first = -1;
  58. int last = -1;
  59. switch (CMD_ARGC) {
  60. default:
  61. return ERROR_COMMAND_SYNTAX_ERROR;
  62. case 1:
  63. first = 0;
  64. last = INT32_MAX;
  65. break;
  66. case 2:
  67. COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], i);
  68. first = last = i;
  69. i = 0;
  70. break;
  71. case 3:
  72. COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], first);
  73. COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], last);
  74. break;
  75. }
  76. struct nand_device *p;
  77. int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
  78. if (ERROR_OK != retval)
  79. return retval;
  80. if (NULL == p->device) {
  81. command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
  82. return ERROR_OK;
  83. }
  84. if (first >= p->num_blocks)
  85. first = p->num_blocks - 1;
  86. if (last >= p->num_blocks)
  87. last = p->num_blocks - 1;
  88. command_print(CMD_CTX,
  89. "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
  90. i++,
  91. p->device->name,
  92. p->manufacturer->name,
  93. p->page_size,
  94. p->bus_width,
  95. p->erase_size);
  96. for (j = first; j <= last; j++) {
  97. char *erase_state, *bad_state;
  98. if (p->blocks[j].is_erased == 0)
  99. erase_state = "not erased";
  100. else if (p->blocks[j].is_erased == 1)
  101. erase_state = "erased";
  102. else
  103. erase_state = "erase state unknown";
  104. if (p->blocks[j].is_bad == 0)
  105. bad_state = "";
  106. else if (p->blocks[j].is_bad == 1)
  107. bad_state = " (marked bad)";
  108. else
  109. bad_state = " (block condition unknown)";
  110. command_print(CMD_CTX,
  111. "\t#%i: 0x%8.8" PRIx32 " (%" PRId32 "kB) %s%s",
  112. j,
  113. p->blocks[j].offset,
  114. p->blocks[j].size / 1024,
  115. erase_state,
  116. bad_state);
  117. }
  118. return ERROR_OK;
  119. }
  120. COMMAND_HANDLER(handle_nand_probe_command)
  121. {
  122. if (CMD_ARGC != 1)
  123. return ERROR_COMMAND_SYNTAX_ERROR;
  124. struct nand_device *p;
  125. int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
  126. if (ERROR_OK != retval)
  127. return retval;
  128. retval = nand_probe(p);
  129. if (retval == ERROR_OK) {
  130. command_print(CMD_CTX, "NAND flash device '%s (%s)' found",
  131. p->device->name, p->manufacturer->name);
  132. }
  133. return retval;
  134. }
  135. COMMAND_HANDLER(handle_nand_erase_command)
  136. {
  137. if (CMD_ARGC != 1 && CMD_ARGC != 3)
  138. return ERROR_COMMAND_SYNTAX_ERROR;
  139. struct nand_device *p;
  140. int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
  141. if (ERROR_OK != retval)
  142. return retval;
  143. unsigned long offset;
  144. unsigned long length;
  145. /* erase specified part of the chip; or else everything */
  146. if (CMD_ARGC == 3) {
  147. unsigned long size = p->erase_size * p->num_blocks;
  148. COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[1], offset);
  149. if ((offset % p->erase_size) != 0 || offset >= size)
  150. return ERROR_COMMAND_SYNTAX_ERROR;
  151. COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], length);
  152. if ((length == 0) || (length % p->erase_size) != 0
  153. || (length + offset) > size)
  154. return ERROR_COMMAND_SYNTAX_ERROR;
  155. offset /= p->erase_size;
  156. length /= p->erase_size;
  157. } else {
  158. offset = 0;
  159. length = p->num_blocks;
  160. }
  161. retval = nand_erase(p, offset, offset + length - 1);
  162. if (retval == ERROR_OK) {
  163. command_print(CMD_CTX, "erased blocks %lu to %lu "
  164. "on NAND flash device #%s '%s'",
  165. offset, offset + length - 1,
  166. CMD_ARGV[0], p->device->name);
  167. }
  168. return retval;
  169. }
  170. COMMAND_HANDLER(handle_nand_check_bad_blocks_command)
  171. {
  172. int first = -1;
  173. int last = -1;
  174. if ((CMD_ARGC < 1) || (CMD_ARGC > 3) || (CMD_ARGC == 2))
  175. return ERROR_COMMAND_SYNTAX_ERROR;
  176. struct nand_device *p;
  177. int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
  178. if (ERROR_OK != retval)
  179. return retval;
  180. if (CMD_ARGC == 3) {
  181. unsigned long offset;
  182. unsigned long length;
  183. COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[1], offset);
  184. if (offset % p->erase_size)
  185. return ERROR_COMMAND_SYNTAX_ERROR;
  186. offset /= p->erase_size;
  187. COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], length);
  188. if (length % p->erase_size)
  189. return ERROR_COMMAND_SYNTAX_ERROR;
  190. length -= 1;
  191. length /= p->erase_size;
  192. first = offset;
  193. last = offset + length;
  194. }
  195. retval = nand_build_bbt(p, first, last);
  196. if (retval == ERROR_OK) {
  197. command_print(CMD_CTX, "checked NAND flash device for bad blocks, "
  198. "use \"nand info\" command to list blocks");
  199. }
  200. return retval;
  201. }
  202. COMMAND_HANDLER(handle_nand_write_command)
  203. {
  204. struct nand_device *nand = NULL;
  205. struct nand_fileio_state s;
  206. int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args,
  207. &s, &nand, FILEIO_READ, false, true);
  208. if (ERROR_OK != retval)
  209. return retval;
  210. uint32_t total_bytes = s.size;
  211. while (s.size > 0) {
  212. int bytes_read = nand_fileio_read(nand, &s);
  213. if (bytes_read <= 0) {
  214. command_print(CMD_CTX, "error while reading file");
  215. return nand_fileio_cleanup(&s);
  216. }
  217. s.size -= bytes_read;
  218. retval = nand_write_page(nand, s.address / nand->page_size,
  219. s.page, s.page_size, s.oob, s.oob_size);
  220. if (ERROR_OK != retval) {
  221. command_print(CMD_CTX, "failed writing file %s "
  222. "to NAND flash %s at offset 0x%8.8" PRIx32,
  223. CMD_ARGV[1], CMD_ARGV[0], s.address);
  224. return nand_fileio_cleanup(&s);
  225. }
  226. s.address += s.page_size;
  227. }
  228. if (nand_fileio_finish(&s) == ERROR_OK) {
  229. command_print(CMD_CTX, "wrote file %s to NAND flash %s up to "
  230. "offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
  231. CMD_ARGV[1], CMD_ARGV[0], s.address, duration_elapsed(&s.bench),
  232. duration_kbps(&s.bench, total_bytes));
  233. }
  234. return ERROR_OK;
  235. }
  236. COMMAND_HANDLER(handle_nand_verify_command)
  237. {
  238. struct nand_device *nand = NULL;
  239. struct nand_fileio_state file;
  240. int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args,
  241. &file, &nand, FILEIO_READ, false, true);
  242. if (ERROR_OK != retval)
  243. return retval;
  244. struct nand_fileio_state dev;
  245. nand_fileio_init(&dev);
  246. dev.address = file.address;
  247. dev.size = file.size;
  248. dev.oob_format = file.oob_format;
  249. retval = nand_fileio_start(CMD_CTX, nand, NULL, FILEIO_NONE, &dev);
  250. if (ERROR_OK != retval)
  251. return retval;
  252. while (file.size > 0) {
  253. retval = nand_read_page(nand, dev.address / dev.page_size,
  254. dev.page, dev.page_size, dev.oob, dev.oob_size);
  255. if (ERROR_OK != retval) {
  256. command_print(CMD_CTX, "reading NAND flash page failed");
  257. nand_fileio_cleanup(&dev);
  258. nand_fileio_cleanup(&file);
  259. return retval;
  260. }
  261. int bytes_read = nand_fileio_read(nand, &file);
  262. if (bytes_read <= 0) {
  263. command_print(CMD_CTX, "error while reading file");
  264. nand_fileio_cleanup(&dev);
  265. nand_fileio_cleanup(&file);
  266. return ERROR_FAIL;
  267. }
  268. if ((dev.page && memcmp(dev.page, file.page, dev.page_size)) ||
  269. (dev.oob && memcmp(dev.oob, file.oob, dev.oob_size))) {
  270. command_print(CMD_CTX, "NAND flash contents differ "
  271. "at 0x%8.8" PRIx32, dev.address);
  272. nand_fileio_cleanup(&dev);
  273. nand_fileio_cleanup(&file);
  274. return ERROR_FAIL;
  275. }
  276. file.size -= bytes_read;
  277. dev.address += nand->page_size;
  278. }
  279. if (nand_fileio_finish(&file) == ERROR_OK) {
  280. command_print(CMD_CTX, "verified file %s in NAND flash %s "
  281. "up to offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
  282. CMD_ARGV[1], CMD_ARGV[0], dev.address, duration_elapsed(&file.bench),
  283. duration_kbps(&file.bench, dev.size));
  284. }
  285. return nand_fileio_cleanup(&dev);
  286. }
  287. COMMAND_HANDLER(handle_nand_dump_command)
  288. {
  289. int filesize;
  290. struct nand_device *nand = NULL;
  291. struct nand_fileio_state s;
  292. int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args,
  293. &s, &nand, FILEIO_WRITE, true, false);
  294. if (ERROR_OK != retval)
  295. return retval;
  296. while (s.size > 0) {
  297. size_t size_written;
  298. retval = nand_read_page(nand, s.address / nand->page_size,
  299. s.page, s.page_size, s.oob, s.oob_size);
  300. if (ERROR_OK != retval) {
  301. command_print(CMD_CTX, "reading NAND flash page failed");
  302. nand_fileio_cleanup(&s);
  303. return retval;
  304. }
  305. if (NULL != s.page)
  306. fileio_write(&s.fileio, s.page_size, s.page, &size_written);
  307. if (NULL != s.oob)
  308. fileio_write(&s.fileio, s.oob_size, s.oob, &size_written);
  309. s.size -= nand->page_size;
  310. s.address += nand->page_size;
  311. }
  312. retval = fileio_size(&s.fileio, &filesize);
  313. if (retval != ERROR_OK)
  314. return retval;
  315. if (nand_fileio_finish(&s) == ERROR_OK) {
  316. command_print(CMD_CTX, "dumped %ld bytes in %fs (%0.3f KiB/s)",
  317. (long)filesize, duration_elapsed(&s.bench),
  318. duration_kbps(&s.bench, filesize));
  319. }
  320. return ERROR_OK;
  321. }
  322. COMMAND_HANDLER(handle_nand_raw_access_command)
  323. {
  324. if ((CMD_ARGC < 1) || (CMD_ARGC > 2))
  325. return ERROR_COMMAND_SYNTAX_ERROR;
  326. struct nand_device *p;
  327. int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
  328. if (ERROR_OK != retval)
  329. return retval;
  330. if (NULL == p->device) {
  331. command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
  332. return ERROR_OK;
  333. }
  334. if (CMD_ARGC == 2)
  335. COMMAND_PARSE_ENABLE(CMD_ARGV[1], p->use_raw);
  336. const char *msg = p->use_raw ? "enabled" : "disabled";
  337. command_print(CMD_CTX, "raw access is %s", msg);
  338. return ERROR_OK;
  339. }
  340. static const struct command_registration nand_exec_command_handlers[] = {
  341. {
  342. .name = "list",
  343. .handler = handle_nand_list_command,
  344. .mode = COMMAND_EXEC,
  345. .help = "list configured NAND flash devices",
  346. },
  347. {
  348. .name = "info",
  349. .handler = handle_nand_info_command,
  350. .mode = COMMAND_EXEC,
  351. .usage = "[banknum | first_bank_num last_bank_num]",
  352. .help = "print info about one or more NAND flash devices",
  353. },
  354. {
  355. .name = "probe",
  356. .handler = handle_nand_probe_command,
  357. .mode = COMMAND_EXEC,
  358. .usage = "bank_id",
  359. .help = "identify NAND flash device",
  360. },
  361. {
  362. .name = "check_bad_blocks",
  363. .handler = handle_nand_check_bad_blocks_command,
  364. .mode = COMMAND_EXEC,
  365. .usage = "bank_id [offset length]",
  366. .help = "check all or part of NAND flash device for bad blocks",
  367. },
  368. {
  369. .name = "erase",
  370. .handler = handle_nand_erase_command,
  371. .mode = COMMAND_EXEC,
  372. .usage = "bank_id [offset length]",
  373. .help = "erase all or subset of blocks on NAND flash device",
  374. },
  375. {
  376. .name = "dump",
  377. .handler = handle_nand_dump_command,
  378. .mode = COMMAND_EXEC,
  379. .usage = "bank_id filename offset length "
  380. "['oob_raw'|'oob_only']",
  381. .help = "dump from NAND flash device",
  382. },
  383. {
  384. .name = "verify",
  385. .handler = handle_nand_verify_command,
  386. .mode = COMMAND_EXEC,
  387. .usage = "bank_id filename offset "
  388. "['oob_raw'|'oob_only'|'oob_softecc'|'oob_softecc_kw']",
  389. .help = "verify NAND flash device",
  390. },
  391. {
  392. .name = "write",
  393. .handler = handle_nand_write_command,
  394. .mode = COMMAND_EXEC,
  395. .usage = "bank_id filename offset "
  396. "['oob_raw'|'oob_only'|'oob_softecc'|'oob_softecc_kw']",
  397. .help = "write to NAND flash device",
  398. },
  399. {
  400. .name = "raw_access",
  401. .handler = handle_nand_raw_access_command,
  402. .mode = COMMAND_EXEC,
  403. .usage = "bank_id ['enable'|'disable']",
  404. .help = "raw access to NAND flash device",
  405. },
  406. COMMAND_REGISTRATION_DONE
  407. };
  408. static int nand_init(struct command_context *cmd_ctx)
  409. {
  410. if (!nand_devices)
  411. return ERROR_OK;
  412. struct command *parent = command_find_in_context(cmd_ctx, "nand");
  413. return register_commands(cmd_ctx, parent, nand_exec_command_handlers);
  414. }
  415. COMMAND_HANDLER(handle_nand_init_command)
  416. {
  417. if (CMD_ARGC != 0)
  418. return ERROR_COMMAND_SYNTAX_ERROR;
  419. static bool nand_initialized;
  420. if (nand_initialized) {
  421. LOG_INFO("'nand init' has already been called");
  422. return ERROR_OK;
  423. }
  424. nand_initialized = true;
  425. LOG_DEBUG("Initializing NAND devices...");
  426. return nand_init(CMD_CTX);
  427. }
  428. static int nand_list_walker(struct nand_flash_controller *c, void *x)
  429. {
  430. struct command_context *cmd_ctx = (struct command_context *)x;
  431. command_print(cmd_ctx, " %s", c->name);
  432. return ERROR_OK;
  433. }
  434. COMMAND_HANDLER(handle_nand_list_drivers)
  435. {
  436. command_print(CMD_CTX, "Available NAND flash controller drivers:");
  437. return nand_driver_walk(&nand_list_walker, CMD_CTX);
  438. }
  439. static COMMAND_HELPER(create_nand_device, const char *bank_name,
  440. struct nand_flash_controller *controller)
  441. {
  442. struct nand_device *c;
  443. struct target *target;
  444. int retval;
  445. if (CMD_ARGC < 2)
  446. return ERROR_COMMAND_SYNTAX_ERROR;
  447. target = get_target(CMD_ARGV[1]);
  448. if (!target) {
  449. LOG_ERROR("invalid target %s", CMD_ARGV[1]);
  450. return ERROR_COMMAND_ARGUMENT_INVALID;
  451. }
  452. if (NULL != controller->commands) {
  453. retval = register_commands(CMD_CTX, NULL,
  454. controller->commands);
  455. if (ERROR_OK != retval)
  456. return retval;
  457. }
  458. c = malloc(sizeof(struct nand_device));
  459. if (c == NULL) {
  460. LOG_ERROR("End of memory");
  461. return ERROR_FAIL;
  462. }
  463. c->name = strdup(bank_name);
  464. c->target = target;
  465. c->controller = controller;
  466. c->controller_priv = NULL;
  467. c->manufacturer = NULL;
  468. c->device = NULL;
  469. c->bus_width = 0;
  470. c->address_cycles = 0;
  471. c->page_size = 0;
  472. c->use_raw = 0;
  473. c->next = NULL;
  474. retval = CALL_COMMAND_HANDLER(controller->nand_device_command, c);
  475. if (ERROR_OK != retval) {
  476. LOG_ERROR("'%s' driver rejected nand flash. Usage: %s",
  477. controller->name,
  478. controller->usage);
  479. free(c);
  480. return retval;
  481. }
  482. if (controller->usage == NULL)
  483. LOG_DEBUG("'%s' driver usage field missing", controller->name);
  484. nand_device_add(c);
  485. return ERROR_OK;
  486. }
  487. COMMAND_HANDLER(handle_nand_device_command)
  488. {
  489. if (CMD_ARGC < 2)
  490. return ERROR_COMMAND_SYNTAX_ERROR;
  491. /* save name and increment (for compatibility) with drivers */
  492. const char *bank_name = *CMD_ARGV++;
  493. CMD_ARGC--;
  494. const char *driver_name = CMD_ARGV[0];
  495. struct nand_flash_controller *controller;
  496. controller = nand_driver_find_by_name(CMD_ARGV[0]);
  497. if (NULL == controller) {
  498. LOG_ERROR("No valid NAND flash driver found (%s)", driver_name);
  499. return CALL_COMMAND_HANDLER(handle_nand_list_drivers);
  500. }
  501. return CALL_COMMAND_HANDLER(create_nand_device, bank_name, controller);
  502. }
  503. static const struct command_registration nand_config_command_handlers[] = {
  504. {
  505. .name = "device",
  506. .handler = &handle_nand_device_command,
  507. .mode = COMMAND_CONFIG,
  508. .help = "defines a new NAND bank",
  509. .usage = "bank_id driver target [driver_options ...]",
  510. },
  511. {
  512. .name = "drivers",
  513. .handler = &handle_nand_list_drivers,
  514. .mode = COMMAND_ANY,
  515. .help = "lists available NAND drivers",
  516. .usage = ""
  517. },
  518. {
  519. .name = "init",
  520. .mode = COMMAND_CONFIG,
  521. .handler = &handle_nand_init_command,
  522. .help = "initialize NAND devices",
  523. .usage = ""
  524. },
  525. COMMAND_REGISTRATION_DONE
  526. };
  527. static const struct command_registration nand_command_handlers[] = {
  528. {
  529. .name = "nand",
  530. .mode = COMMAND_ANY,
  531. .help = "NAND flash command group",
  532. .usage = "",
  533. .chain = nand_config_command_handlers,
  534. },
  535. COMMAND_REGISTRATION_DONE
  536. };
  537. int nand_register_commands(struct command_context *cmd_ctx)
  538. {
  539. return register_commands(cmd_ctx, NULL, nand_command_handlers);
  540. }