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  1. /***************************************************************************
  2. * Copyright (C) 2008 by Kevin McGuire *
  3. * Copyright (C) 2008 by Marcel Wijlaars *
  4. * Copyright (C) 2009 by Michael Ashton *
  5. * *
  6. * This program is free software; you can redistribute it and/or modify *
  7. * it under the terms of the GNU General Public License as published by *
  8. * the Free Software Foundation; either version 2 of the License, or *
  9. * (at your option) any later version. *
  10. * *
  11. * This program is distributed in the hope that it will be useful, *
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  14. * GNU General Public License for more details. *
  15. * *
  16. * You should have received a copy of the GNU General Public License *
  17. * along with this program; if not, write to the *
  18. * Free Software Foundation, Inc., *
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
  20. ***************************************************************************/
  21. #ifdef HAVE_CONFIG_H
  22. #include "config.h"
  23. #endif
  24. #include "imp.h"
  25. #include <helper/binarybuffer.h>
  26. #include <helper/time_support.h>
  27. #include <target/algorithm.h>
  28. #include <target/arm.h>
  29. static int aduc702x_build_sector_list(struct flash_bank *bank);
  30. static int aduc702x_check_flash_completion(struct target *target, unsigned int timeout_ms);
  31. static int aduc702x_set_write_enable(struct target *target, int enable);
  32. #define ADUC702x_FLASH 0xfffff800
  33. #define ADUC702x_FLASH_FEESTA (0*4)
  34. #define ADUC702x_FLASH_FEEMOD (1*4)
  35. #define ADUC702x_FLASH_FEECON (2*4)
  36. #define ADUC702x_FLASH_FEEDAT (3*4)
  37. #define ADUC702x_FLASH_FEEADR (4*4)
  38. #define ADUC702x_FLASH_FEESIGN (5*4)
  39. #define ADUC702x_FLASH_FEEPRO (6*4)
  40. #define ADUC702x_FLASH_FEEHIDE (7*4)
  41. /* flash bank aduc702x 0 0 0 0 <target#>
  42. * The ADC7019-28 devices all have the same flash layout */
  43. FLASH_BANK_COMMAND_HANDLER(aduc702x_flash_bank_command)
  44. {
  45. bank->base = 0x80000;
  46. bank->size = 0xF800; /* top 4k not accessible */
  47. aduc702x_build_sector_list(bank);
  48. return ERROR_OK;
  49. }
  50. static int aduc702x_build_sector_list(struct flash_bank *bank)
  51. {
  52. /* aduc7026_struct flash_bank *aduc7026_info = bank->driver_priv; */
  53. int i = 0;
  54. uint32_t offset = 0;
  55. /* sector size is 512 */
  56. bank->num_sectors = bank->size / 512;
  57. bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
  58. for (i = 0; i < bank->num_sectors; ++i) {
  59. bank->sectors[i].offset = offset;
  60. bank->sectors[i].size = 512;
  61. offset += bank->sectors[i].size;
  62. bank->sectors[i].is_erased = -1;
  63. bank->sectors[i].is_protected = 0;
  64. }
  65. return ERROR_OK;
  66. }
  67. static int aduc702x_protect_check(struct flash_bank *bank)
  68. {
  69. printf("aduc702x_protect_check not implemented yet.\n");
  70. return ERROR_OK;
  71. }
  72. static int aduc702x_erase(struct flash_bank *bank, int first, int last)
  73. {
  74. /* int res; */
  75. int x;
  76. int count;
  77. /* uint32_t v; */
  78. struct target *target = bank->target;
  79. aduc702x_set_write_enable(target, 1);
  80. /* mass erase */
  81. if (((first | last) == 0) || ((first == 0) && (last >= bank->num_sectors))) {
  82. LOG_DEBUG("performing mass erase.");
  83. target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, 0x3cff);
  84. target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, 0xffc3);
  85. target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x06);
  86. if (aduc702x_check_flash_completion(target, 3500) != ERROR_OK) {
  87. LOG_ERROR("mass erase failed");
  88. aduc702x_set_write_enable(target, 0);
  89. return ERROR_FLASH_OPERATION_FAILED;
  90. }
  91. LOG_DEBUG("mass erase successful.");
  92. return ERROR_OK;
  93. } else {
  94. unsigned long adr;
  95. count = last - first + 1;
  96. for (x = 0; x < count; ++x) {
  97. adr = bank->base + ((first + x) * 512);
  98. target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, adr);
  99. target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x05);
  100. if (aduc702x_check_flash_completion(target, 50) != ERROR_OK) {
  101. LOG_ERROR("failed to erase sector at address 0x%08lX", adr);
  102. aduc702x_set_write_enable(target, 0);
  103. return ERROR_FLASH_SECTOR_NOT_ERASED;
  104. }
  105. LOG_DEBUG("erased sector at address 0x%08lX", adr);
  106. }
  107. }
  108. aduc702x_set_write_enable(target, 0);
  109. return ERROR_OK;
  110. }
  111. static int aduc702x_protect(struct flash_bank *bank, int set, int first, int last)
  112. {
  113. printf("aduc702x_protect not implemented yet.\n");
  114. return ERROR_FLASH_OPERATION_FAILED;
  115. }
  116. /* If this fn returns ERROR_TARGET_RESOURCE_NOT_AVAILABLE, then the caller can fall
  117. * back to another mechanism that does not require onboard RAM
  118. *
  119. * Caller should not check for other return values specifically
  120. */
  121. static int aduc702x_write_block(struct flash_bank *bank,
  122. uint8_t *buffer,
  123. uint32_t offset,
  124. uint32_t count)
  125. {
  126. struct target *target = bank->target;
  127. uint32_t buffer_size = 7000;
  128. struct working_area *write_algorithm;
  129. struct working_area *source;
  130. uint32_t address = bank->base + offset;
  131. struct reg_param reg_params[6];
  132. struct arm_algorithm arm_algo;
  133. int retval = ERROR_OK;
  134. if (((count%2) != 0) || ((offset%2) != 0)) {
  135. LOG_ERROR("write block must be multiple of two bytes in offset & length");
  136. return ERROR_FAIL;
  137. }
  138. /* parameters:
  139. r0 - address of source data (absolute)
  140. r1 - number of halfwords to be copied
  141. r2 - start address in flash (offset from beginning of flash memory)
  142. r3 - exit code
  143. r4 - base address of flash controller (0xFFFFF800)
  144. registers:
  145. r5 - scratch
  146. r6 - set to 2, used to write flash command
  147. */
  148. static const uint32_t aduc702x_flash_write_code[] = {
  149. /* <_start>: */
  150. 0xe3a05008, /* mov r5, #8 ; 0x8 */
  151. 0xe5845004, /* str r5, [r4, #4] */
  152. 0xe3a06002, /* mov r6, #2 ; 0x2 */
  153. /* <next>: */
  154. 0xe1c421b0, /* strh r2, [r4, #16] */
  155. 0xe0d050b2, /* ldrh r5, [r0], #2 */
  156. 0xe1c450bc, /* strh r5, [r4, #12] */
  157. 0xe5c46008, /* strb r6, [r4, #8] */
  158. /* <wait_complete>: */
  159. 0xe1d430b0, /* ldrh r3, [r4] */
  160. 0xe3130004, /* tst r3, #4 ; 0x4 */
  161. 0x1afffffc, /* bne 1001c <wait_complete> */
  162. 0xe2822002, /* add r2, r2, #2 ; 0x2 */
  163. 0xe2511001, /* subs r1, r1, #1 ; 0x1 */
  164. 0x0a000001, /* beq 1003c <done> */
  165. 0xe3130001, /* tst r3, #1 ; 0x1 */
  166. 0x1afffff3, /* bne 1000c <next> */
  167. /* <done>: */
  168. 0xeafffffe /* b 1003c <done> */
  169. };
  170. /* flash write code */
  171. if (target_alloc_working_area(target, sizeof(aduc702x_flash_write_code),
  172. &write_algorithm) != ERROR_OK) {
  173. LOG_WARNING("no working area available, can't do block memory writes");
  174. return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
  175. }
  176. retval = target_write_buffer(target, write_algorithm->address,
  177. sizeof(aduc702x_flash_write_code), (uint8_t *)aduc702x_flash_write_code);
  178. if (retval != ERROR_OK)
  179. return retval;
  180. /* memory buffer */
  181. while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
  182. buffer_size /= 2;
  183. if (buffer_size <= 256) {
  184. /* we already allocated the writing code, but failed to get a buffer,
  185. *free the algorithm */
  186. target_free_working_area(target, write_algorithm);
  187. LOG_WARNING("no large enough working area available, can't do block memory writes");
  188. return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
  189. }
  190. }
  191. arm_algo.common_magic = ARM_COMMON_MAGIC;
  192. arm_algo.core_mode = ARM_MODE_SVC;
  193. arm_algo.core_state = ARM_STATE_ARM;
  194. init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
  195. init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
  196. init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT);
  197. init_reg_param(&reg_params[3], "r3", 32, PARAM_IN);
  198. init_reg_param(&reg_params[4], "r4", 32, PARAM_OUT);
  199. while (count > 0) {
  200. uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count;
  201. retval = target_write_buffer(target, source->address, thisrun_count, buffer);
  202. if (retval != ERROR_OK)
  203. break;
  204. buf_set_u32(reg_params[0].value, 0, 32, source->address);
  205. buf_set_u32(reg_params[1].value, 0, 32, thisrun_count/2);
  206. buf_set_u32(reg_params[2].value, 0, 32, address);
  207. buf_set_u32(reg_params[4].value, 0, 32, 0xFFFFF800);
  208. retval = target_run_algorithm(target, 0, NULL, 5,
  209. reg_params, write_algorithm->address,
  210. write_algorithm->address +
  211. sizeof(aduc702x_flash_write_code) - 4,
  212. 10000, &arm_algo);
  213. if (retval != ERROR_OK) {
  214. LOG_ERROR("error executing aduc702x flash write algorithm");
  215. break;
  216. }
  217. if ((buf_get_u32(reg_params[3].value, 0, 32) & 1) != 1) {
  218. /* FIX!!!! what does this mean??? replace w/sensible error message */
  219. LOG_ERROR("aduc702x detected error writing flash");
  220. retval = ERROR_FAIL;
  221. break;
  222. }
  223. buffer += thisrun_count;
  224. address += thisrun_count;
  225. count -= thisrun_count;
  226. }
  227. target_free_working_area(target, source);
  228. target_free_working_area(target, write_algorithm);
  229. destroy_reg_param(&reg_params[0]);
  230. destroy_reg_param(&reg_params[1]);
  231. destroy_reg_param(&reg_params[2]);
  232. destroy_reg_param(&reg_params[3]);
  233. destroy_reg_param(&reg_params[4]);
  234. return retval;
  235. }
  236. /* All-JTAG, single-access method. Very slow. Used only if there is no
  237. * working area available. */
  238. static int aduc702x_write_single(struct flash_bank *bank,
  239. uint8_t *buffer,
  240. uint32_t offset,
  241. uint32_t count)
  242. {
  243. uint32_t x;
  244. uint8_t b;
  245. struct target *target = bank->target;
  246. aduc702x_set_write_enable(target, 1);
  247. for (x = 0; x < count; x += 2) {
  248. /* FEEADR = address */
  249. target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, offset + x);
  250. /* set up data */
  251. if ((x + 1) == count) {
  252. /* last byte */
  253. target_read_u8(target, offset + x + 1, &b);
  254. } else
  255. b = buffer[x + 1];
  256. target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, buffer[x] | (b << 8));
  257. /* do single-write command */
  258. target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x02);
  259. if (aduc702x_check_flash_completion(target, 1) != ERROR_OK) {
  260. LOG_ERROR("single write failed for address 0x%08lX",
  261. (unsigned long)(offset + x));
  262. aduc702x_set_write_enable(target, 0);
  263. return ERROR_FLASH_OPERATION_FAILED;
  264. }
  265. }
  266. LOG_DEBUG("wrote %d bytes at address 0x%08lX", (int)count, (unsigned long)(offset + x));
  267. aduc702x_set_write_enable(target, 0);
  268. return ERROR_OK;
  269. }
  270. static int aduc702x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
  271. {
  272. int retval;
  273. /* try using a block write */
  274. retval = aduc702x_write_block(bank, buffer, offset, count);
  275. if (retval != ERROR_OK) {
  276. if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
  277. /* if block write failed (no sufficient working area),
  278. * use normal (slow) JTAG method */
  279. LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
  280. retval = aduc702x_write_single(bank, buffer, offset, count);
  281. if (retval != ERROR_OK) {
  282. LOG_ERROR("slow write failed");
  283. return ERROR_FLASH_OPERATION_FAILED;
  284. }
  285. }
  286. }
  287. return retval;
  288. }
  289. static int aduc702x_probe(struct flash_bank *bank)
  290. {
  291. return ERROR_OK;
  292. }
  293. static int aduc702x_info(struct flash_bank *bank, char *buf, int buf_size)
  294. {
  295. snprintf(buf, buf_size, "aduc702x flash driver info");
  296. return ERROR_OK;
  297. }
  298. /* sets FEEMOD bit 3
  299. * enable = 1 enables writes & erases, 0 disables them */
  300. static int aduc702x_set_write_enable(struct target *target, int enable)
  301. {
  302. /* don't bother to preserve int enable bit here */
  303. target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEMOD, enable ? 8 : 0);
  304. return ERROR_OK;
  305. }
  306. /* wait up to timeout_ms for controller to not be busy,
  307. * then check whether the command passed or failed.
  308. *
  309. * this function sleeps 1ms between checks (after the first one),
  310. * so in some cases may slow things down without a usleep after the first read */
  311. static int aduc702x_check_flash_completion(struct target *target, unsigned int timeout_ms)
  312. {
  313. uint8_t v = 4;
  314. long long endtime = timeval_ms() + timeout_ms;
  315. while (1) {
  316. target_read_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEESTA, &v);
  317. if ((v & 4) == 0)
  318. break;
  319. alive_sleep(1);
  320. if (timeval_ms() >= endtime)
  321. break;
  322. }
  323. if (v & 2)
  324. return ERROR_FAIL;
  325. /* if a command is ignored, both the success and fail bits may be 0 */
  326. else if ((v & 3) == 0)
  327. return ERROR_FAIL;
  328. else
  329. return ERROR_OK;
  330. }
  331. struct flash_driver aduc702x_flash = {
  332. .name = "aduc702x",
  333. .flash_bank_command = aduc702x_flash_bank_command,
  334. .erase = aduc702x_erase,
  335. .protect = aduc702x_protect,
  336. .write = aduc702x_write,
  337. .read = default_flash_read,
  338. .probe = aduc702x_probe,
  339. .auto_probe = aduc702x_probe,
  340. .erase_check = default_flash_blank_check,
  341. .protect_check = aduc702x_protect_check,
  342. .info = aduc702x_info
  343. };