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  1. /***************************************************************************
  2. * Copyright (C) 2009 by Simon Qian *
  3. * SimonQian@SimonQian.com *
  4. * *
  5. * This program is free software; you can redistribute it and/or modify *
  6. * it under the terms of the GNU General Public License as published by *
  7. * the Free Software Foundation; either version 2 of the License, or *
  8. * (at your option) any later version. *
  9. * *
  10. * This program is distributed in the hope that it will be useful, *
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  13. * GNU General Public License for more details. *
  14. * *
  15. * You should have received a copy of the GNU General Public License *
  16. * along with this program; if not, write to the *
  17. * Free Software Foundation, Inc., *
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
  19. ***************************************************************************/
  20. #ifdef HAVE_CONFIG_H
  21. #include "config.h"
  22. #endif
  23. #include "imp.h"
  24. #include <target/avrt.h>
  25. /* AVR_JTAG_Instructions */
  26. #define AVR_JTAG_INS_LEN 4
  27. /* Public Instructions: */
  28. #define AVR_JTAG_INS_EXTEST 0x00
  29. #define AVR_JTAG_INS_IDCODE 0x01
  30. #define AVR_JTAG_INS_SAMPLE_PRELOAD 0x02
  31. #define AVR_JTAG_INS_BYPASS 0x0F
  32. /* AVR Specified Public Instructions: */
  33. #define AVR_JTAG_INS_AVR_RESET 0x0C
  34. #define AVR_JTAG_INS_PROG_ENABLE 0x04
  35. #define AVR_JTAG_INS_PROG_COMMANDS 0x05
  36. #define AVR_JTAG_INS_PROG_PAGELOAD 0x06
  37. #define AVR_JTAG_INS_PROG_PAGEREAD 0x07
  38. /* Data Registers: */
  39. #define AVR_JTAG_REG_Bypass_Len 1
  40. #define AVR_JTAG_REG_DeviceID_Len 32
  41. #define AVR_JTAG_REG_Reset_Len 1
  42. #define AVR_JTAG_REG_JTAGID_Len 32
  43. #define AVR_JTAG_REG_ProgrammingEnable_Len 16
  44. #define AVR_JTAG_REG_ProgrammingCommand_Len 15
  45. #define AVR_JTAG_REG_FlashDataByte_Len 16
  46. struct avrf_type {
  47. char name[15];
  48. uint16_t chip_id;
  49. int flash_page_size;
  50. int flash_page_num;
  51. int eeprom_page_size;
  52. int eeprom_page_num;
  53. };
  54. struct avrf_flash_bank {
  55. int ppage_size;
  56. int probed;
  57. };
  58. static struct avrf_type avft_chips_info[] = {
  59. /* name, chip_id, flash_page_size, flash_page_num,
  60. * eeprom_page_size, eeprom_page_num
  61. */
  62. {"atmega128", 0x9702, 256, 512, 8, 512},
  63. {"at90can128", 0x9781, 256, 512, 8, 512},
  64. };
  65. /* avr program functions */
  66. static int avr_jtag_reset(struct avr_common *avr, uint32_t reset)
  67. {
  68. avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
  69. avr_jtag_senddat(avr->jtag_info.tap, NULL, reset, AVR_JTAG_REG_Reset_Len);
  70. return ERROR_OK;
  71. }
  72. static int avr_jtag_read_jtagid(struct avr_common *avr, uint32_t *id)
  73. {
  74. avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
  75. avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
  76. return ERROR_OK;
  77. }
  78. static int avr_jtagprg_enterprogmode(struct avr_common *avr)
  79. {
  80. avr_jtag_reset(avr, 1);
  81. avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
  82. avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_ProgrammingEnable_Len);
  83. return ERROR_OK;
  84. }
  85. static int avr_jtagprg_leaveprogmode(struct avr_common *avr)
  86. {
  87. avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
  88. avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_ProgrammingCommand_Len);
  89. avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_ProgrammingCommand_Len);
  90. avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
  91. avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_ProgrammingEnable_Len);
  92. avr_jtag_reset(avr, 0);
  93. return ERROR_OK;
  94. }
  95. static int avr_jtagprg_chiperase(struct avr_common *avr)
  96. {
  97. uint32_t poll_value;
  98. avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
  99. avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
  100. avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_ProgrammingCommand_Len);
  101. avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
  102. avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
  103. do {
  104. poll_value = 0;
  105. avr_jtag_senddat(avr->jtag_info.tap,
  106. &poll_value,
  107. 0x3380,
  108. AVR_JTAG_REG_ProgrammingCommand_Len);
  109. if (ERROR_OK != mcu_execute_queue())
  110. return ERROR_FAIL;
  111. LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
  112. } while (!(poll_value & 0x0200));
  113. return ERROR_OK;
  114. }
  115. static int avr_jtagprg_writeflashpage(struct avr_common *avr,
  116. uint8_t *page_buf,
  117. uint32_t buf_size,
  118. uint32_t addr,
  119. uint32_t page_size)
  120. {
  121. uint32_t i, poll_value;
  122. avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
  123. avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
  124. /* load addr high byte */
  125. avr_jtag_senddat(avr->jtag_info.tap,
  126. NULL,
  127. 0x0700 | ((addr >> 9) & 0xFF),
  128. AVR_JTAG_REG_ProgrammingCommand_Len);
  129. /* load addr low byte */
  130. avr_jtag_senddat(avr->jtag_info.tap,
  131. NULL,
  132. 0x0300 | ((addr >> 1) & 0xFF),
  133. AVR_JTAG_REG_ProgrammingCommand_Len);
  134. avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
  135. for (i = 0; i < page_size; i++) {
  136. if (i < buf_size)
  137. avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);
  138. else
  139. avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
  140. }
  141. avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
  142. avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
  143. avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_ProgrammingCommand_Len);
  144. avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
  145. avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
  146. do {
  147. poll_value = 0;
  148. avr_jtag_senddat(avr->jtag_info.tap,
  149. &poll_value,
  150. 0x3700,
  151. AVR_JTAG_REG_ProgrammingCommand_Len);
  152. if (ERROR_OK != mcu_execute_queue())
  153. return ERROR_FAIL;
  154. LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
  155. } while (!(poll_value & 0x0200));
  156. return ERROR_OK;
  157. }
  158. FLASH_BANK_COMMAND_HANDLER(avrf_flash_bank_command)
  159. {
  160. struct avrf_flash_bank *avrf_info;
  161. if (CMD_ARGC < 6)
  162. return ERROR_COMMAND_SYNTAX_ERROR;
  163. avrf_info = malloc(sizeof(struct avrf_flash_bank));
  164. bank->driver_priv = avrf_info;
  165. avrf_info->probed = 0;
  166. return ERROR_OK;
  167. }
  168. static int avrf_erase(struct flash_bank *bank, int first, int last)
  169. {
  170. struct target *target = bank->target;
  171. struct avr_common *avr = target->arch_info;
  172. int status;
  173. LOG_DEBUG("%s", __func__);
  174. if (target->state != TARGET_HALTED) {
  175. LOG_ERROR("Target not halted");
  176. return ERROR_TARGET_NOT_HALTED;
  177. }
  178. status = avr_jtagprg_enterprogmode(avr);
  179. if (status != ERROR_OK)
  180. return status;
  181. status = avr_jtagprg_chiperase(avr);
  182. if (status != ERROR_OK)
  183. return status;
  184. return avr_jtagprg_leaveprogmode(avr);
  185. }
  186. static int avrf_protect(struct flash_bank *bank, int set, int first, int last)
  187. {
  188. LOG_INFO("%s", __func__);
  189. return ERROR_OK;
  190. }
  191. static int avrf_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
  192. {
  193. struct target *target = bank->target;
  194. struct avr_common *avr = target->arch_info;
  195. uint32_t cur_size, cur_buffer_size, page_size;
  196. if (bank->target->state != TARGET_HALTED) {
  197. LOG_ERROR("Target not halted");
  198. return ERROR_TARGET_NOT_HALTED;
  199. }
  200. page_size = bank->sectors[0].size;
  201. if ((offset % page_size) != 0) {
  202. LOG_WARNING("offset 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment",
  203. offset,
  204. page_size);
  205. return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
  206. }
  207. LOG_DEBUG("offset is 0x%08" PRIx32 "", offset);
  208. LOG_DEBUG("count is %" PRId32 "", count);
  209. if (ERROR_OK != avr_jtagprg_enterprogmode(avr))
  210. return ERROR_FAIL;
  211. cur_size = 0;
  212. while (count > 0) {
  213. if (count > page_size)
  214. cur_buffer_size = page_size;
  215. else
  216. cur_buffer_size = count;
  217. avr_jtagprg_writeflashpage(avr,
  218. buffer + cur_size,
  219. cur_buffer_size,
  220. offset + cur_size,
  221. page_size);
  222. count -= cur_buffer_size;
  223. cur_size += cur_buffer_size;
  224. keep_alive();
  225. }
  226. return avr_jtagprg_leaveprogmode(avr);
  227. }
  228. #define EXTRACT_MFG(X) (((X) & 0xffe) >> 1)
  229. #define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
  230. #define EXTRACT_VER(X) (((X) & 0xf0000000) >> 28)
  231. static int avrf_probe(struct flash_bank *bank)
  232. {
  233. struct target *target = bank->target;
  234. struct avrf_flash_bank *avrf_info = bank->driver_priv;
  235. struct avr_common *avr = target->arch_info;
  236. struct avrf_type *avr_info = NULL;
  237. int i;
  238. uint32_t device_id;
  239. if (bank->target->state != TARGET_HALTED) {
  240. LOG_ERROR("Target not halted");
  241. return ERROR_TARGET_NOT_HALTED;
  242. }
  243. avrf_info->probed = 0;
  244. avr_jtag_read_jtagid(avr, &device_id);
  245. if (ERROR_OK != mcu_execute_queue())
  246. return ERROR_FAIL;
  247. LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
  248. if (EXTRACT_MFG(device_id) != 0x1F)
  249. LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
  250. EXTRACT_MFG(device_id),
  251. 0x1F);
  252. for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) {
  253. if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
  254. avr_info = &avft_chips_info[i];
  255. LOG_INFO("target device is %s", avr_info->name);
  256. break;
  257. }
  258. }
  259. if (avr_info != NULL) {
  260. if (bank->sectors) {
  261. free(bank->sectors);
  262. bank->sectors = NULL;
  263. }
  264. /* chip found */
  265. bank->base = 0x00000000;
  266. bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
  267. bank->num_sectors = avr_info->flash_page_num;
  268. bank->sectors = malloc(sizeof(struct flash_sector) * avr_info->flash_page_num);
  269. for (i = 0; i < avr_info->flash_page_num; i++) {
  270. bank->sectors[i].offset = i * avr_info->flash_page_size;
  271. bank->sectors[i].size = avr_info->flash_page_size;
  272. bank->sectors[i].is_erased = -1;
  273. bank->sectors[i].is_protected = 1;
  274. }
  275. avrf_info->probed = 1;
  276. return ERROR_OK;
  277. } else {
  278. /* chip not supported */
  279. LOG_ERROR("0x%" PRIx32 " is not support for avr", EXTRACT_PART(device_id));
  280. avrf_info->probed = 1;
  281. return ERROR_FAIL;
  282. }
  283. }
  284. static int avrf_auto_probe(struct flash_bank *bank)
  285. {
  286. struct avrf_flash_bank *avrf_info = bank->driver_priv;
  287. if (avrf_info->probed)
  288. return ERROR_OK;
  289. return avrf_probe(bank);
  290. }
  291. static int avrf_protect_check(struct flash_bank *bank)
  292. {
  293. LOG_INFO("%s", __func__);
  294. return ERROR_OK;
  295. }
  296. static int avrf_info(struct flash_bank *bank, char *buf, int buf_size)
  297. {
  298. struct target *target = bank->target;
  299. struct avr_common *avr = target->arch_info;
  300. struct avrf_type *avr_info = NULL;
  301. int i;
  302. uint32_t device_id;
  303. if (bank->target->state != TARGET_HALTED) {
  304. LOG_ERROR("Target not halted");
  305. return ERROR_TARGET_NOT_HALTED;
  306. }
  307. avr_jtag_read_jtagid(avr, &device_id);
  308. if (ERROR_OK != mcu_execute_queue())
  309. return ERROR_FAIL;
  310. LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
  311. if (EXTRACT_MFG(device_id) != 0x1F)
  312. LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
  313. EXTRACT_MFG(device_id),
  314. 0x1F);
  315. for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) {
  316. if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
  317. avr_info = &avft_chips_info[i];
  318. LOG_INFO("target device is %s", avr_info->name);
  319. break;
  320. }
  321. }
  322. if (avr_info != NULL) {
  323. /* chip found */
  324. snprintf(buf, buf_size, "%s - Rev: 0x%" PRIx32 "", avr_info->name,
  325. EXTRACT_VER(device_id));
  326. return ERROR_OK;
  327. } else {
  328. /* chip not supported */
  329. snprintf(buf, buf_size, "Cannot identify target as a avr\n");
  330. return ERROR_FLASH_OPERATION_FAILED;
  331. }
  332. }
  333. static int avrf_mass_erase(struct flash_bank *bank)
  334. {
  335. struct target *target = bank->target;
  336. struct avr_common *avr = target->arch_info;
  337. if (target->state != TARGET_HALTED) {
  338. LOG_ERROR("Target not halted");
  339. return ERROR_TARGET_NOT_HALTED;
  340. }
  341. if ((ERROR_OK != avr_jtagprg_enterprogmode(avr))
  342. || (ERROR_OK != avr_jtagprg_chiperase(avr))
  343. || (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))
  344. return ERROR_FAIL;
  345. return ERROR_OK;
  346. }
  347. COMMAND_HANDLER(avrf_handle_mass_erase_command)
  348. {
  349. int i;
  350. if (CMD_ARGC < 1)
  351. return ERROR_COMMAND_SYNTAX_ERROR;
  352. struct flash_bank *bank;
  353. int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
  354. if (ERROR_OK != retval)
  355. return retval;
  356. if (avrf_mass_erase(bank) == ERROR_OK) {
  357. /* set all sectors as erased */
  358. for (i = 0; i < bank->num_sectors; i++)
  359. bank->sectors[i].is_erased = 1;
  360. command_print(CMD_CTX, "avr mass erase complete");
  361. } else
  362. command_print(CMD_CTX, "avr mass erase failed");
  363. LOG_DEBUG("%s", __func__);
  364. return ERROR_OK;
  365. }
  366. static const struct command_registration avrf_exec_command_handlers[] = {
  367. {
  368. .name = "mass_erase",
  369. .usage = "<bank>",
  370. .handler = avrf_handle_mass_erase_command,
  371. .mode = COMMAND_EXEC,
  372. .help = "erase entire device",
  373. },
  374. COMMAND_REGISTRATION_DONE
  375. };
  376. static const struct command_registration avrf_command_handlers[] = {
  377. {
  378. .name = "avrf",
  379. .mode = COMMAND_ANY,
  380. .help = "AVR flash command group",
  381. .usage = "",
  382. .chain = avrf_exec_command_handlers,
  383. },
  384. COMMAND_REGISTRATION_DONE
  385. };
  386. struct flash_driver avr_flash = {
  387. .name = "avr",
  388. .commands = avrf_command_handlers,
  389. .flash_bank_command = avrf_flash_bank_command,
  390. .erase = avrf_erase,
  391. .protect = avrf_protect,
  392. .write = avrf_write,
  393. .read = default_flash_read,
  394. .probe = avrf_probe,
  395. .auto_probe = avrf_auto_probe,
  396. .erase_check = default_flash_blank_check,
  397. .protect_check = avrf_protect_check,
  398. .info = avrf_info,
  399. };