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  1. /***************************************************************************
  2. * Copyright (C) 2011 by Mathias Kuester *
  3. * kesmtp@freenet.de *
  4. * *
  5. * Copyright (C) 2011 sleep(5) ltd *
  6. * tomas@sleepfive.com *
  7. * *
  8. * Copyright (C) 2012 by Christopher D. Kilgour *
  9. * techie at whiterocker.com *
  10. * *
  11. * This program is free software; you can redistribute it and/or modify *
  12. * it under the terms of the GNU General Public License as published by *
  13. * the Free Software Foundation; either version 2 of the License, or *
  14. * (at your option) any later version. *
  15. * *
  16. * This program is distributed in the hope that it will be useful, *
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  19. * GNU General Public License for more details. *
  20. * *
  21. * You should have received a copy of the GNU General Public License *
  22. * along with this program; if not, write to the *
  23. * Free Software Foundation, Inc., *
  24. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
  25. ***************************************************************************/
  26. #ifdef HAVE_CONFIG_H
  27. #include "config.h"
  28. #endif
  29. #include "imp.h"
  30. #include "helper/binarybuffer.h"
  31. /*
  32. * Implementation Notes
  33. *
  34. * The persistent memories in the Kinetis chip families K10 through
  35. * K70 are all manipulated with the Flash Memory Module. Some
  36. * variants call this module the FTFE, others call it the FTFL. To
  37. * indicate that both are considered here, we use FTFX.
  38. *
  39. * Within the module, according to the chip variant, the persistent
  40. * memory is divided into what Freescale terms Program Flash, FlexNVM,
  41. * and FlexRAM. All chip variants have Program Flash. Some chip
  42. * variants also have FlexNVM and FlexRAM, which always appear
  43. * together.
  44. *
  45. * A given Kinetis chip may have 2 or 4 blocks of flash. Here we map
  46. * each block to a separate bank. Each block size varies by chip and
  47. * may be determined by the read-only SIM_FCFG1 register. The sector
  48. * size within each bank/block varies by the chip granularity as
  49. * described below.
  50. *
  51. * Kinetis offers four different of flash granularities applicable
  52. * across the chip families. The granularity is apparently reflected
  53. * by at least the reference manual suffix. For example, for chip
  54. * MK60FN1M0VLQ12, reference manual K60P144M150SF3RM ends in "SF3RM",
  55. * where the "3" indicates there are four flash blocks with 4kiB
  56. * sectors. All possible granularities are indicated below.
  57. *
  58. * The first half of the flash (1 or 2 blocks, depending on the
  59. * granularity) is always Program Flash and always starts at address
  60. * 0x00000000. The "PFLSH" flag, bit 23 of the read-only SIM_FCFG2
  61. * register, determines whether the second half of the flash is also
  62. * Program Flash or FlexNVM+FlexRAM. When PFLSH is set, the second
  63. * half of flash is Program Flash and is contiguous in the memory map
  64. * from the first half. When PFLSH is clear, the second half of flash
  65. * is FlexNVM and always starts at address 0x10000000. FlexRAM, which
  66. * is also present when PFLSH is clear, always starts at address
  67. * 0x14000000.
  68. *
  69. * The Flash Memory Module provides a register set where flash
  70. * commands are loaded to perform flash operations like erase and
  71. * program. Different commands are available depending on whether
  72. * Program Flash or FlexNVM/FlexRAM is being manipulated. Although
  73. * the commands used are quite consistent between flash blocks, the
  74. * parameters they accept differ according to the flash granularity.
  75. * Some Kinetis chips have different granularity between Program Flash
  76. * and FlexNVM/FlexRAM, so flash command arguments may differ between
  77. * blocks in the same chip.
  78. *
  79. * Although not documented as such by Freescale, it appears that bits
  80. * 8:7 of the read-only SIM_SDID register reflect the granularity
  81. * settings 0..3, so sector sizes and block counts are applicable
  82. * according to the following table.
  83. */
  84. const struct {
  85. unsigned pflash_sector_size_bytes;
  86. unsigned nvm_sector_size_bytes;
  87. unsigned num_blocks;
  88. } kinetis_flash_params[4] = {
  89. { 1<<10, 1<<10, 2 },
  90. { 2<<10, 1<<10, 2 },
  91. { 2<<10, 2<<10, 2 },
  92. { 4<<10, 4<<10, 4 }
  93. };
  94. /* Addressess */
  95. #define FLEXRAM 0x14000000
  96. #define FTFx_FSTAT 0x40020000
  97. #define FTFx_FCNFG 0x40020001
  98. #define FTFx_FCCOB3 0x40020004
  99. #define FTFx_FPROT3 0x40020010
  100. #define SIM_SDID 0x40048024
  101. #define SIM_FCFG1 0x4004804c
  102. #define SIM_FCFG2 0x40048050
  103. /* Commands */
  104. #define FTFx_CMD_BLOCKSTAT 0x00
  105. #define FTFx_CMD_SECTSTAT 0x01
  106. #define FTFx_CMD_LWORDPROG 0x06
  107. #define FTFx_CMD_SECTERASE 0x09
  108. #define FTFx_CMD_SECTWRITE 0x0b
  109. #define FTFx_CMD_SETFLEXRAM 0x81
  110. struct kinetis_flash_bank {
  111. unsigned granularity;
  112. unsigned bank_ordinal;
  113. uint32_t sector_size;
  114. uint32_t protection_size;
  115. uint32_t sim_sdid;
  116. uint32_t sim_fcfg1;
  117. uint32_t sim_fcfg2;
  118. enum {
  119. FC_AUTO = 0,
  120. FC_PFLASH,
  121. FC_FLEX_NVM,
  122. FC_FLEX_RAM,
  123. } flash_class;
  124. };
  125. FLASH_BANK_COMMAND_HANDLER(kinetis_flash_bank_command)
  126. {
  127. struct kinetis_flash_bank *bank_info;
  128. if (CMD_ARGC < 6)
  129. return ERROR_COMMAND_SYNTAX_ERROR;
  130. LOG_INFO("add flash_bank kinetis %s", bank->name);
  131. bank_info = malloc(sizeof(struct kinetis_flash_bank));
  132. memset(bank_info, 0, sizeof(struct kinetis_flash_bank));
  133. bank->driver_priv = bank_info;
  134. return ERROR_OK;
  135. }
  136. static int kinetis_protect(struct flash_bank *bank, int set, int first,
  137. int last)
  138. {
  139. LOG_WARNING("kinetis_protect not supported yet");
  140. /* FIXME: TODO */
  141. if (bank->target->state != TARGET_HALTED) {
  142. LOG_ERROR("Target not halted");
  143. return ERROR_TARGET_NOT_HALTED;
  144. }
  145. return ERROR_FLASH_BANK_INVALID;
  146. }
  147. static int kinetis_protect_check(struct flash_bank *bank)
  148. {
  149. struct kinetis_flash_bank *kinfo = bank->driver_priv;
  150. if (bank->target->state != TARGET_HALTED) {
  151. LOG_ERROR("Target not halted");
  152. return ERROR_TARGET_NOT_HALTED;
  153. }
  154. if (kinfo->flash_class == FC_PFLASH) {
  155. int result;
  156. uint8_t buffer[4];
  157. uint32_t fprot, psec;
  158. int i, b;
  159. /* read protection register */
  160. result = target_read_memory(bank->target, FTFx_FPROT3, 1, 4, buffer);
  161. if (result != ERROR_OK)
  162. return result;
  163. fprot = target_buffer_get_u32(bank->target, buffer);
  164. /*
  165. * Every bit protects 1/32 of the full flash (not necessarily
  166. * just this bank), but we enforce the bank ordinals for
  167. * PFlash to start at zero.
  168. */
  169. b = kinfo->bank_ordinal * (bank->size / kinfo->protection_size);
  170. for (psec = 0, i = 0; i < bank->num_sectors; i++) {
  171. if ((fprot >> b) & 1)
  172. bank->sectors[i].is_protected = 0;
  173. else
  174. bank->sectors[i].is_protected = 1;
  175. psec += bank->sectors[i].size;
  176. if (psec >= kinfo->protection_size) {
  177. psec = 0;
  178. b++;
  179. }
  180. }
  181. } else {
  182. LOG_ERROR("Protection checks for FlexNVM not yet supported");
  183. return ERROR_FLASH_BANK_INVALID;
  184. }
  185. return ERROR_OK;
  186. }
  187. static int kinetis_ftfx_command(struct flash_bank *bank, uint8_t fcmd, uint32_t faddr,
  188. uint8_t fccob4, uint8_t fccob5, uint8_t fccob6, uint8_t fccob7,
  189. uint8_t fccob8, uint8_t fccob9, uint8_t fccoba, uint8_t fccobb,
  190. uint8_t *ftfx_fstat)
  191. {
  192. uint8_t command[12] = {faddr & 0xff, (faddr >> 8) & 0xff, (faddr >> 16) & 0xff, fcmd,
  193. fccob7, fccob6, fccob5, fccob4,
  194. fccobb, fccoba, fccob9, fccob8};
  195. int result, i;
  196. uint8_t buffer;
  197. /* wait for done */
  198. for (i = 0; i < 50; i++) {
  199. result =
  200. target_read_memory(bank->target, FTFx_FSTAT, 1, 1, &buffer);
  201. if (result != ERROR_OK)
  202. return result;
  203. if (buffer & 0x80)
  204. break;
  205. buffer = 0x00;
  206. }
  207. if (buffer != 0x80) {
  208. /* reset error flags */
  209. buffer = 0x30;
  210. result =
  211. target_write_memory(bank->target, FTFx_FSTAT, 1, 1, &buffer);
  212. if (result != ERROR_OK)
  213. return result;
  214. }
  215. result = target_write_memory(bank->target, FTFx_FCCOB3, 4, 3, command);
  216. if (result != ERROR_OK)
  217. return result;
  218. /* start command */
  219. buffer = 0x80;
  220. result = target_write_memory(bank->target, FTFx_FSTAT, 1, 1, &buffer);
  221. if (result != ERROR_OK)
  222. return result;
  223. /* wait for done */
  224. for (i = 0; i < 50; i++) {
  225. result =
  226. target_read_memory(bank->target, FTFx_FSTAT, 1, 1, ftfx_fstat);
  227. if (result != ERROR_OK)
  228. return result;
  229. if (*ftfx_fstat & 0x80)
  230. break;
  231. }
  232. if ((*ftfx_fstat & 0xf0) != 0x80) {
  233. LOG_ERROR
  234. ("ftfx command failed FSTAT: %02X FCCOB: %02X%02X%02X%02X %02X%02X%02X%02X %02X%02X%02X%02X",
  235. *ftfx_fstat, command[3], command[2], command[1], command[0],
  236. command[7], command[6], command[5], command[4],
  237. command[11], command[10], command[9], command[8]);
  238. return ERROR_FLASH_OPERATION_FAILED;
  239. }
  240. return ERROR_OK;
  241. }
  242. static int kinetis_erase(struct flash_bank *bank, int first, int last)
  243. {
  244. int result, i;
  245. if (bank->target->state != TARGET_HALTED) {
  246. LOG_ERROR("Target not halted");
  247. return ERROR_TARGET_NOT_HALTED;
  248. }
  249. if ((first > bank->num_sectors) || (last > bank->num_sectors))
  250. return ERROR_FLASH_OPERATION_FAILED;
  251. /*
  252. * FIXME: TODO: use the 'Erase Flash Block' command if the
  253. * requested erase is PFlash or NVM and encompasses the entire
  254. * block. Should be quicker.
  255. */
  256. for (i = first; i <= last; i++) {
  257. uint8_t ftfx_fstat;
  258. /* set command and sector address */
  259. result = kinetis_ftfx_command(bank, FTFx_CMD_SECTERASE, bank->base + bank->sectors[i].offset,
  260. 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
  261. if (result != ERROR_OK) {
  262. LOG_WARNING("erase sector %d failed", i);
  263. return ERROR_FLASH_OPERATION_FAILED;
  264. }
  265. bank->sectors[i].is_erased = 1;
  266. }
  267. if (first == 0) {
  268. LOG_WARNING
  269. ("flash configuration field erased, please reset the device");
  270. }
  271. return ERROR_OK;
  272. }
  273. static int kinetis_write(struct flash_bank *bank, uint8_t *buffer,
  274. uint32_t offset, uint32_t count)
  275. {
  276. unsigned int i, result, fallback = 0;
  277. uint8_t buf[8];
  278. uint32_t wc;
  279. struct kinetis_flash_bank *kinfo = bank->driver_priv;
  280. if (bank->target->state != TARGET_HALTED) {
  281. LOG_ERROR("Target not halted");
  282. return ERROR_TARGET_NOT_HALTED;
  283. }
  284. if (kinfo->flash_class == FC_FLEX_NVM) {
  285. uint8_t ftfx_fstat;
  286. LOG_DEBUG("flash write into FlexNVM @%08X", offset);
  287. /* make flex ram available */
  288. result = kinetis_ftfx_command(bank, FTFx_CMD_SETFLEXRAM, 0x00ff0000, 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
  289. if (result != ERROR_OK)
  290. return ERROR_FLASH_OPERATION_FAILED;
  291. /* check if ram ready */
  292. result = target_read_memory(bank->target, FTFx_FCNFG, 1, 1, buf);
  293. if (result != ERROR_OK)
  294. return result;
  295. if (!(buf[0] & (1 << 1))) {
  296. /* fallback to longword write */
  297. fallback = 1;
  298. LOG_WARNING("ram not ready, fallback to slow longword write (FCNFG: %02X)",
  299. buf[0]);
  300. }
  301. } else {
  302. LOG_DEBUG("flash write into PFLASH @08%X", offset);
  303. }
  304. /* program section command */
  305. if (fallback == 0) {
  306. /*
  307. * Kinetis uses different terms for the granularity of
  308. * sector writes, e.g. "phrase" or "128 bits". We use
  309. * the generic term "chunk". The largest possible
  310. * Kinetis "chunk" is 16 bytes (128 bits).
  311. */
  312. unsigned prog_section_chunk_bytes = kinfo->sector_size >> 8;
  313. /* assume the NVM sector size is half the FlexRAM size */
  314. unsigned prog_size_bytes = MIN(kinfo->sector_size,
  315. kinetis_flash_params[kinfo->granularity].nvm_sector_size_bytes);
  316. for (i = 0; i < count; i += prog_size_bytes) {
  317. uint8_t residual_buffer[16];
  318. uint8_t ftfx_fstat;
  319. uint32_t section_count = prog_size_bytes / prog_section_chunk_bytes;
  320. uint32_t residual_wc = 0;
  321. /*
  322. * Assume the word count covers an entire
  323. * sector.
  324. */
  325. wc = prog_size_bytes / 4;
  326. /*
  327. * If bytes to be programmed are less than the
  328. * full sector, then determine the number of
  329. * full-words to program, and put together the
  330. * residual buffer so that a full "section"
  331. * may always be programmed.
  332. */
  333. if ((count - i) < prog_size_bytes) {
  334. /* number of bytes to program beyond full section */
  335. unsigned residual_bc = (count-i) % prog_section_chunk_bytes;
  336. /* number of complete words to copy directly from buffer */
  337. wc = (count - i) / 4;
  338. /* number of total sections to write, including residual */
  339. section_count = DIV_ROUND_UP((count-i), prog_section_chunk_bytes);
  340. /* any residual bytes delivers a whole residual section */
  341. residual_wc = (residual_bc ? prog_section_chunk_bytes : 0)/4;
  342. /* clear residual buffer then populate residual bytes */
  343. (void) memset(residual_buffer, 0xff, prog_section_chunk_bytes);
  344. (void) memcpy(residual_buffer, &buffer[i+4*wc], residual_bc);
  345. }
  346. LOG_DEBUG("write section @ %08X with length %d bytes",
  347. offset + i, wc*4);
  348. /* write data to flexram as whole-words */
  349. result = target_write_memory(bank->target, FLEXRAM, 4, wc,
  350. buffer + i);
  351. if (result != ERROR_OK) {
  352. LOG_ERROR("target_write_memory failed");
  353. return result;
  354. }
  355. /* write the residual words to the flexram */
  356. if (residual_wc) {
  357. result = target_write_memory(bank->target,
  358. FLEXRAM+4*wc,
  359. 4, residual_wc,
  360. residual_buffer);
  361. if (result != ERROR_OK) {
  362. LOG_ERROR("target_write_memory failed");
  363. return result;
  364. }
  365. }
  366. /* execute section-write command */
  367. result = kinetis_ftfx_command(bank, FTFx_CMD_SECTWRITE, bank->base + offset + i,
  368. section_count>>8, section_count, 0, 0,
  369. 0, 0, 0, 0, &ftfx_fstat);
  370. if (result != ERROR_OK)
  371. return ERROR_FLASH_OPERATION_FAILED;
  372. }
  373. }
  374. /* program longword command, not supported in "SF3" devices */
  375. else if (kinfo->granularity != 3) {
  376. for (i = 0; i < count; i += 4) {
  377. uint8_t ftfx_fstat;
  378. LOG_DEBUG("write longword @ %08X", offset + i);
  379. uint8_t padding[4] = {0xff, 0xff, 0xff, 0xff};
  380. memcpy(padding, buffer + i, MIN(4, count-i));
  381. result = kinetis_ftfx_command(bank, FTFx_CMD_LWORDPROG, bank->base + offset + i,
  382. padding[3], padding[2], padding[1], padding[0],
  383. 0, 0, 0, 0, &ftfx_fstat);
  384. if (result != ERROR_OK)
  385. return ERROR_FLASH_OPERATION_FAILED;
  386. }
  387. } else {
  388. LOG_ERROR("Flash write strategy not implemented");
  389. return ERROR_FLASH_OPERATION_FAILED;
  390. }
  391. return ERROR_OK;
  392. }
  393. static int kinetis_read_part_info(struct flash_bank *bank)
  394. {
  395. int result, i;
  396. uint8_t buf[4];
  397. uint32_t offset = 0;
  398. uint8_t fcfg1_nvmsize, fcfg1_pfsize, fcfg1_eesize, fcfg2_pflsh;
  399. uint32_t nvm_size = 0, pf_size = 0, ee_size = 0;
  400. unsigned granularity, num_blocks = 0, num_pflash_blocks = 0, num_nvm_blocks = 0,
  401. first_nvm_bank = 0, reassign = 0;
  402. struct kinetis_flash_bank *kinfo = bank->driver_priv;
  403. result = target_read_memory(bank->target, SIM_SDID, 1, 4, buf);
  404. if (result != ERROR_OK)
  405. return result;
  406. kinfo->sim_sdid = target_buffer_get_u32(bank->target, buf);
  407. granularity = (kinfo->sim_sdid >> 7) & 0x03;
  408. result = target_read_memory(bank->target, SIM_FCFG1, 1, 4, buf);
  409. if (result != ERROR_OK)
  410. return result;
  411. kinfo->sim_fcfg1 = target_buffer_get_u32(bank->target, buf);
  412. result = target_read_memory(bank->target, SIM_FCFG2, 1, 4, buf);
  413. if (result != ERROR_OK)
  414. return result;
  415. kinfo->sim_fcfg2 = target_buffer_get_u32(bank->target, buf);
  416. fcfg2_pflsh = (kinfo->sim_fcfg2 >> 23) & 0x01;
  417. LOG_DEBUG("SDID: %08X FCFG1: %08X FCFG2: %08X", kinfo->sim_sdid,
  418. kinfo->sim_fcfg1, kinfo->sim_fcfg2);
  419. fcfg1_nvmsize = (uint8_t)((kinfo->sim_fcfg1 >> 28) & 0x0f);
  420. fcfg1_pfsize = (uint8_t)((kinfo->sim_fcfg1 >> 24) & 0x0f);
  421. fcfg1_eesize = (uint8_t)((kinfo->sim_fcfg1 >> 16) & 0x0f);
  422. /* when the PFLSH bit is set, there is no FlexNVM/FlexRAM */
  423. if (!fcfg2_pflsh) {
  424. switch (fcfg1_nvmsize) {
  425. case 0x03:
  426. case 0x07:
  427. case 0x09:
  428. case 0x0b:
  429. nvm_size = 1 << (14 + (fcfg1_nvmsize >> 1));
  430. break;
  431. case 0x0f:
  432. if (granularity == 3)
  433. nvm_size = 512<<10;
  434. else
  435. nvm_size = 256<<10;
  436. break;
  437. default:
  438. nvm_size = 0;
  439. break;
  440. }
  441. switch (fcfg1_eesize) {
  442. case 0x00:
  443. case 0x01:
  444. case 0x02:
  445. case 0x03:
  446. case 0x04:
  447. case 0x05:
  448. case 0x06:
  449. case 0x07:
  450. case 0x08:
  451. case 0x09:
  452. ee_size = (16 << (10 - fcfg1_eesize));
  453. break;
  454. default:
  455. ee_size = 0;
  456. break;
  457. }
  458. }
  459. switch (fcfg1_pfsize) {
  460. case 0x03:
  461. case 0x05:
  462. case 0x07:
  463. case 0x09:
  464. case 0x0b:
  465. case 0x0d:
  466. pf_size = 1 << (14 + (fcfg1_pfsize >> 1));
  467. break;
  468. case 0x0f:
  469. if (granularity == 3)
  470. pf_size = 1024<<10;
  471. else if (fcfg2_pflsh)
  472. pf_size = 512<<10;
  473. else
  474. pf_size = 256<<10;
  475. break;
  476. default:
  477. pf_size = 0;
  478. break;
  479. }
  480. LOG_DEBUG("FlexNVM: %d PFlash: %d FlexRAM: %d PFLSH: %d",
  481. nvm_size, pf_size, ee_size, fcfg2_pflsh);
  482. num_blocks = kinetis_flash_params[granularity].num_blocks;
  483. num_pflash_blocks = num_blocks / (2 - fcfg2_pflsh);
  484. first_nvm_bank = num_pflash_blocks;
  485. num_nvm_blocks = num_blocks - num_pflash_blocks;
  486. LOG_DEBUG("%d blocks total: %d PFlash, %d FlexNVM",
  487. num_blocks, num_pflash_blocks, num_nvm_blocks);
  488. /*
  489. * If the flash class is already assigned, verify the
  490. * parameters.
  491. */
  492. if (kinfo->flash_class != FC_AUTO) {
  493. if (kinfo->bank_ordinal != (unsigned) bank->bank_number) {
  494. LOG_WARNING("Flash ordinal/bank number mismatch");
  495. reassign = 1;
  496. } else if (kinfo->granularity != granularity) {
  497. LOG_WARNING("Flash granularity mismatch");
  498. reassign = 1;
  499. } else {
  500. switch (kinfo->flash_class) {
  501. case FC_PFLASH:
  502. if (kinfo->bank_ordinal >= first_nvm_bank) {
  503. LOG_WARNING("Class mismatch, bank %d is not PFlash",
  504. bank->bank_number);
  505. reassign = 1;
  506. } else if (bank->size != (pf_size / num_pflash_blocks)) {
  507. LOG_WARNING("PFlash size mismatch");
  508. reassign = 1;
  509. } else if (bank->base !=
  510. (0x00000000 + bank->size * kinfo->bank_ordinal)) {
  511. LOG_WARNING("PFlash address range mismatch");
  512. reassign = 1;
  513. } else if (kinfo->sector_size !=
  514. kinetis_flash_params[granularity].pflash_sector_size_bytes) {
  515. LOG_WARNING("PFlash sector size mismatch");
  516. reassign = 1;
  517. } else {
  518. LOG_DEBUG("PFlash bank %d already configured okay",
  519. kinfo->bank_ordinal);
  520. }
  521. break;
  522. case FC_FLEX_NVM:
  523. if ((kinfo->bank_ordinal >= num_blocks) ||
  524. (kinfo->bank_ordinal < first_nvm_bank)) {
  525. LOG_WARNING("Class mismatch, bank %d is not FlexNVM",
  526. bank->bank_number);
  527. reassign = 1;
  528. } else if (bank->size != (nvm_size / num_nvm_blocks)) {
  529. LOG_WARNING("FlexNVM size mismatch");
  530. reassign = 1;
  531. } else if (bank->base !=
  532. (0x10000000 + bank->size * kinfo->bank_ordinal)) {
  533. LOG_WARNING("FlexNVM address range mismatch");
  534. reassign = 1;
  535. } else if (kinfo->sector_size !=
  536. kinetis_flash_params[granularity].nvm_sector_size_bytes) {
  537. LOG_WARNING("FlexNVM sector size mismatch");
  538. reassign = 1;
  539. } else {
  540. LOG_DEBUG("FlexNVM bank %d already configured okay",
  541. kinfo->bank_ordinal);
  542. }
  543. break;
  544. case FC_FLEX_RAM:
  545. if (kinfo->bank_ordinal != num_blocks) {
  546. LOG_WARNING("Class mismatch, bank %d is not FlexRAM",
  547. bank->bank_number);
  548. reassign = 1;
  549. } else if (bank->size != ee_size) {
  550. LOG_WARNING("FlexRAM size mismatch");
  551. reassign = 1;
  552. } else if (bank->base != FLEXRAM) {
  553. LOG_WARNING("FlexRAM address mismatch");
  554. reassign = 1;
  555. } else if (kinfo->sector_size !=
  556. kinetis_flash_params[granularity].nvm_sector_size_bytes) {
  557. LOG_WARNING("FlexRAM sector size mismatch");
  558. reassign = 1;
  559. } else {
  560. LOG_DEBUG("FlexRAM bank %d already configured okay",
  561. kinfo->bank_ordinal);
  562. }
  563. break;
  564. default:
  565. LOG_WARNING("Unknown or inconsistent flash class");
  566. reassign = 1;
  567. break;
  568. }
  569. }
  570. } else {
  571. LOG_INFO("Probing flash info for bank %d", bank->bank_number);
  572. reassign = 1;
  573. }
  574. if (!reassign)
  575. return ERROR_OK;
  576. kinfo->granularity = granularity;
  577. if ((unsigned)bank->bank_number < num_pflash_blocks) {
  578. /* pflash, banks start at address zero */
  579. kinfo->flash_class = FC_PFLASH;
  580. bank->size = (pf_size / num_pflash_blocks);
  581. bank->base = 0x00000000 + bank->size * bank->bank_number;
  582. kinfo->sector_size = kinetis_flash_params[granularity].pflash_sector_size_bytes;
  583. kinfo->protection_size = pf_size / 32;
  584. } else if ((unsigned)bank->bank_number < num_blocks) {
  585. /* nvm, banks start at address 0x10000000 */
  586. kinfo->flash_class = FC_FLEX_NVM;
  587. bank->size = (nvm_size / num_nvm_blocks);
  588. bank->base = 0x10000000 + bank->size * (bank->bank_number - first_nvm_bank);
  589. kinfo->sector_size = kinetis_flash_params[granularity].nvm_sector_size_bytes;
  590. kinfo->protection_size = 0; /* FIXME: TODO: depends on DEPART bits, chip */
  591. } else if ((unsigned)bank->bank_number == num_blocks) {
  592. LOG_ERROR("FlexRAM support not yet implemented");
  593. return ERROR_FLASH_OPER_UNSUPPORTED;
  594. } else {
  595. LOG_ERROR("Cannot determine parameters for bank %d, only %d banks on device",
  596. bank->bank_number, num_blocks);
  597. return ERROR_FLASH_BANK_INVALID;
  598. }
  599. if (bank->sectors) {
  600. free(bank->sectors);
  601. bank->sectors = NULL;
  602. }
  603. bank->num_sectors = bank->size / kinfo->sector_size;
  604. assert(bank->num_sectors > 0);
  605. bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
  606. for (i = 0; i < bank->num_sectors; i++) {
  607. bank->sectors[i].offset = offset;
  608. bank->sectors[i].size = kinfo->sector_size;
  609. offset += kinfo->sector_size;
  610. bank->sectors[i].is_erased = -1;
  611. bank->sectors[i].is_protected = 1;
  612. }
  613. return ERROR_OK;
  614. }
  615. static int kinetis_probe(struct flash_bank *bank)
  616. {
  617. if (bank->target->state != TARGET_HALTED) {
  618. LOG_WARNING("Cannot communicate... target not halted.");
  619. return ERROR_TARGET_NOT_HALTED;
  620. }
  621. return kinetis_read_part_info(bank);
  622. }
  623. static int kinetis_auto_probe(struct flash_bank *bank)
  624. {
  625. struct kinetis_flash_bank *kinfo = bank->driver_priv;
  626. if (kinfo->sim_sdid)
  627. return ERROR_OK;
  628. return kinetis_probe(bank);
  629. }
  630. static int kinetis_info(struct flash_bank *bank, char *buf, int buf_size)
  631. {
  632. const char *bank_class_names[] = {
  633. "(ANY)", "PFlash", "FlexNVM", "FlexRAM"
  634. };
  635. struct kinetis_flash_bank *kinfo = bank->driver_priv;
  636. (void) snprintf(buf, buf_size,
  637. "%s driver for %s flash bank %s at 0x%8.8" PRIx32 "",
  638. bank->driver->name, bank_class_names[kinfo->flash_class],
  639. bank->name, bank->base);
  640. return ERROR_OK;
  641. }
  642. static int kinetis_blank_check(struct flash_bank *bank)
  643. {
  644. struct kinetis_flash_bank *kinfo = bank->driver_priv;
  645. if (bank->target->state != TARGET_HALTED) {
  646. LOG_ERROR("Target not halted");
  647. return ERROR_TARGET_NOT_HALTED;
  648. }
  649. if (kinfo->flash_class == FC_PFLASH) {
  650. int result;
  651. uint8_t ftfx_fstat;
  652. /* check if whole bank is blank */
  653. result = kinetis_ftfx_command(bank, FTFx_CMD_BLOCKSTAT, bank->base, 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
  654. if (result != ERROR_OK)
  655. return result;
  656. if (ftfx_fstat & 0x01) {
  657. /* the whole bank is not erased, check sector-by-sector */
  658. int i;
  659. for (i = 0; i < bank->num_sectors; i++) {
  660. /* normal margin */
  661. result = kinetis_ftfx_command(bank, FTFx_CMD_SECTSTAT, bank->base + bank->sectors[i].offset,
  662. 1, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
  663. if (result == ERROR_OK) {
  664. bank->sectors[i].is_erased = !(ftfx_fstat & 0x01);
  665. } else {
  666. LOG_DEBUG("Ignoring errored PFlash sector blank-check");
  667. bank->sectors[i].is_erased = -1;
  668. }
  669. }
  670. } else {
  671. /* the whole bank is erased, update all sectors */
  672. int i;
  673. for (i = 0; i < bank->num_sectors; i++)
  674. bank->sectors[i].is_erased = 1;
  675. }
  676. } else {
  677. LOG_WARNING("kinetis_blank_check not supported yet for FlexNVM");
  678. return ERROR_FLASH_OPERATION_FAILED;
  679. }
  680. return ERROR_OK;
  681. }
  682. static int kinetis_flash_read(struct flash_bank *bank,
  683. uint8_t *buffer, uint32_t offset, uint32_t count)
  684. {
  685. LOG_WARNING("kinetis_flash_read not supported yet");
  686. if (bank->target->state != TARGET_HALTED) {
  687. LOG_ERROR("Target not halted");
  688. return ERROR_TARGET_NOT_HALTED;
  689. }
  690. return ERROR_FLASH_OPERATION_FAILED;
  691. }
  692. struct flash_driver kinetis_flash = {
  693. .name = "kinetis",
  694. .flash_bank_command = kinetis_flash_bank_command,
  695. .erase = kinetis_erase,
  696. .protect = kinetis_protect,
  697. .write = kinetis_write,
  698. .read = kinetis_flash_read,
  699. .probe = kinetis_probe,
  700. .auto_probe = kinetis_auto_probe,
  701. .erase_check = kinetis_blank_check,
  702. .protect_check = kinetis_protect_check,
  703. .info = kinetis_info,
  704. };