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  1. \input texinfo @c -*-texinfo-*-
  2. @c %**start of header
  3. @setfilename
  4. @settitle Open On-Chip Debugger (openocd)
  5. @dircategory Development
  6. @direntry
  7. * OpenOCD: (openocd). Open On-Chip Debugger.
  8. @end direntry
  9. @c %**end of header
  10. @include version.texi
  11. @copying
  12. Copyright @copyright{} 2007-2008 Spen @email{}
  13. @quotation
  14. Permission is granted to copy, distribute and/or modify this document
  15. under the terms of the GNU Free Documentation License, Version 1.2 or
  16. any later version published by the Free Software Foundation; with no
  17. Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
  18. Texts. A copy of the license is included in the section entitled ``GNU
  19. Free Documentation License''.
  20. @end quotation
  21. @end copying
  22. @titlepage
  23. @title Open On-Chip Debugger (openocd)
  24. @subtitle Edition @value{EDITION} for openocd version @value{VERSION}
  25. @subtitle @value{UPDATED}
  26. @page
  27. @vskip 0pt plus 1filll
  28. @insertcopying
  29. @end titlepage
  30. @contents
  31. @node Top, About, , (dir)
  32. @top OpenOCD
  33. This manual documents edition @value{EDITION} of the Open On-Chip Debugger
  34. (openocd) version @value{VERSION}, @value{UPDATED}.
  35. @insertcopying
  36. @menu
  37. * About:: About Openocd.
  38. * Developers:: Openocd developers
  39. * Building:: Building Openocd
  40. * Running:: Running Openocd
  41. * Configuration:: Openocd Configuration.
  42. * Commands:: Openocd Commands
  43. * Sample Scripts:: Sample Target Scripts
  44. * GDB and Openocd:: Using GDB and Openocd
  45. * FAQ:: Frequently Asked Questions
  46. * License:: GNU Free Documentation License
  47. * Index:: Main index.
  48. @end menu
  49. @node About
  50. @unnumbered About
  51. @cindex about
  52. The Open On-Chip Debugger (openocd) aims to provide debugging, in-system programming
  53. and boundary-scan testing for embedded target devices. The targets are interfaced
  54. using JTAG (IEEE 1149.1) compliant hardware, but this may be extended to other
  55. connection types in the future.
  56. Openocd currently supports Wiggler (clones), FTDI FT2232 based JTAG interfaces, the
  57. Amontec JTAG Accelerator, and the Gateworks GW1602. It allows ARM7 (ARM7TDMI and ARM720t),
  58. ARM9 (ARM920t, ARM922t, ARM926ej--s, ARM966e--s), XScale (PXA25x, IXP42x) and
  59. Cortex-M3 (Luminary Stellaris LM3 and ST STM32) based cores to be debugged.
  60. Flash writing is supported for external CFI compatible flashes (Intel and AMD/Spansion
  61. command set) and several internal flashes (LPC2000, AT91SAM7, STR7x, STR9x, LM3
  62. and STM32x). Preliminary support for using the LPC3180's NAND flash controller is included.
  63. @node Developers
  64. @chapter Developers
  65. @cindex developers
  66. Openocd has been created by Dominic Rath as part of a diploma thesis written at the
  67. University of Applied Sciences Augsburg (@uref{}).
  68. Others interested in improving the state of free and open debug and testing technology
  69. are welcome to participate.
  70. Other developers have contributed support for additional targets and flashes as well
  71. as numerous bugfixes and enhancements. See the AUTHORS file for regular contributors.
  72. @node Building
  73. @chapter Building
  74. @cindex building openocd
  75. You can download the current SVN version with SVN client of your choice from the
  76. following repositories:
  77. (@uref{svn://})
  78. or
  79. (@uref{})
  80. Using the SVN command line client, you could use the following command to fetch the
  81. latest version (make sure there is no (non-svn) directory called "openocd" in the
  82. current directory):
  83. @smallexample
  84. svn checkout svn:// openocd
  85. @end smallexample
  86. Building the OpenOCD requires a recent version of the GNU autotools.
  87. On my build system, I'm using autoconf 2.13 and automake 1.9. For building on Windows,
  88. you have to use Cygwin. Make sure that your @env{PATH} environment variable contains no
  89. other locations with Unix utils (like UnxUtils) - these can't handle the Cygwin
  90. paths, resulting in obscure dependency errors (This is an observation I've gathered
  91. from the logs of one user - correct me if I'm wrong).
  92. You further need the appropriate driver files, if you want to build support for
  93. a FTDI FT2232 based interface:
  94. @itemize @bullet
  95. @item @b{ftdi2232} libftdi (@uref{})
  96. @item @b{ftd2xx} libftd2xx (@uref{})
  97. @item When using the Amontec JTAGkey, you have to get the drivers from the Amontec
  98. homepage (@uref{}), as the JTAGkey uses a non-standard VID/PID.
  99. @end itemize
  100. Please note that the ftdi2232 variant (using libftdi) isn't supported under Cygwin.
  101. You have to use the ftd2xx variant (using FTDI's D2XX) on Cygwin.
  102. In general, the D2XX driver provides superior performance (several times as fast),
  103. but has the draw-back of being binary-only - though that isn't as worse, as it isn't
  104. a kernel module, only a user space library.
  105. To build OpenOCD (on both Linux and Cygwin), use the following commands:
  106. @smallexample
  107. ./bootstrap
  108. @end smallexample
  109. Bootstrap generates the configure script, and prepares building on your system.
  110. @smallexample
  111. ./configure
  112. @end smallexample
  113. Configure generates the Makefiles used to build OpenOCD.
  114. @smallexample
  115. make
  116. @end smallexample
  117. Make builds the OpenOCD, and places the final executable in ./src/.
  118. The configure script takes several options, specifying which JTAG interfaces
  119. should be included:
  120. @itemize @bullet
  121. @item
  122. @option{--enable-parport}
  123. @item
  124. @option{--enable-parport_ppdev}
  125. @item
  126. @option{--enable-amtjtagaccel}
  127. @item
  128. @option{--enable-ft2232_ftd2xx}
  129. @footnote{Using the latest D2XX drivers from FTDI and following their installation
  130. instructions, I had to use @option{--enable-ft2232_libftd2xx} for the OpenOCD to
  131. build properly.}
  132. @item
  133. @option{--enable-ft2232_libftdi}
  134. @item
  135. @option{--with-ftd2xx=/path/to/d2xx/}
  136. @end itemize
  137. If you want to access the parallel port using the PPDEV interface you have to specify
  138. both the @option{--enable-parport} AND the @option{--enable-parport_ppdev} option since
  139. the @option{--enable-parport_ppdev} option actually is an option to the parport driver
  140. (see @uref{} for more info).
  141. Cygwin users have to specify the location of the FTDI D2XX package. This should be an
  142. absolute path containing no spaces.
  143. Linux users should copy the various parts of the D2XX package to the appropriate
  144. locations, i.e. /usr/include, /usr/lib.
  145. @node Running
  146. @chapter Running
  147. @cindex running openocd
  148. @cindex --configfile
  149. @cindex --debug_level
  150. @cindex --logfile
  151. @cindex --search
  152. The OpenOCD runs as a daemon, waiting for connections from clients (Telnet or GDB).
  153. Run with @option{--help} or @option{-h} to view the available command line arguments.
  154. It reads its configuration by default from the file openocd.cfg located in the current
  155. working directory. This may be overwritten with the @option{-f <configfile>} command line
  156. switch.
  157. To enable debug output (when reporting problems or working on OpenOCD itself), use
  158. the @option{-d} command line switch. This sets the debug_level to "3", outputting
  159. the most information, including debug messages. The default setting is "2", outputting
  160. only informational messages, warnings and errors. You can also change this setting
  161. from within a telnet or gdb session (@option{debug_level <n>}).
  162. You can redirect all output from the daemon to a file using the @option{-l <logfile>} switch.
  163. Search paths for config/script files can be added to openocd by using
  164. the @option{-s <search>} switch.
  165. @node Configuration
  166. @chapter Configuration
  167. @cindex configuration
  168. The Open On-Chip Debugger (OpenOCD) runs as a daemon, and reads it current configuration
  169. by default from the file openocd.cfg in the current directory. A different configuration
  170. file can be specified with the @option{-f <conf.file>} given at the openocd command line.
  171. The configuration file is used to specify on which ports the daemon listens for new
  172. connections, the JTAG interface used to connect to the target, the layout of the JTAG
  173. chain, the targets that should be debugged, and connected flashes.
  174. @section Daemon configuration
  175. @itemize @bullet
  176. @item @b{telnet_port} <@var{number}>
  177. @cindex telnet_port
  178. Port on which to listen for incoming telnet connections
  179. @item @b{gdb_port} <@var{number}>
  180. @cindex gdb_port
  181. First port on which to listen for incoming GDB connections. The GDB port for the
  182. first target will be gdb_port, the second target will listen on gdb_port + 1, and so on.
  183. @item @b{gdb_detach} <@var{resume|reset|halt|nothing}>
  184. @cindex gdb_detach
  185. Configures what openocd will do when gdb detaches from the daeman.
  186. Default behaviour is <@var{resume}>
  187. @item @b{gdb_memory_map} <@var{enable|disable}>
  188. @cindex gdb_memory_map
  189. Set to <@var{enable}> so that openocd will send the memory configuration to gdb when
  190. requested. gdb will then know when to set hardware breakpoints, and program flash
  191. using the gdb load command. @option{gdb_flash_program enable} will also need enabling
  192. for flash programming to work.
  193. Default behaviour is <@var{disable}>
  194. @item @b{gdb_flash_program} <@var{enable|disable}>
  195. @cindex gdb_flash_program
  196. Set to <@var{enable}> so that openocd will program the flash memory when a
  197. vFlash packet is received.
  198. Default behaviour is <@var{disable}>
  199. @item @b{daemon_startup} <@var{mode}> either @samp{attach} or @samp{reset}
  200. @cindex daemon_startup
  201. Tells the OpenOCD whether it should reset the target when the daemon is launched, or
  202. if it should just attach to the target.
  203. @end itemize
  204. @section JTAG interface configuration
  205. @itemize @bullet
  206. @item @b{interface} <@var{name}>
  207. @cindex interface
  208. Use the interface driver <@var{name}> to connect to the target. Currently supported
  209. interfaces are
  210. @itemize @minus
  211. @item parport
  212. PC parallel port bit-banging (Wigglers, PLD download cable, ...)
  213. @end itemize
  214. @itemize @minus
  215. @item amt_jtagaccel
  216. Amontec Chameleon in its JTAG Accelerator configuration connected to a PC's EPP
  217. mode parallel port
  218. @end itemize
  219. @itemize @minus
  220. @item ft2232
  221. FTDI FT2232 based devices using either the open-source libftdi or the binary only
  222. FTD2XX driver. The FTD2XX is superior in performance, but not available on every
  223. platform. The libftdi uses libusb, and should be portable to all systems that provide
  224. libusb.
  225. @end itemize
  226. @itemize @minus
  227. @item ep93xx
  228. Cirrus Logic EP93xx based single-board computer bit-banging (in development)
  229. @end itemize
  230. @end itemize
  231. @itemize @bullet
  232. @item @b{jtag_speed} <@var{number}>
  233. @cindex jtag_speed
  234. Limit the maximum speed of the JTAG interface. Usually, a value of zero means maximum
  235. speed. The actual effect of this option depends on the JTAG interface used.
  236. @itemize @minus
  237. @item wiggler: maximum speed / @var{number}
  238. @item ft2232: 6MHz / (@var{number}+1)
  239. @item amt jtagaccel: 8 / 2**@var{number}
  240. @end itemize
  241. Note: Make sure the jtag clock is no more than @math{1/6th × CPU-Clock}. This is
  242. especially true for synthesized cores (-S).
  243. @item @b{reset_config} <@var{signals}> [@var{combination}] [@var{trst_type}] [@var{srst_type}]
  244. @cindex reset_config
  245. The configuration of the reset signals available on the JTAG interface AND the target.
  246. If the JTAG interface provides SRST, but the target doesn't connect that signal properly,
  247. then OpenOCD can't use it. <@var{signals}> can be @samp{none}, @samp{trst_only},
  248. @samp{srst_only} or @samp{trst_and_srst}.
  249. [@var{combination}] is an optional value specifying broken reset signal implementations.
  250. @samp{srst_pulls_trst} states that the testlogic is reset together with the reset of
  251. the system (e.g. Philips LPC2000, "broken" board layout), @samp{trst_pulls_srst} says
  252. that the system is reset together with the test logic (only hypothetical, I haven't
  253. seen hardware with such a bug, and can be worked around).
  254. The [@var{trst_type}] and [@var{srst_type}] parameters allow the driver type of the
  255. reset lines to be specified. Possible values are @samp{trst_push_pull} (default)
  256. and @samp{trst_open_drain} for the test reset signal, and @samp{srst_open_drain}
  257. (default) and @samp{srst_push_pull} for the system reset. These values only affect
  258. JTAG interfaces with support for different drivers, like the Amontec JTAGkey and JTAGAccelerator.
  259. @item @b{jtag_device} <@var{IR length}> <@var{IR capture}> <@var{IR mask}> <@var{IDCODE instruction}>
  260. @cindex jtag_device
  261. Describes the devices that form the JTAG daisy chain, with the first device being
  262. the one closest to TDO. The parameters are the length of the instruction register
  263. (4 for all ARM7/9s), the value captured during Capture-IR (0x1 for ARM7/9), and a mask
  264. of bits that should be validated when doing IR scans (all four bits (0xf) for ARM7/9).
  265. The IDCODE instruction will in future be used to query devices for their JTAG
  266. identification code. This line is the same for all ARM7 and ARM9 devices.
  267. Other devices, like CPLDs, require different parameters. An example configuration
  268. line for a Xilinx XC9500 CPLD would look like this:
  269. @smallexample
  270. jtag_device 8 0x01 0x0e3 0xfe
  271. @end smallexample
  272. The instruction register (IR) is 8 bits long, during Capture-IR 0x01 is loaded into
  273. the IR, but only bits 0-1 and 5-7 should be checked, the others (2-4) might vary.
  274. The IDCODE instruction is 0xfe.
  275. @item @b{jtag_nsrst_delay} <@var{ms}>
  276. @cindex jtag_nsrst_delay
  277. How long (in miliseconds) the OpenOCD should wait after deasserting nSRST before
  278. starting new JTAG operations.
  279. @item @b{jtag_ntrst_delay} <@var{ms}>
  280. @cindex jtag_ntrst_delay
  281. How long (in miliseconds) the OpenOCD should wait after deasserting nTRST before
  282. starting new JTAG operations.
  283. The jtag_n[st]rst_delay options are useful if reset circuitry (like a reset supervisor,
  284. or on-chip features) keep a reset line asserted for some time after the external reset
  285. got deasserted.
  286. @end itemize
  287. @section parport options
  288. @itemize @bullet
  289. @item @b{parport_port} <@var{number}>
  290. @cindex parport_port
  291. Either the address of the I/O port (default: 0x378 for LPT1) or the number of
  292. the @file{/dev/parport} device
  293. When using PPDEV to access the parallel port, use the number of the parallel port:
  294. @option{parport_port 0} (the default). If @option{parport_port 0x378} is specified
  295. you may encounter a problem.
  296. @item @b{parport_cable} <@var{name}>
  297. @cindex parport_cable
  298. The layout of the parallel port cable used to connect to the target.
  299. Currently supported cables are
  300. @itemize @minus
  301. @item wiggler
  302. @cindex wiggler
  303. Original Wiggler layout, also supported by several clones, such
  304. as the Olimex ARM-JTAG
  305. @item old_amt_wiggler
  306. @cindex old_amt_wiggler
  307. The Wiggler configuration that comes with Amontec's Chameleon Programmer. The new
  308. version available from the website uses the original Wiggler layout ('@var{wiggler}')
  309. @item chameleon
  310. @cindex chameleon
  311. Describes the connection of the Amontec Chameleon's CPLD when operated in
  312. configuration mode. This is only used to program the Chameleon itself, not
  313. a connected target.
  314. @item dlc5
  315. @cindex dlc5
  316. Xilinx Parallel cable III.
  317. @item triton
  318. @cindex triton
  319. The parallel port adapter found on the 'Karo Triton 1 Development Board'.
  320. This is also the layout used by the HollyGates design
  321. (see @uref{}).
  322. @item flashlink
  323. @cindex flashlink
  324. ST Parallel cable.
  325. @end itemize
  326. @item @b{parport_write_on_exit} <@var{on|off}>
  327. @cindex parport_write_on_exit
  328. This will configure the parallel driver to write a known value to the parallel
  329. interface on exiting openocd
  330. @end itemize
  331. @section amt_jtagaccel options
  332. @itemize @bullet
  333. @item @b{parport_port} <@var{number}>
  334. @cindex parport_port
  335. Either the address of the I/O port (default: 0x378 for LPT1) or the number of the
  336. @file{/dev/parport} device
  337. @end itemize
  338. @section ft2232 options
  339. @itemize @bullet
  340. @item @b{ft2232_device_desc} <@var{description}>
  341. @cindex ft2232_device_desc
  342. The USB device description of the FTDI FT2232 device. If not specified, the FTDI
  343. default value is used. This setting is only valid if compiled with FTD2XX support.
  344. @item @b{ft2232_layout} <@var{name}>
  345. @cindex ft2232_layout
  346. The layout of the FT2232 GPIO signals used to control output-enables and reset
  347. signals. Valid layouts are
  348. @itemize @minus
  349. @item usbjtag
  350. The "USBJTAG-1" layout described in the original OpenOCD diploma thesis
  351. @item jtagkey
  352. Amontec JTAGkey and JTAGkey-tiny
  353. @item signalyzer
  354. Signalyzer
  355. @item olimex-jtag
  356. Olimex ARM-USB-OCD
  357. @item m5960
  358. American Microsystems M5960
  359. @item evb_lm3s811
  360. Luminary Micro EVB_LM3S811 as a JTAG interface (not onboard processor), no TRST or
  361. SRST signals on external connector
  362. @item comstick
  363. Hitex STR9 comstick
  364. @item stm32stick
  365. Hitex STM32 Performance Stick
  366. @item flyswatter
  367. Tin Can Tools Flyswatter
  368. @item turtelizer2
  369. egnite Software turtelizer2
  370. @item oocdlink
  371. OOCDLink
  372. @end itemize
  373. @item @b{ft2232_vid_pid} <@var{vid}> <@var{pid}>
  374. The vendor ID and product ID of the FTDI FT2232 device. If not specified, the FTDI
  375. default values are used. This command is not available on Windows.
  376. @item @b{ft2232_latency} <@var{ms}>
  377. On some systems using ft2232 based JTAG interfaces the FT_Read function call in
  378. ft2232_read() fails to return the expected number of bytes. This can be caused by
  379. USB communication delays and has proved hard to reproduce and debug. Setting the
  380. FT2232 latency timer to a larger value increases delays for short USB packages but it
  381. also reduces the risk of timeouts before receiving the expected number of bytes.
  382. The OpenOCD default value is 2 and for some systems a value of 10 has proved useful.
  383. @end itemize
  384. @section ep93xx options
  385. @cindex ep93xx options
  386. Currently, there are no options available for the ep93xx interface.
  387. @page
  388. @section Target configuration
  389. @itemize @bullet
  390. @item @b{target} <@var{type}> <@var{endianess}> <@var{reset_mode}> <@var{JTAG pos}>
  391. <@var{variant}>
  392. @cindex target
  393. Defines a target that should be debugged. Currently supported types are:
  394. @itemize @minus
  395. @item arm7tdmi
  396. @item arm720t
  397. @item arm9tdmi
  398. @item arm920t
  399. @item arm922t
  400. @item arm926ejs
  401. @item arm966e
  402. @item cortex_m3
  403. @item feroceon
  404. @item xscale
  405. @end itemize
  406. If you want to use a target board that is not on this list, see Adding a new
  407. target board
  408. Endianess may be @option{little} or @option{big}.
  409. The reset_mode specifies what should happen to the target when a reset occurs:
  410. @itemize @minus
  411. @item reset_halt
  412. @cindex reset_halt
  413. Immediately request a target halt after reset. This allows targets to be debugged
  414. from the very first instruction. This is only possible with targets and JTAG
  415. interfaces that correctly implement the reset signals.
  416. @item reset_init
  417. @cindex reset_init
  418. Similar to @option{reset_halt}, but executes the script file defined to handle the
  419. 'reset' event for the target. Like @option{reset_halt} this only works with
  420. correct reset implementations.
  421. @item reset_run
  422. @cindex reset_run
  423. Simply let the target run after a reset.
  424. @item run_and_halt
  425. @cindex run_and_halt
  426. Let the target run for some time (default: 1s), and then request halt.
  427. @item run_and_init
  428. @cindex run_and_init
  429. A combination of @option{reset_init} and @option{run_and_halt}. The target is allowed
  430. to run for some time, then halted, and the @option{reset} event script is executed.
  431. @end itemize
  432. On JTAG interfaces / targets where system reset and test-logic reset can't be driven
  433. completely independent (like the LPC2000 series), or where the JTAG interface is
  434. unavailable for some time during startup (like the STR7 series), you can't use
  435. @option{reset_halt} or @option{reset_init}.
  436. @item @b{target_script} <@var{target#}> <@var{event}> <@var{script_file}>
  437. @cindex target_script
  438. Event is either @option{reset}, @option{post_halt}, @option{pre_resume} or @option{gdb_program_config}
  439. TODO: describe exact semantic of events
  440. @item @b{run_and_halt_time} <@var{target#}> <@var{time_in_ms}>
  441. @cindex run_and_halt_time
  442. The amount of time the debugger should wait after releasing reset before it asserts
  443. a debug request. This is used by the @option{run_and_halt} and @option{run_and_init}
  444. reset modes.
  445. @item @b{working_area} <@var{target#}> <@var{address}> <@var{size}>
  446. <@var{backup}|@var{nobackup}>
  447. @cindex working_area
  448. Specifies a working area for the debugger to use. This may be used to speed-up
  449. downloads to target memory and flash operations, or to perform otherwise unavailable
  450. operations (some coprocessor operations on ARM7/9 systems, for example). The last
  451. parameter decides whether the memory should be preserved <@var{backup}>. If possible, use
  452. a working_area that doesn't need to be backed up, as that slows down operation.
  453. @end itemize
  454. @subsection arm7tdmi options
  455. @cindex arm7tdmi options
  456. target arm7tdmi <@var{endianess}> <@var{reset_mode}> <@var{jtag#}>
  457. The arm7tdmi target definition requires at least one additional argument, specifying
  458. the position of the target in the JTAG daisy-chain. The first JTAG device is number 0.
  459. The optional [@var{variant}] parameter has been removed in recent versions.
  460. The correct feature set is determined at runtime.
  461. @subsection arm720t options
  462. @cindex arm720t options
  463. ARM720t options are similar to ARM7TDMI options.
  464. @subsection arm9tdmi options
  465. @cindex arm9tdmi options
  466. ARM9TDMI options are similar to ARM7TDMI options. Supported variants are
  467. @option{arm920t}, @option{arm922t} and @option{arm940t}.
  468. This enables the hardware single-stepping support found on these cores.
  469. @subsection arm920t options
  470. @cindex arm920t options
  471. ARM920t options are similar to ARM9TDMI options.
  472. @subsection arm966e options
  473. @cindex arm966e options
  474. ARM966e options are similar to ARM9TDMI options.
  475. @subsection xscale options
  476. @cindex xscale options
  477. Supported variants are @option{ixp42x}, @option{ixp45x}, @option{ixp46x},
  478. @option{pxa250}, @option{pxa255}, @option{pxa26x}.
  479. @section Flash configuration
  480. @cindex Flash configuration
  481. @itemize @bullet
  482. @item @b{flash bank} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}>
  483. <@var{bus_width}> <@var{target#}> [@var{driver_options ...}]
  484. @cindex flash bank
  485. Configures a flash bank at <@var{base}> of <@var{size}> bytes and <@var{chip_width}>
  486. and <@var{bus_width}> bytes using the selected flash <driver>.
  487. @item @b{flash auto_erase} <@option{on}|@option{off}>
  488. @cindex flash auto_erase
  489. auto erase flash banks prior to writing. Currently only works when using
  490. @option{flash write_image} command. Default is @option{off}.
  491. @end itemize
  492. @subsection lpc2000 options
  493. @cindex lpc2000 options
  494. @b{flash bank lpc2000} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
  495. <@var{clock}> [@var{calc_checksum}]
  496. LPC flashes don't require the chip and bus width to be specified. Additional
  497. parameters are the <@var{variant}>, which may be @var{lpc2000_v1} (older LPC21xx and LPC22xx)
  498. or @var{lpc2000_v2} (LPC213x, LPC214x, LPC210[123], LPC23xx and LPC24xx), the number
  499. of the target this flash belongs to (first is 0), the frequency at which the core
  500. is currently running (in kHz - must be an integral number), and the optional keyword
  501. @var{calc_checksum}, telling the driver to calculate a valid checksum for the exception
  502. vector table.
  503. @subsection cfi options
  504. @cindex cfi options
  505. @b{flash bank cfi} <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}>
  506. <@var{target#}>
  507. CFI flashes require the number of the target they're connected to as an additional
  508. argument. The CFI driver makes use of a working area (specified for the target)
  509. to significantly speed up operation.
  510. @var{chip_width} and @var{bus_width} are specified in bytes.
  511. @subsection at91sam7 options
  512. @cindex at91sam7 options
  513. @b{flash bank at91sam7} 0 0 0 0 <@var{target#}>
  514. AT91SAM7 flashes only require the @var{target#}, all other values are looked up after
  515. reading the chip-id and type.
  516. @subsection str7 options
  517. @cindex str7 options
  518. @b{flash bank str7x} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
  519. variant can be either STR71x, STR73x or STR75x.
  520. @subsection str9 options
  521. @cindex str9 options
  522. @b{flash bank str9x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
  523. The str9 needs the flash controller to be configured prior to Flash programming, eg.
  524. @smallexample
  525. str9x flash_config 0 4 2 0 0x80000
  526. @end smallexample
  527. This will setup the BBSR, NBBSR, BBADR and NBBADR registers respectively.
  528. @subsection str9 options (str9xpec driver)
  529. @b{flash bank str9xpec} <@var{base}> <@var{size}> 0 0 <@var{target#}>
  530. Before using the flash commands the turbo mode will need enabling using str9xpec
  531. @option{enable_turbo} <@var{num>.}
  532. Only use this driver for locking/unlocking the device or configuring the option bytes.
  533. Use the standard str9 driver for programming.
  534. @subsection stellaris (LM3Sxxx) options
  535. @cindex stellaris (LM3Sxxx) options
  536. @b{flash bank stellaris} <@var{base}> <@var{size}> 0 0 <@var{target#}>
  537. stellaris flash plugin only require the @var{target#}.
  538. @subsection stm32x options
  539. @cindex stm32x options
  540. @b{flash bank stm32x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
  541. stm32x flash plugin only require the @var{target#}.
  542. @node Commands
  543. @chapter Commands
  544. @cindex commands
  545. The Open On-Chip Debugger (OpenOCD) allows user interaction through a telnet interface
  546. (default: port 4444) and a GDB server (default: port 3333). The command line interpreter
  547. is available from both the telnet interface and a GDB session. To issue commands to the
  548. interpreter from within a GDB session, use the @option{monitor} command, e.g. use
  549. @option{monitor poll} to issue the @option{poll} command. All output is relayed through the
  550. GDB session.
  551. @section Daemon
  552. @itemize @bullet
  553. @item @b{sleep} <@var{msec}>
  554. @cindex sleep
  555. Wait for n milliseconds before resuming. Useful in connection with script files
  556. (@var{script} command and @var{target_script} configuration).
  557. @item @b{shutdown}
  558. @cindex shutdown
  559. Close the OpenOCD daemon, disconnecting all clients (GDB, Telnet).
  560. @item @b{debug_level} [@var{n}]
  561. @cindex debug_level
  562. Display or adjust debug level to n<0-3>
  563. @item @b{log_output} <@var{file}>
  564. @cindex log_output
  565. Redirect logging to <file> (default: stderr)
  566. @item @b{script} <@var{file}>
  567. @cindex script
  568. Execute commands from <file>
  569. @end itemize
  570. @subsection Target state handling
  571. @itemize @bullet
  572. @item @b{poll} [@option{on}|@option{off}]
  573. @cindex poll
  574. Poll the target for its current state. If the target is in debug mode, architecture
  575. specific information about the current state are printed. An optional parameter
  576. allows continuous polling to be enabled and disabled.
  577. @item @b{halt} [@option{ms}]
  578. @cindex halt
  579. Send a halt request to the target and waits for it to halt for [@option{ms}].
  580. Default [@option{ms}] is 5 seconds if no arg given.
  581. Optional arg @option{ms} is a timeout in milliseconds. Using 0 as the [@option{ms}]
  582. will stop openocd from waiting.
  583. @item @b{wait_halt} [@option{ms}]
  584. @cindex wait_halt
  585. Wait for the target to enter debug mode. Optional [@option{ms}] is
  586. a timeout in milliseconds. Default [@option{ms}] is 5 seconds if no
  587. arg given.
  588. @item @b{resume} [@var{address}]
  589. @cindex resume
  590. Resume the target at its current code position, or at an optional address.
  591. Openocd will wait 5 seconds for the target to resume.
  592. @item @b{step} [@var{address}]
  593. @cindex step
  594. Single-step the target at its current code position, or at an optional address.
  595. @item @b{reset} [@option{run}|@option{halt}|@option{init}|@option{run_and_halt}
  596. |@option{run_and_init}]
  597. @cindex reset
  598. Do a hard-reset. The optional parameter specifies what should happen after the reset.
  599. This optional parameter overwrites the setting specified in the configuration file,
  600. making the new behaviour the default for the @option{reset} command.
  601. @itemize @minus
  602. @item run
  603. @cindex reset run
  604. Let the target run.
  605. @item halt
  606. @cindex reset halt
  607. Immediately halt the target (works only with certain configurations).
  608. @item init
  609. @cindex reset init
  610. Immediately halt the target, and execute the reset script (works only with certain
  611. configurations)
  612. @item run_and_halt
  613. @cindex reset run_and_halt
  614. Let the target run for a certain amount of time, then request a halt.
  615. @item run_and_init
  616. @cindex reset run_and_init
  617. Let the target run for a certain amount of time, then request a halt. Execute the
  618. reset script once the target entered debug mode.
  619. @end itemize
  620. @end itemize
  621. @subsection Memory access commands
  622. These commands allow accesses of a specific size to the memory system:
  623. @itemize @bullet
  624. @item @b{mdw} <@var{addr}> [@var{count}]
  625. @cindex mdw
  626. display memory words
  627. @item @b{mdh} <@var{addr}> [@var{count}]
  628. @cindex mdh
  629. display memory half-words
  630. @item @b{mdb} <@var{addr}> [@var{count}]
  631. @cindex mdb
  632. display memory bytes
  633. @item @b{mww} <@var{addr}> <@var{value}>
  634. @cindex mww
  635. write memory word
  636. @item @b{mwh} <@var{addr}> <@var{value}>
  637. @cindex mwh
  638. write memory half-word
  639. @item @b{mwb} <@var{addr}> <@var{value}>
  640. @cindex mwb
  641. write memory byte
  642. @item @b{load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
  643. @cindex load_image
  644. Load image <@var{file}> to target memory at <@var{address}>
  645. @item @b{dump_image} <@var{file}> <@var{address}> <@var{size}>
  646. @cindex dump_image
  647. Dump <@var{size}> bytes of target memory starting at <@var{address}> to a
  648. (binary) <@var{file}>.
  649. @item @b{verify_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
  650. @cindex verify_image
  651. Verify <@var{file}> to target memory starting at <@var{address}>.
  652. This will first attempt using a crc checksum, if this fails it will try a binary compare.
  653. @item @b{load_binary} <@var{file}> <@var{address}> [DEPRECATED]
  654. @cindex load_binary
  655. Load binary <@var{file}> to target memory at <@var{address}>
  656. @item @b{dump_binary} <@var{file}> <@var{address}> <@var{size}> [DEPRECATED]
  657. @cindex dump_binary
  658. Dump <@var{size}> bytes of target memory starting at <@var{address}> to a
  659. (binary) <@var{file}>.
  660. @end itemize
  661. @subsection Flash commands
  662. @cindex Flash commands
  663. @itemize @bullet
  664. @item @b{flash banks}
  665. @cindex flash banks
  666. List configured flash banks
  667. @item @b{flash info} <@var{num}>
  668. @cindex flash info
  669. Print info about flash bank <@option{num}>
  670. @item @b{flash probe} <@var{num}>
  671. @cindex flash probe
  672. Identify the flash, or validate the parameters of the configured flash. Operation
  673. depends on the flash type.
  674. @item @b{flash erase_check} <@var{num}>
  675. @cindex flash erase_check
  676. Check erase state of sectors in flash bank <@var{num}>. This is the only operation that
  677. updates the erase state information displayed by @option{flash info}. That means you have
  678. to issue an @option{erase_check} command after erasing or programming the device to get
  679. updated information.
  680. @item @b{flash protect_check} <@var{num}>
  681. @cindex flash protect_check
  682. Check protection state of sectors in flash bank <num>.
  683. @item @b{flash erase} <@var{num}> <@var{first}> <@var{last}> [DEPRECATED]
  684. @cindex flash erase
  685. Erase sectors at bank <@var{num}>, starting at sector <@var{first}> up to and including
  686. <@var{last}>. Sector numbering starts at 0. Depending on the flash type, erasing might
  687. require the protection to be disabled first (e.g. Intel Advanced Bootblock flash using
  688. the CFI driver). This command was replaced by the new command
  689. @option{flash erase_sector} using the same syntax.
  690. @item @b{flash erase_sector} <@var{num}> <@var{first}> <@var{last}>
  691. @cindex flash erase_sector
  692. Erase sectors at bank <@var{num}>, starting at sector <@var{first}> up to and including
  693. <@var{last}>. Sector numbering starts at 0. Depending on the flash type, erasing might
  694. require the protection to be disabled first (e.g. Intel Advanced Bootblock flash using
  695. the CFI driver).
  696. @item @b{flash erase_address} <@var{address}> <@var{length}>
  697. @cindex flash erase_address
  698. Erase sectors starting at <@var{address}> for <@var{length}> number of bytes
  699. @item @b{flash write} <@var{num}> <@var{file}> <@var{offset}> [DEPRECATED]
  700. @cindex flash write
  701. Write the binary <@var{file}> to flash bank <@var{num}>, starting at <@var{offset}>
  702. bytes from the beginning of the bank. This command was replaced by the new command
  703. @option{flash write_binary} using the same syntax.
  704. @item @b{flash write_binary} <@var{num}> <@var{file}> <@var{offset}>
  705. @cindex flash write_binary
  706. Write the binary <@var{file}> to flash bank <@var{num}>, starting at
  707. <@option{offset}> bytes from the beginning of the bank.
  708. @item @b{flash write_image} <@var{file}> [@var{offset}] [@var{type}]
  709. @cindex flash write_image
  710. Write the image <@var{file}> to the current target's flash bank(s). A relocation
  711. [@var{offset}] can be specified and the file [@var{type}] can be specified
  712. explicitly as @option{bin} (binary), @option{ihex} (Intel hex), @option{elf}
  713. (ELF file) or @option{s19} (Motorola s19).
  714. @item @b{flash protect} <@var{num}> <@var{first}> <@var{last}> <@option{on}|@option{off}>
  715. @cindex flash protect
  716. Enable (@var{on}) or disable (@var{off}) protection of flash sectors <@var{first}> to
  717. <@var{last}> of @option{flash bank} <@var{num}>.
  718. @item @b{flash auto_erase} <@var{on}|@var{off}>
  719. @cindex flash auto_erase
  720. Enable (@option{on}) to erase flash banks prior to writing using the flash @option{write_image} command
  721. only. Default is (@option{off}), flash banks have to be erased using @option{flash erase} command.
  722. @end itemize
  723. @page
  724. @section Target Specific Commands
  725. @cindex Target Specific Commands
  726. @subsection AT91SAM7 specific commands
  727. @cindex AT91SAM7 specific commands
  728. The flash configuration is deduced from the chip identification register. The flash
  729. controller handles erases automatically on a page (128/265 byte) basis so erase is
  730. not necessary for flash programming. AT91SAM7 processors with less than 512K flash
  731. only have a single flash bank embedded on chip. AT91SAM7xx512 have two flash planes
  732. that can be erased separatly.Only an EraseAll command is supported by the controller
  733. for each flash plane and this is called with
  734. @itemize @bullet
  735. @item @b{flash erase} <@var{num}> @var{first_plane} @var{last_plane}
  736. bulk erase flash planes first_plane to last_plane.
  737. @item @b{at91sam7 gpnvm} <@var{num}> <@var{bit}> <@option{set}|@option{clear}>
  738. @cindex at91sam7 gpnvm
  739. set or clear a gpnvm bit for the processor
  740. @end itemize
  741. @subsection STR9 specific commands
  742. @cindex STR9 specific commands
  743. These are flash specific commands when using the str9xpec driver.
  744. @itemize @bullet
  745. @item @b{str9xpec enable_turbo} <@var{num}>
  746. @cindex str9xpec enable_turbo
  747. enable turbo mode, simply this will remove the str9 from the chain and talk
  748. directly to the embedded flash controller.
  749. @item @b{str9xpec disable_turbo} <@var{num}>
  750. @cindex str9xpec disable_turbo
  751. restore the str9 into jtag chain.
  752. @item @b{str9xpec lock} <@var{num}>
  753. @cindex str9xpec lock
  754. lock str9 device. The str9 will only respond to an unlock command that will
  755. erase the device.
  756. @item @b{str9xpec unlock} <@var{num}>
  757. @cindex str9xpec unlock
  758. unlock str9 device.
  759. @item @b{str9xpec options_read} <@var{num}>
  760. @cindex str9xpec options_read
  761. read str9 option bytes.
  762. @item @b{str9xpec options_write} <@var{num}>
  763. @cindex str9xpec options_write
  764. write str9 option bytes.
  765. @end itemize
  766. @subsection STR9 configuration
  767. @cindex STR9 configuration
  768. @itemize @bullet
  769. @item @b{str9x flash_config} <@var{bank}> <@var{BBSR}> <@var{NBBSR}>
  770. <@var{BBADR}> <@var{NBBADR}>
  771. @cindex str9x flash_config
  772. Configure str9 flash controller.
  773. @smallexample
  774. eg. str9x flash_config 0 4 2 0 0x80000
  775. This will setup
  776. BBSR - Boot Bank Size register
  777. NBBSR - Non Boot Bank Size register
  778. BBADR - Boot Bank Start Address register
  779. NBBADR - Boot Bank Start Address register
  780. @end smallexample
  781. @end itemize
  782. @subsection STR9 option byte configuration
  783. @cindex STR9 option byte configuration
  784. @itemize @bullet
  785. @item @b{str9xpec options_cmap} <@var{num}> <@option{bank0}|@option{bank1}>
  786. @cindex str9xpec options_cmap
  787. configure str9 boot bank.
  788. @item @b{str9xpec options_lvdthd} <@var{num}> <@option{2.4v}|@option{2.7v}>
  789. @cindex str9xpec options_lvdthd
  790. configure str9 lvd threshold.
  791. @item @b{str9xpec options_lvdsel} <@var{num}> <@option{vdd}|@option{vdd_vddq}>
  792. @cindex str9xpec options_lvdsel
  793. configure str9 lvd source.
  794. @item @b{str9xpec options_lvdwarn} <@var{bank}> <@option{vdd}|@option{vdd_vddq}>
  795. @cindex str9xpec options_lvdwarn
  796. configure str9 lvd reset warning source.
  797. @end itemize
  798. @subsection STM32x specific commands
  799. @cindex STM32x specific commands
  800. These are flash specific commands when using the stm32x driver.
  801. @itemize @bullet
  802. @item @b{stm32x lock} <@var{num}>
  803. @cindex stm32x lock
  804. lock stm32 device.
  805. @item @b{stm32x unlock} <@var{num}>
  806. @cindex stm32x unlock
  807. unlock stm32 device.
  808. @item @b{stm32x options_read} <@var{num}>
  809. @cindex stm32x options_read
  810. read stm32 option bytes.
  811. @item @b{stm32x options_write} <@var{num}> <@option{SWWDG}|@option{HWWDG}>
  812. <@option{RSTSTNDBY}|@option{NORSTSTNDBY}> <@option{RSTSTOP}|@option{NORSTSTOP}>
  813. @cindex stm32x options_write
  814. write stm32 option bytes.
  815. @item @b{stm32x mass_erase} <@var{num}>
  816. @cindex stm32x mass_erase
  817. mass erase flash memory.
  818. @end itemize
  819. @page
  820. @section Architecture Specific Commands
  821. @cindex Architecture Specific Commands
  822. @subsection ARMV4/5 specific commands
  823. @cindex ARMV4/5 specific commands
  824. These commands are specific to ARM architecture v4 and v5, like all ARM7/9 systems
  825. or Intel XScale (XScale isn't supported yet).
  826. @itemize @bullet
  827. @item @b{armv4_5 reg}
  828. @cindex armv4_5 reg
  829. Display a list of all banked core registers, fetching the current value from every
  830. core mode if necessary. OpenOCD versions before rev. 60 didn't fetch the current
  831. register value.
  832. @item @b{armv4_5 core_mode} [@option{arm}|@option{thumb}]
  833. @cindex armv4_5 core_mode
  834. Displays the core_mode, optionally changing it to either ARM or Thumb mode.
  835. The target is resumed in the currently set @option{core_mode}.
  836. @end itemize
  837. @subsection ARM7/9 specific commands
  838. @cindex ARM7/9 specific commands
  839. These commands are specific to ARM7 and ARM9 targets, like ARM7TDMI, ARM720t,
  840. ARM920t or ARM926EJ-S.
  841. @itemize @bullet
  842. @item @b{arm7_9 sw_bkpts} <@option{enable}|@option{disable}>
  843. @cindex arm7_9 sw_bkpts
  844. Enable/disable use of software breakpoints. On ARMv4 systems, this reserves
  845. one of the watchpoint registers to implement software breakpoints. Disabling
  846. SW Bkpts frees that register again.
  847. @item @b{arm7_9 force_hw_bkpts} <@option{enable}|@option{disable}>
  848. @cindex arm7_9 force_hw_bkpts
  849. When @option{force_hw_bkpts} is enabled, the @option{sw_bkpts} support is disabled, and all
  850. breakpoints are turned into hardware breakpoints.
  851. @item @b{arm7_9 dbgrq} <@option{enable}|@option{disable}>
  852. @cindex arm7_9 dbgrq
  853. Enable use of the DBGRQ bit to force entry into debug mode. This should be
  854. safe for all but ARM7TDMI--S cores (like Philips LPC).
  855. @item @b{arm7_9 fast_writes} <@option{enable}|@option{disable}>
  856. @cindex arm7_9 fast_writes [DEPRECATED]
  857. See @option{arm7_9 fast_memory_access} instead.
  858. @item @b{arm7_9 fast_memory_access} <@option{enable}|@option{disable}>
  859. @cindex arm7_9 fast_memory_access
  860. Allow the OpenOCD to read and write memory without checking completion of
  861. the operation. This provides a huge speed increase, especially with USB JTAG
  862. cables (FT2232), but might be unsafe if used with targets running at a very low
  863. speed, like the 32kHz startup clock of an AT91RM9200.
  864. @item @b{arm7_9 dcc_downloads} <@option{enable}|@option{disable}>
  865. @cindex arm7_9 dcc_downloads
  866. Enable the use of the debug communications channel (DCC) to write larger (>128 byte)
  867. amounts of memory. DCC downloads offer a huge speed increase, but might be potentially
  868. unsafe, especially with targets running at a very low speed. This command was introduced
  869. with OpenOCD rev. 60.
  870. @end itemize
  871. @subsection ARM920T specific commands
  872. @cindex ARM920T specific commands
  873. @itemize @bullet
  874. @item @b{arm920t cache_info}
  875. @cindex arm920t cache_info
  876. Print information about the caches found. This allows you to see if your target
  877. is a ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache).
  878. @item @b{arm920t md<bhw>_phys} <@var{addr}> [@var{count}]
  879. @cindex arm920t md<bhw>_phys
  880. Display memory at physical address addr.
  881. @item @b{arm920t mw<bhw>_phys} <@var{addr}> <@var{value}>
  882. @cindex arm920t mw<bhw>_phys
  883. Write memory at physical address addr.
  884. @item @b{arm920t read_cache} <@var{filename}>
  885. @cindex arm920t read_cache
  886. Dump the content of ICache and DCache to a file.
  887. @item @b{arm920t read_mmu} <@var{filename}>
  888. @cindex arm920t read_mmu
  889. Dump the content of the ITLB and DTLB to a file.
  890. @item @b{arm920t virt2phys} <@var{VA}>
  891. @cindex arm920t virt2phys
  892. Translate a virtual address to a physical address.
  893. @end itemize
  894. @page
  895. @section Debug commands
  896. @cindex Debug commands
  897. The following commands give direct access to the core, and are most likely
  898. only useful while debugging the OpenOCD.
  899. @itemize @bullet
  900. @item @b{arm7_9 write_xpsr} <@var{32-bit value}> <@option{0=cpsr}, @option{1=spsr}>
  901. @cindex arm7_9 write_xpsr
  902. Immediately write either the current program status register (CPSR) or the saved
  903. program status register (SPSR), without changing the register cache (as displayed
  904. by the @option{reg} and @option{armv4_5 reg} commands).
  905. @item @b{arm7_9 write_xpsr_im8} <@var{8-bit value}> <@var{rotate 4-bit}>
  906. <@var{0=cpsr},@var{1=spsr}>
  907. @cindex arm7_9 write_xpsr_im8
  908. Write the 8-bit value rotated right by 2*rotate bits, using an immediate write
  909. operation (similar to @option{write_xpsr}).
  910. @item @b{arm7_9 write_core_reg} <@var{num}> <@var{mode}> <@var{value}>
  911. @cindex arm7_9 write_core_reg
  912. Write a core register, without changing the register cache (as displayed by the
  913. @option{reg} and @option{armv4_5 reg} commands). The <@var{mode}> argument takes the
  914. encoding of the [M4:M0] bits of the PSR.
  915. @end itemize
  916. @page
  917. @section JTAG commands
  918. @cindex JTAG commands
  919. @itemize @bullet
  920. @item @b{scan_chain}
  921. @cindex scan_chain
  922. Print current scan chain configuration.
  923. @item @b{jtag_reset}
  924. @cindex jtag_reset
  925. Toggle reset lines <@var{trst}> <@var{srst}>.
  926. @item @b{endstate} <@var{tap_state}>
  927. @cindex endstate
  928. Finish JTAG operations in <@var{tap_state}>.
  929. @item @b{runtest} <@var{num_cycles}>
  930. @cindex runtest
  931. Move to Run-Test/Idle, and execute <@var{num_cycles}>
  932. @item @b{statemove} [@var{tap_state}]
  933. @cindex statemove
  934. Move to current endstate or [@var{tap_state}]
  935. @item @b{irscan}
  936. @cindex irscan
  937. Execute IR scan <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
  938. @item @b{drscan}
  939. @cindex drscan
  940. Execute DR scan <@var{device}> [@var{dev2}] [@var{var2}] ...
  941. @item @b{verify_ircapture}
  942. @cindex verify_ircapture
  943. Verify value captured during Capture-IR <@option{enable}|@option{disable}>
  944. @item @b{var}
  945. @cindex var
  946. Allocate, display or delete variable <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
  947. @item @b{field}
  948. @cindex field
  949. Display/modify variable field <@var{var}> <@var{field}> [@var{value}|@var{flip}]
  950. @end itemize
  951. @node Sample Scripts
  952. @chapter Sample Scripts
  953. @cindex scripts
  954. This page will collect some script examples for different CPUs.
  955. The configuration script can be divided in the following section:
  956. @itemize @bullet
  957. @item daemon configuration
  958. @item interface
  959. @item jtag scan chain
  960. @item target configuration
  961. @item flash configuration
  962. @end itemize
  963. Detailed information about each section can be found at OpenOCD configuration
  964. @section OMAP5912 Flash Debug
  965. @cindex OMAP5912 Flash Debug
  966. The following two scripts were used with a wiggler PP and and a TI OMAP5912
  967. dual core processor - (@uref{}), on a OMAP5912 OSK board
  968. - (@uref{}).
  969. @subsection Openocd config
  970. @smallexample
  971. #daemon configuration
  972. telnet_port 4444
  973. gdb_port 3333
  974. #interface
  975. interface parport
  976. parport_port 0x378
  977. parport_cable wiggler
  978. jtag_speed 0
  979. #use combined on interfaces or targets that can't set TRST/SRST separately
  980. reset_config trst_and_srst
  981. #jtag scan chain
  982. #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
  983. jtag_device 38 0x0 0x0 0x0
  984. jtag_device 4 0x1 0x0 0xe
  985. jtag_device 8 0x0 0x0 0x0
  986. #target configuration
  987. daemon_startup reset
  988. #target <type> <endianness> <reset mode> <chainpos> <variant>
  989. target arm926ejs little run_and_init 1 arm926ejs
  990. target_script 0 reset omap5912_osk.init
  991. run_and_halt_time 0 30
  992. # omap5912 lcd frame buffer as working area
  993. working_area 0 0x20000000 0x3e800 nobackup
  994. #flash bank <driver> <base> <size> <chip_width> <bus_width>
  995. flash bank cfi 0x00000000 0x1000000 2 2 0
  996. @end smallexample
  997. @subsection Openocd init
  998. @smallexample
  999. #
  1000. # halt target
  1001. #
  1002. poll
  1003. sleep 1
  1004. halt
  1005. wait_halt
  1006. #
  1007. # disable wdt
  1008. #
  1009. mww 0xfffec808 0x000000f5
  1010. mww 0xfffec808 0x000000a0
  1011. mww 0xfffeb048 0x0000aaaa
  1012. sleep 500
  1013. mww 0xfffeb048 0x00005555
  1014. sleep 500
  1015. #
  1016. # detect flash
  1017. #
  1018. flash probe 0
  1019. @end smallexample
  1020. @section STR71x Script
  1021. @cindex STR71x Script
  1022. The following script was used with an Amontec JTAGkey and a STR710 / STR711 CPU:
  1023. @smallexample
  1024. #daemon configuration
  1025. telnet_port 4444
  1026. gdb_port 3333
  1027. #interface
  1028. interface ft2232
  1029. ft2232_device_desc "Amontec JTAGkey A"
  1030. ft2232_layout jtagkey
  1031. ft2232_vid_pid 0x0403 0xcff8
  1032. jtag_speed 0
  1033. #use combined on interfaces or targets that can't set TRST/SRST separately
  1034. reset_config trst_and_srst srst_pulls_trst
  1035. #jtag scan chain
  1036. #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
  1037. jtag_device 4 0x1 0xf 0xe
  1038. #target configuration
  1039. daemon_startup reset
  1040. #target <type> <startup mode>
  1041. #target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
  1042. target arm7tdmi little run_and_halt 0 arm7tdmi
  1043. run_and_halt_time 0 30
  1044. working_area 0 0x2000C000 0x4000 nobackup
  1045. #flash bank <driver> <base> <size> <chip_width> <bus_width>
  1046. flash bank str7x 0x40000000 0x00040000 0 0 0 STR71x
  1047. @end smallexample
  1048. @section STR750 Script
  1049. @cindex STR750 Script
  1050. The following script was used with an Amontec JTAGkey and a STR750 CPU:
  1051. @smallexample
  1052. #daemon configuration
  1053. telnet_port 4444
  1054. gdb_port 3333
  1055. #interface
  1056. interface ft2232
  1057. ft2232_device_desc "Amontec JTAGkey A"
  1058. ft2232_layout jtagkey
  1059. ft2232_vid_pid 0x0403 0xcff8
  1060. jtag_speed 19
  1061. #use combined on interfaces or targets that can't set TRST/SRST separately
  1062. #reset_config trst_and_srst srst_pulls_trst
  1063. reset_config trst_and_srst srst_pulls_trst
  1064. #jtag scan chain
  1065. #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
  1066. jtag_device 4 0x1 0xf 0xe
  1067. #jtag nTRST and nSRST delay
  1068. jtag_nsrst_delay 500
  1069. jtag_ntrst_delay 500
  1070. #target configuration
  1071. daemon_startup reset
  1072. #target <type> <startup mode>
  1073. #target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
  1074. target arm7tdmi little run_and_halt 0 arm7tdmi
  1075. run_and_halt_time 0 30
  1076. working_area 0 0x40000000 0x4000 nobackup
  1077. #flash bank <driver> <base> <size> <chip_width> <bus_width>
  1078. flash bank str7x 0x20000000 0x000040000 0 0 0 STR75x
  1079. @end smallexample
  1080. @section STR912 Script
  1081. @cindex STR912 Script
  1082. The following script was used with an Amontec JTAGkey and a STR912 CPU:
  1083. @smallexample
  1084. #daemon configuration
  1085. telnet_port 4444
  1086. gdb_port 3333
  1087. #interface
  1088. interface ft2232
  1089. ft2232_device_desc "Amontec JTAGkey A"
  1090. ft2232_layout jtagkey
  1091. jtag_speed 1
  1092. #use combined on interfaces or targets that can't set TRST/SRST separately
  1093. reset_config trst_and_srst
  1094. #jtag scan chain
  1095. #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
  1096. jtag_device 8 0x1 0x1 0xfe
  1097. jtag_device 4 0x1 0xf 0xe
  1098. jtag_device 5 0x1 0x1 0x1e
  1099. #target configuration
  1100. daemon_startup reset
  1101. #target <type> <startup mode>
  1102. #target arm966e <endianness> <reset mode> <chainpos> <variant>
  1103. target arm966e little reset_halt 1 arm966e
  1104. run_and_halt_time 0 30
  1105. working_area 0 0x50000000 16384 nobackup
  1106. #flash bank <driver> <base> <size> <chip_width> <bus_width>
  1107. flash bank str9x 0x00000000 0x00080000 0 0 0
  1108. @end smallexample
  1109. @section STR912 comstick
  1110. @cindex STR912 comstick Script
  1111. The following script was used with a Hitex STR9 Comstick:
  1112. @smallexample
  1113. #daemon configuration
  1114. telnet_port 4444
  1115. gdb_port 3333
  1116. #interface
  1117. interface ft2232
  1118. ft2232_device_desc "STR9-comStick A"
  1119. ft2232_layout comstick
  1120. jtag_speed 1
  1121. jtag_nsrst_delay 100
  1122. jtag_ntrst_delay 100
  1123. #use combined on interfaces or targets that can't set TRST/SRST separately
  1124. reset_config trst_and_srst
  1125. #jtag scan chain
  1126. #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
  1127. jtag_device 8 0x1 0x1 0xfe
  1128. jtag_device 4 0x1 0xf 0xe
  1129. jtag_device 5 0x1 0x1 0x1e
  1130. #target configuration
  1131. daemon_startup reset
  1132. #target <type> <startup mode>
  1133. #target arm966e <endianness> <reset mode> <chainpos> <variant>
  1134. target arm966e little reset_halt 1 arm966e
  1135. run_and_halt_time 0 30
  1136. working_area 0 0x50000000 16384 nobackup
  1137. #flash bank <driver> <base> <size> <chip_width> <bus_width>
  1138. flash bank str9x 0x00000000 0x00080000 0 0 0
  1139. @end smallexample
  1140. @section STM32x Script
  1141. @cindex STM32x Script
  1142. The following script was used with an Amontec JTAGkey and a STM32x CPU:
  1143. @smallexample
  1144. #daemon configuration
  1145. telnet_port 4444
  1146. gdb_port 3333
  1147. #interface
  1148. interface ft2232
  1149. ft2232_device_desc "Amontec JTAGkey A"
  1150. ft2232_layout jtagkey
  1151. jtag_speed 10
  1152. jtag_nsrst_delay 100
  1153. jtag_ntrst_delay 100
  1154. #use combined on interfaces or targets that can't set TRST/SRST separately
  1155. reset_config trst_and_srst
  1156. #jtag scan chain
  1157. #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
  1158. jtag_device 4 0x1 0xf 0xe
  1159. jtag_device 5 0x1 0x1 0x1e
  1160. #target configuration
  1161. daemon_startup reset
  1162. #target <type> <startup mode>
  1163. #target cortex_m3 <endianness> <reset mode> <chainpos> <variant>
  1164. target cortex_m3 little run_and_halt 0
  1165. run_and_halt_time 0 30
  1166. working_area 0 0x20000000 16384 nobackup
  1167. #flash bank <driver> <base> <size> <chip_width> <bus_width>
  1168. flash bank stm32x 0x08000000 0x00020000 0 0 0
  1169. @end smallexample
  1170. @section STM32x Performance Stick
  1171. @cindex STM32x Performance Stick Script
  1172. The following script was used with the Hitex STM32 Performance Stick
  1173. @smallexample
  1174. #daemon configuration
  1175. telnet_port 4444
  1176. gdb_port 3333
  1177. #interface
  1178. interface ft2232
  1179. ft2232_device_desc "STM32-PerformanceStick A"
  1180. ft2232_layout stm32stick
  1181. jtag_speed 10
  1182. jtag_nsrst_delay 100
  1183. jtag_ntrst_delay 100
  1184. #use combined on interfaces or targets that can't set TRST/SRST separately
  1185. reset_config trst_and_srst
  1186. #jtag scan chain
  1187. #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
  1188. jtag_device 4 0x1 0xf 0xe
  1189. jtag_device 5 0x1 0x1 0x1e
  1190. jtag_device 4 0x1 0xf 0xe
  1191. #target configuration
  1192. daemon_startup reset
  1193. #target <type> <startup mode>
  1194. #target cortex_m3 <endianness> <reset mode> <chainpos> <variant>
  1195. target cortex_m3 little run_and_halt 0
  1196. run_and_halt_time 0 30
  1197. working_area 0 0x20000000 16384 nobackup
  1198. #flash bank <driver> <base> <size> <chip_width> <bus_width>
  1199. flash bank stm32x 0x08000000 0x00020000 0 0 0
  1200. @end smallexample
  1201. @section LPC2129 Script
  1202. @cindex LPC2129 Script
  1203. The following script was used with an wiggler PP and a LPC-2129 CPU:
  1204. @smallexample
  1205. #daemon configuration
  1206. telnet_port 4444
  1207. gdb_port 3333
  1208. #interface
  1209. interface parport
  1210. parport_port 0x378
  1211. parport_cable wiggler
  1212. jtag_speed 0
  1213. #use combined on interfaces or targets that can't set TRST/SRST separately
  1214. reset_config trst_and_srst srst_pulls_trst
  1215. #jtag scan chain
  1216. #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
  1217. jtag_device 4 0x1 0xf 0xe
  1218. #target configuration
  1219. daemon_startup reset
  1220. #target <type> <startup mode>
  1221. #target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
  1222. target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
  1223. run_and_halt_time 0 30
  1224. working_area 0 0x40000000 0x4000 nobackup
  1225. #flash bank <driver> <base> <size> <chip_width> <bus_width>
  1226. flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14765 calc_checksum
  1227. @end smallexample
  1228. @section LPC2148 Script
  1229. @cindex LPC2148 Script
  1230. The following script was used with an Amontec JTAGkey and a LPC2148 CPU:
  1231. @smallexample
  1232. #daemon configuration
  1233. telnet_port 4444
  1234. gdb_port 3333
  1235. #interface
  1236. interface ft2232
  1237. ft2232_device_desc "Amontec JTAGkey A"
  1238. ft2232_layout jtagkey
  1239. ft2232_vid_pid 0x0403 0xcff8
  1240. jtag_speed 3
  1241. #use combined on interfaces or targets that can't set TRST/SRST separately
  1242. reset_config trst_and_srst srst_pulls_trst
  1243. #jtag scan chain
  1244. #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
  1245. jtag_device 4 0x1 0xf 0xe
  1246. #target configuration
  1247. daemon_startup reset
  1248. #target <type> <startup mode>
  1249. #target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
  1250. target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
  1251. run_and_halt_time 0 30
  1252. working_area 0 0x40000000 0x8000 nobackup
  1253. #flash configuration
  1254. flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v1 14765 calc_checksum
  1255. @end smallexample
  1256. @section LPC2294 Script
  1257. @cindex LPC2294 Script
  1258. The following script was used with an Amontec JTAGkey and a LPC2294 CPU:
  1259. @smallexample
  1260. #daemon configuration
  1261. telnet_port 4444
  1262. gdb_port 3333
  1263. #interface
  1264. interface ft2232
  1265. ft2232_device_desc "Amontec JTAGkey A"
  1266. ft2232_layout jtagkey
  1267. ft2232_vid_pid 0x0403 0xcff8
  1268. jtag_speed 3
  1269. #use combined on interfaces or targets that can't set TRST/SRST separately
  1270. reset_config trst_and_srst srst_pulls_trst
  1271. #jtag scan chain
  1272. #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
  1273. jtag_device 4 0x1 0xf 0xe
  1274. #target configuration
  1275. daemon_startup reset
  1276. #target <type> <startup mode>
  1277. #target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
  1278. target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
  1279. run_and_halt_time 0 30
  1280. working_area 0 0x40000000 0x4000 nobackup
  1281. #flash configuration
  1282. flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14765 calc_checksum
  1283. @end smallexample
  1284. @section AT91R40008 Script
  1285. @cindex AT91R40008 Script
  1286. The following script was used with an Amontec JTAGkey and a AT91R40008 CPU:
  1287. @smallexample
  1288. #daemon configuration
  1289. telnet_port 4444
  1290. gdb_port 3333
  1291. #interface
  1292. interface ft2232
  1293. ft2232_device_desc "Amontec JTAGkey A"
  1294. ft2232_layout jtagkey
  1295. ft2232_vid_pid 0x0403 0xcff8
  1296. jtag_speed 0
  1297. jtag_nsrst_delay 200
  1298. jtag_ntrst_delay 200
  1299. #use combined on interfaces or targets that can't set TRST/SRST separately
  1300. reset_config srst_only srst_pulls_trst
  1301. #jtag scan chain
  1302. #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
  1303. jtag_device 4 0x1 0xf 0xe
  1304. #target configuration
  1305. daemon_startup reset
  1306. #target <type> <startup mode>
  1307. #target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
  1308. target arm7tdmi little run_and_halt 0 arm7tdmi
  1309. run_and_halt_time 0 30
  1310. @end smallexample
  1311. @section AT91SAM7s Script
  1312. @cindex AT91SAM7s Script
  1313. The following script was used with an Olimex ARM-JTAG-OCD and a AT91SAM7S64 CPU:
  1314. @smallexample
  1315. #daemon configuration
  1316. telnet_port 4444
  1317. gdb_port 3333
  1318. #interface
  1319. interface ft2232
  1320. ft2232_device_desc "Olimex OpenOCD JTAG A"
  1321. ft2232_layout olimex-jtag
  1322. ft2232_vid_pid 0x15BA 0x0003
  1323. jtag_speed 0
  1324. jtag_nsrst_delay 200
  1325. jtag_ntrst_delay 200
  1326. #use combined on interfaces or targets that can't set TRST/SRST separately
  1327. reset_config srst_only srst_pulls_trst
  1328. #jtag scan chain
  1329. #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
  1330. jtag_device 4 0x1 0xf 0xe
  1331. #target configuration
  1332. daemon_startup reset
  1333. #target <type> <startup mode>
  1334. #target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
  1335. target arm7tdmi little run_and_halt 0 arm7tdmi
  1336. run_and_halt_time 0 30
  1337. # flash-options AT91
  1338. working_area 0 0x00200000 0x4000 nobackup
  1339. flash bank at91sam7 0 0 0 0 0
  1340. # Information:
  1341. # erase command (telnet-interface) for complete flash:
  1342. # flash erase <num> 0 numlockbits-1 (can be seen from output of flash info 0)
  1343. # SAM7S64 with 16 lockbits and bank 0: flash erase 0 0 15
  1344. # set/clear NVM-Bits:
  1345. # at91sam7 gpnvm <num> <bit> <set|clear>
  1346. # disable locking from SAM-BA:
  1347. # flash protect 0 0 1 off
  1348. @end smallexample
  1349. @section XSCALE IXP42x Script
  1350. @cindex XSCALE IXP42x Script
  1351. The following script was used with an Amontec JTAGkey-Tiny and a xscale ixp42x CPU:
  1352. @smallexample
  1353. #daemon configuration
  1354. telnet_port 4444
  1355. gdb_port 3333
  1356. #interface
  1357. interface ft2232
  1358. ft2232_device_desc "Amontec JTAGkey A"
  1359. ft2232_layout jtagkey
  1360. ft2232_vid_pid 0x0403 0xcff8
  1361. jtag_speed 0
  1362. jtag_nsrst_delay 200
  1363. jtag_ntrst_delay 200
  1364. #use combined on interfaces or targets that can't set TRST/SRST separately
  1365. reset_config srst_only srst_pulls_trst
  1366. #jtag scan chain
  1367. #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
  1368. jtag_device 7 0x1 0x7f 0x7e
  1369. #target configuration
  1370. daemon_startup reset
  1371. #target <type> <startup mode>
  1372. #target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
  1373. target xscale big run_and_halt 0 IXP42x
  1374. run_and_halt_time 0 30
  1375. @end smallexample
  1376. @section Cirrus Logic EP9301 Script
  1377. @cindex Cirrus Logic EP9301 Script
  1378. The following script was used with FT2232 based JTAG interfaces and a
  1379. Cirrus Logic EP9301 processor on an Olimex CS-E9301 board.
  1380. @smallexample
  1381. #daemon configuration
  1382. telnet_port 4444
  1383. gdb_port 3333
  1384. #interface
  1385. interface ft2232
  1386. #Olimex ARM-USB-OCD
  1387. #ft2232_device_desc "Olimex OpenOCD JTAG"
  1388. #ft2232_layout olimex-jtag
  1389. #ft2232_vid_pid 0x15ba 0x0003
  1390. #Amontec JTAGkey (and JTAGkey-Tiny)
  1391. #Serial is only necessary if more than one JTAGkey is connected
  1392. ft2232_device_desc "Amontec JTAGkey A"
  1393. #ft2232_serial AMTJKV31
  1394. #ft2232_serial T1P3S2W8
  1395. ft2232_layout jtagkey
  1396. ft2232_vid_pid 0x0403 0xcff8
  1397. #wiggler/parallel port interface
  1398. #interface parport
  1399. #parport_port 0x378
  1400. #parport_cable wiggler
  1401. #jtag_speed 0
  1402. jtag_speed 1
  1403. reset_config trst_and_srst
  1404. #jtag scan chain
  1405. #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
  1406. jtag_device 4 0x1 0xf 0xe
  1407. jtag_nsrst_delay 100
  1408. jtag_ntrst_delay 100
  1409. #target configuration
  1410. daemon_startup attach
  1411. #target <type> <endianess> <reset mode>
  1412. target arm920t little reset_halt 0
  1413. working_area 0 0x80014000 0x1000 backup
  1414. #flash configuration
  1415. #flash bank <driver> <base> <size> <chip_width> <bus_width> [driver_options ...]
  1416. flash bank cfi 0x60000000 0x1000000 2 2 0
  1417. @end smallexample
  1418. @section Hilscher netX 100 / 500 Script
  1419. @cindex Hilscher netX 100 / 500 Script
  1420. The following script was used with an Amontec JTAGkey and a Hilscher
  1421. netX 500 CPU:
  1422. @smallexample
  1423. #daemon configuration
  1424. telnet_port 4444
  1425. gdb_port 3333
  1426. #interface
  1427. interface ft2232
  1428. ft2232_device_desc "Amontec JTAGkey A"
  1429. ft2232_layout jtagkey
  1430. ft2232_vid_pid 0x0403 0xcff8
  1431. jtag_speed 5
  1432. #use combined on interfaces or targets that can't set TRST/SRST separately
  1433. reset_config trst_and_srst
  1434. #jtag scan chain
  1435. #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
  1436. jtag_device 4 0x1 0xf 0xe
  1437. jtag_nsrst_delay 100
  1438. jtag_ntrst_delay 100
  1439. #target configuration
  1440. daemon_startup reset
  1441. #target <type> <endianness> <startup mode> <chainpos> <variant>
  1442. target arm926ejs little run_and_halt 0 arm926ejs
  1443. run_and_halt_time 0 500
  1444. @end smallexample
  1445. @section Marvell/Intel PXA270 Script
  1446. @cindex Marvell/Intel PXA270 Script
  1447. @smallexample
  1448. # config for Intel PXA270
  1449. # not, as of 2007-06-22, openocd only works with the
  1450. # libftd2xx library from ftdi. libftdi does not work.
  1451. telnet_port 3333
  1452. gdb_port 4444
  1453. interface ft2232
  1454. ft2232_layout olimex-jtag
  1455. ft2232_vid_pid 0x15BA 0x0003
  1456. ft2232_device_desc "Olimex OpenOCD JTAG"
  1457. jtag_speed 0
  1458. # set jtag_nsrst_delay to the delay introduced by your reset circuit
  1459. # the rest of the needed delays are built into the openocd program
  1460. jtag_nsrst_delay 260
  1461. # set the jtag_ntrst_delay to the delay introduced by a reset circuit
  1462. # the rest of the needed delays are built into the openocd program
  1463. jtag_ntrst_delay 0
  1464. #use combined on interfaces or targets that can't set TRST/SRST separately
  1465. reset_config trst_and_srst separate
  1466. #jtag scan chain
  1467. #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
  1468. jtag_device 7 0x1 0x7f 0x7e
  1469. #target configuration
  1470. daemon_startup reset
  1471. target xscale little reset_halt 0 pxa27x
  1472. # maps to PXA internal RAM. If you are using a PXA255
  1473. # you must initialize SDRAM or leave this option off
  1474. working_area 0 0x5c000000 0x10000 nobackup
  1475. run_and_halt_time 0 30
  1476. #flash bank <driver> <base> <size> <chip_width> <bus_width>
  1477. # works for P30 flash
  1478. flash bank cfi 0x00000000 0x1000000 2 4 0
  1479. @end smallexample
  1480. @node GDB and Openocd
  1481. @chapter GDB and Openocd
  1482. @cindex GDB and Openocd
  1483. Openocd complies with the remote gdbserver protocol, and as such can be used
  1484. to debug remote targets.
  1485. @section Connecting to gdb
  1486. @cindex Connecting to gdb
  1487. A connection is typically started as follows:
  1488. @smallexample
  1489. target remote localhost:3333
  1490. @end smallexample
  1491. This would cause gdb to connect to the gdbserver on the local pc using port 3333.
  1492. To see a list of available openocd commands type @option{monitor help} on the
  1493. gdb commandline.
  1494. Openocd supports the gdb @option{qSupported} packet, this enables information
  1495. to be sent by the gdb server (openocd) to gdb. Typical information includes
  1496. packet size and device memory map.
  1497. Previous versions of openocd required the following gdb options to increase
  1498. the packet size and speed up gdb communication.
  1499. @smallexample
  1500. set remote memory-write-packet-size 1024
  1501. set remote memory-write-packet-size fixed
  1502. set remote memory-read-packet-size 1024
  1503. set remote memory-read-packet-size fixed
  1504. @end smallexample
  1505. This is now handled in the @option{qSupported} PacketSize.
  1506. @section Programming using gdb
  1507. @cindex Programming using gdb
  1508. By default the target memory map is not sent to gdb, this can be enabled by
  1509. the following openocd config option:
  1510. @smallexample
  1511. gdb_memory_map enable
  1512. @end smallexample
  1513. For this to function correctly a valid flash config must also be configured
  1514. in openocd. For speed also configure a valid working area.
  1515. Informing gdb of the memory map of the target will enable gdb to protect any
  1516. flash area of the target and use hardware breakpoints by default. This means
  1517. that the openocd option @option{arm7_9 force_hw_bkpts} is not required when
  1518. using a memory map.
  1519. To view the configured memory map in gdb, use the gdb command @option{info mem}
  1520. All other unasigned addresses within gdb are treated as RAM.
  1521. If @option{gdb_flash_program enable} is also used, gdb will be able to
  1522. program any flash memory using the vFlash interface.
  1523. gdb will look at the target memory map when a load command is given, if any
  1524. areas to be programmed lie within the target flash area the vFlash packets
  1525. will be used.
  1526. Incase the target needs configuring before gdb programming, a script can be executed.
  1527. @smallexample
  1528. target_script 0 gdb_program_config config.script
  1529. @end smallexample
  1530. To verify any flash programming the gdb command @option{compare-sections}
  1531. can be used.
  1532. @node FAQ
  1533. @chapter FAQ
  1534. @cindex faq
  1535. @enumerate
  1536. @item OpenOCD complains about a missing cygwin1.dll.
  1537. Make sure you have Cygwin installed, or at least a version of OpenOCD that
  1538. claims to come with all the necessary dlls. When using Cygwin, try launching
  1539. the OpenOCD from the Cygwin shell.
  1540. @item I'm trying to set a breakpoint using GDB (or a frontend like Insight or
  1541. Eclipse), but OpenOCD complains that "Info: arm7_9_common.c:213
  1542. arm7_9_add_breakpoint(): sw breakpoint requested, but software breakpoints not enabled".
  1543. GDB issues software breakpoints when a normal breakpoint is requested, or to implement
  1544. source-line single-stepping. On ARMv4T systems, like ARM7TDMI, ARM720t or ARM920t,
  1545. software breakpoints consume one of the two available hardware breakpoints,
  1546. and are therefore disabled by default. If your code is running from RAM, you
  1547. can enable software breakpoints with the @option{arm7_9 sw_bkpts enable} command. If
  1548. your code resides in Flash, you can't use software breakpoints, but you can force
  1549. OpenOCD to use hardware breakpoints instead: @option{arm7_9 force_hw_bkpts enable}.
  1550. @item When erasing or writing LPC2000 on-chip flash, the operation fails sometimes
  1551. and works sometimes fine.
  1552. Make sure the core frequency specified in the @option{flash lpc2000} line matches the
  1553. clock at the time you're programming the flash. If you've specified the crystal's
  1554. frequency, make sure the PLL is disabled, if you've specified the full core speed
  1555. (e.g. 60MHz), make sure the PLL is enabled.
  1556. @item When debugging using an Amontec Chameleon in its JTAG Accelerator configuration,
  1557. I keep getting "Error: amt_jtagaccel.c:184 amt_wait_scan_busy(): amt_jtagaccel timed
  1558. out while waiting for end of scan, rtck was disabled".
  1559. Make sure your PC's parallel port operates in EPP mode. You might have to try several
  1560. settings in your PC BIOS (ECP, EPP, and different versions of those).
  1561. @item When debugging with the OpenOCD and GDB (plain GDB, Insight, or Eclipse),
  1562. I get lots of "Error: arm7_9_common.c:1771 arm7_9_read_memory():
  1563. memory read caused data abort".
  1564. The errors are non-fatal, and are the result of GDB trying to trace stack frames
  1565. beyond the last valid frame. It might be possible to prevent this by setting up
  1566. a proper "initial" stack frame, if you happen to know what exactly has to
  1567. be done, feel free to add this here.
  1568. @item I get the following message in the OpenOCD console (or log file):
  1569. "Warning: arm7_9_common.c:679 arm7_9_assert_reset(): srst resets test logic, too".
  1570. This warning doesn't indicate any serious problem, as long as you don't want to
  1571. debug your core right out of reset. Your .cfg file specified @option{jtag_reset
  1572. trst_and_srst srst_pulls_trst} to tell the OpenOCD that either your board,
  1573. your debugger or your target uC (e.g. LPC2000) can't assert the two reset signals
  1574. independently. With this setup, it's not possible to halt the core right out of
  1575. reset, everything else should work fine.
  1576. @item When using OpenOCD in conjunction with Amontec JTAGkey and the Yagarto
  1577. Toolchain (Eclipse, arm-elf-gcc, arm-elf-gdb), the debugging seems to be
  1578. unstable. When single-stepping over large blocks of code, GDB and OpenOCD
  1579. quit with an error message. Is there a stability issue with OpenOCD?
  1580. No, this is not a stability issue concerning OpenOCD. Most users have solved
  1581. this issue by simply using a self-powered USB hub, which they connect their
  1582. Amontec JTAGkey to. Apparently, some computers do not provide a USB power
  1583. supply stable enough for the Amontec JTAGkey to be operated.
  1584. @item When using the Amontec JTAGkey, sometimes OpenOCD crashes with the
  1585. following error messages: "Error: ft2232.c:201 ft2232_read(): FT_Read returned:
  1586. 4" and "Error: ft2232.c:365 ft2232_send_and_recv(): couldn't read from FT2232".
  1587. What does that mean and what might be the reason for this?
  1588. First of all, the reason might be the USB power supply. Try using a self-powered
  1589. hub instead of a direct connection to your computer. Secondly, the error code 4
  1590. corresponds to an FT_IO_ERROR, which means that the driver for the FTDI USB
  1591. chip ran into some sort of error - this points us to a USB problem.
  1592. @item When using the Amontec JTAGkey, sometimes OpenOCD crashes with the following
  1593. error message: "Error: gdb_server.c:101 gdb_get_char(): read: 10054".
  1594. What does that mean and what might be the reason for this?
  1595. Error code 10054 corresponds to WSAECONNRESET, which means that the debugger (GDB)
  1596. has closed the connection to OpenOCD. This might be a GDB issue.
  1597. @item In the configuration file in the section where flash device configurations
  1598. are described, there is a parameter for specifying the clock frequency for
  1599. LPC2000 internal flash devices (e.g.
  1600. @option{flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14746 calc_checksum}),
  1601. which must be specified in kilohertz. However, I do have a quartz crystal of a
  1602. frequency that contains fractions of kilohertz (e.g. 14,745,600 Hz, i.e. 14,745.600 kHz).
  1603. Is it possible to specify real numbers for the clock frequency?
  1604. No. The clock frequency specified here must be given as an integral number.
  1605. However, this clock frequency is used by the In-Application-Programming (IAP)
  1606. routines of the LPC2000 family only, which seems to be very tolerant concerning
  1607. the given clock frequency, so a slight difference between the specified clock
  1608. frequency and the actual clock frequency will not cause any trouble.
  1609. @item Do I have to keep a specific order for the commands in the configuration file?
  1610. Well, yes and no. Commands can be given in arbitrary order, yet the devices
  1611. listed for the JTAG scan chain must be given in the right order (jtag_device),
  1612. with the device closest to the TDO-Pin being listed first. In general,
  1613. whenever objects of the same type exist which require an index number, then
  1614. these objects must be given in the right order (jtag_devices, targets and flash
  1615. banks - a target references a jtag_device and a flash bank references a target).
  1616. @item Sometimes my debugging session terminates with an error. When I look into the
  1617. log file, I can see these error messages: Error: arm7_9_common.c:561
  1618. arm7_9_execute_sys_speed(): timeout waiting for SYSCOMP
  1619. TODO.
  1620. @end enumerate
  1621. @include fdl.texi
  1622. @node Index
  1623. @unnumbered Index
  1624. @printindex cp
  1625. @bye