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  1. /***************************************************************************
  2. * Copyright (C) 2009 by Marvell Technology Group Ltd. *
  3. * Written by Nicolas Pitre <nico@marvell.com> *
  4. * *
  5. * Copyright (C) 2010 by Spencer Oliver *
  6. * spen@spen-soft.co.uk *
  7. * *
  8. * This program is free software; you can redistribute it and/or modify *
  9. * it under the terms of the GNU General Public License as published by *
  10. * the Free Software Foundation; either version 2 of the License, or *
  11. * (at your option) any later version. *
  12. * *
  13. * This program is distributed in the hope that it will be useful, *
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  16. * GNU General Public License for more details. *
  17. * *
  18. * You should have received a copy of the GNU General Public License *
  19. * along with this program; if not, write to the *
  20. * Free Software Foundation, Inc., *
  21. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  22. ***************************************************************************/
  23. /**
  24. * @file
  25. * Hold ARM semihosting support.
  26. *
  27. * Semihosting enables code running on an ARM target to use the I/O
  28. * facilities on the host computer. The target application must be linked
  29. * against a library that forwards operation requests by using the SVC
  30. * instruction trapped at the Supervisor Call vector by the debugger.
  31. * Details can be found in chapter 8 of DUI0203I_rvct_developer_guide.pdf
  32. * from ARM Ltd.
  33. */
  34. #ifdef HAVE_CONFIG_H
  35. #include "config.h"
  36. #endif
  37. #include "arm.h"
  38. #include "armv4_5.h"
  39. #include "arm7_9_common.h"
  40. #include "armv7m.h"
  41. #include "cortex_m.h"
  42. #include "register.h"
  43. #include "arm_semihosting.h"
  44. #include <helper/binarybuffer.h>
  45. #include <helper/log.h>
  46. #include <sys/stat.h>
  47. static int open_modeflags[12] = {
  48. O_RDONLY,
  49. O_RDONLY | O_BINARY,
  50. O_RDWR,
  51. O_RDWR | O_BINARY,
  52. O_WRONLY | O_CREAT | O_TRUNC,
  53. O_WRONLY | O_CREAT | O_TRUNC | O_BINARY,
  54. O_RDWR | O_CREAT | O_TRUNC,
  55. O_RDWR | O_CREAT | O_TRUNC | O_BINARY,
  56. O_WRONLY | O_CREAT | O_APPEND,
  57. O_WRONLY | O_CREAT | O_APPEND | O_BINARY,
  58. O_RDWR | O_CREAT | O_APPEND,
  59. O_RDWR | O_CREAT | O_APPEND | O_BINARY
  60. };
  61. static int do_semihosting(struct target *target)
  62. {
  63. struct arm *arm = target_to_arm(target);
  64. uint32_t r0 = buf_get_u32(arm->core_cache->reg_list[0].value, 0, 32);
  65. uint32_t r1 = buf_get_u32(arm->core_cache->reg_list[1].value, 0, 32);
  66. uint8_t params[16];
  67. int retval, result;
  68. /*
  69. * TODO: lots of security issues are not considered yet, such as:
  70. * - no validation on target provided file descriptors
  71. * - no safety checks on opened/deleted/renamed file paths
  72. * Beware the target app you use this support with.
  73. *
  74. * TODO: explore mapping requests to GDB's "File-I/O Remote
  75. * Protocol Extension" ... when GDB is active.
  76. */
  77. switch (r0) {
  78. case 0x01: /* SYS_OPEN */
  79. retval = target_read_memory(target, r1, 4, 3, params);
  80. if (retval != ERROR_OK)
  81. return retval;
  82. else {
  83. uint32_t a = target_buffer_get_u32(target, params+0);
  84. uint32_t m = target_buffer_get_u32(target, params+4);
  85. uint32_t l = target_buffer_get_u32(target, params+8);
  86. if (l <= 255 && m <= 11) {
  87. uint8_t fn[256];
  88. retval = target_read_memory(target, a, 1, l, fn);
  89. if (retval != ERROR_OK)
  90. return retval;
  91. fn[l] = 0;
  92. if (strcmp((char *)fn, ":tt") == 0) {
  93. if (m < 4)
  94. result = dup(STDIN_FILENO);
  95. else
  96. result = dup(STDOUT_FILENO);
  97. } else {
  98. /* cygwin requires the permission setting
  99. * otherwise it will fail to reopen a previously
  100. * written file */
  101. result = open((char *)fn, open_modeflags[m], 0644);
  102. }
  103. arm->semihosting_errno = errno;
  104. } else {
  105. result = -1;
  106. arm->semihosting_errno = EINVAL;
  107. }
  108. }
  109. break;
  110. case 0x02: /* SYS_CLOSE */
  111. retval = target_read_memory(target, r1, 4, 1, params);
  112. if (retval != ERROR_OK)
  113. return retval;
  114. else {
  115. int fd = target_buffer_get_u32(target, params+0);
  116. result = close(fd);
  117. arm->semihosting_errno = errno;
  118. }
  119. break;
  120. case 0x03: /* SYS_WRITEC */
  121. {
  122. unsigned char c;
  123. retval = target_read_memory(target, r1, 1, 1, &c);
  124. if (retval != ERROR_OK)
  125. return retval;
  126. putchar(c);
  127. result = 0;
  128. }
  129. break;
  130. case 0x04: /* SYS_WRITE0 */
  131. do {
  132. unsigned char c;
  133. retval = target_read_memory(target, r1++, 1, 1, &c);
  134. if (retval != ERROR_OK)
  135. return retval;
  136. if (!c)
  137. break;
  138. putchar(c);
  139. } while (1);
  140. result = 0;
  141. break;
  142. case 0x05: /* SYS_WRITE */
  143. retval = target_read_memory(target, r1, 4, 3, params);
  144. if (retval != ERROR_OK)
  145. return retval;
  146. else {
  147. int fd = target_buffer_get_u32(target, params+0);
  148. uint32_t a = target_buffer_get_u32(target, params+4);
  149. size_t l = target_buffer_get_u32(target, params+8);
  150. uint8_t *buf = malloc(l);
  151. if (!buf) {
  152. result = -1;
  153. arm->semihosting_errno = ENOMEM;
  154. } else {
  155. retval = target_read_buffer(target, a, l, buf);
  156. if (retval != ERROR_OK) {
  157. free(buf);
  158. return retval;
  159. }
  160. result = write(fd, buf, l);
  161. arm->semihosting_errno = errno;
  162. if (result >= 0)
  163. result = l - result;
  164. free(buf);
  165. }
  166. }
  167. break;
  168. case 0x06: /* SYS_READ */
  169. retval = target_read_memory(target, r1, 4, 3, params);
  170. if (retval != ERROR_OK)
  171. return retval;
  172. else {
  173. int fd = target_buffer_get_u32(target, params+0);
  174. uint32_t a = target_buffer_get_u32(target, params+4);
  175. ssize_t l = target_buffer_get_u32(target, params+8);
  176. uint8_t *buf = malloc(l);
  177. if (!buf) {
  178. result = -1;
  179. arm->semihosting_errno = ENOMEM;
  180. } else {
  181. result = read(fd, buf, l);
  182. arm->semihosting_errno = errno;
  183. if (result >= 0) {
  184. retval = target_write_buffer(target, a, result, buf);
  185. if (retval != ERROR_OK) {
  186. free(buf);
  187. return retval;
  188. }
  189. result = l - result;
  190. }
  191. free(buf);
  192. }
  193. }
  194. break;
  195. case 0x07: /* SYS_READC */
  196. result = getchar();
  197. break;
  198. case 0x08: /* SYS_ISERROR */
  199. retval = target_read_memory(target, r1, 4, 1, params);
  200. if (retval != ERROR_OK)
  201. return retval;
  202. result = (target_buffer_get_u32(target, params+0) != 0);
  203. break;
  204. case 0x09: /* SYS_ISTTY */
  205. retval = target_read_memory(target, r1, 4, 1, params);
  206. if (retval != ERROR_OK)
  207. return retval;
  208. result = isatty(target_buffer_get_u32(target, params+0));
  209. break;
  210. case 0x0a: /* SYS_SEEK */
  211. retval = target_read_memory(target, r1, 4, 2, params);
  212. if (retval != ERROR_OK)
  213. return retval;
  214. else {
  215. int fd = target_buffer_get_u32(target, params+0);
  216. off_t pos = target_buffer_get_u32(target, params+4);
  217. result = lseek(fd, pos, SEEK_SET);
  218. arm->semihosting_errno = errno;
  219. if (result == pos)
  220. result = 0;
  221. }
  222. break;
  223. case 0x0c: /* SYS_FLEN */
  224. retval = target_read_memory(target, r1, 4, 1, params);
  225. if (retval != ERROR_OK)
  226. return retval;
  227. else {
  228. int fd = target_buffer_get_u32(target, params+0);
  229. struct stat buf;
  230. result = fstat(fd, &buf);
  231. if (result == -1) {
  232. arm->semihosting_errno = errno;
  233. result = -1;
  234. break;
  235. }
  236. result = buf.st_size;
  237. }
  238. break;
  239. case 0x0e: /* SYS_REMOVE */
  240. retval = target_read_memory(target, r1, 4, 2, params);
  241. if (retval != ERROR_OK)
  242. return retval;
  243. else {
  244. uint32_t a = target_buffer_get_u32(target, params+0);
  245. uint32_t l = target_buffer_get_u32(target, params+4);
  246. if (l <= 255) {
  247. uint8_t fn[256];
  248. retval = target_read_memory(target, a, 1, l, fn);
  249. if (retval != ERROR_OK)
  250. return retval;
  251. fn[l] = 0;
  252. result = remove((char *)fn);
  253. arm->semihosting_errno = errno;
  254. } else {
  255. result = -1;
  256. arm->semihosting_errno = EINVAL;
  257. }
  258. }
  259. break;
  260. case 0x0f: /* SYS_RENAME */
  261. retval = target_read_memory(target, r1, 4, 4, params);
  262. if (retval != ERROR_OK)
  263. return retval;
  264. else {
  265. uint32_t a1 = target_buffer_get_u32(target, params+0);
  266. uint32_t l1 = target_buffer_get_u32(target, params+4);
  267. uint32_t a2 = target_buffer_get_u32(target, params+8);
  268. uint32_t l2 = target_buffer_get_u32(target, params+12);
  269. if (l1 <= 255 && l2 <= 255) {
  270. uint8_t fn1[256], fn2[256];
  271. retval = target_read_memory(target, a1, 1, l1, fn1);
  272. if (retval != ERROR_OK)
  273. return retval;
  274. retval = target_read_memory(target, a2, 1, l2, fn2);
  275. if (retval != ERROR_OK)
  276. return retval;
  277. fn1[l1] = 0;
  278. fn2[l2] = 0;
  279. result = rename((char *)fn1, (char *)fn2);
  280. arm->semihosting_errno = errno;
  281. } else {
  282. result = -1;
  283. arm->semihosting_errno = EINVAL;
  284. }
  285. }
  286. break;
  287. case 0x11: /* SYS_TIME */
  288. result = time(NULL);
  289. break;
  290. case 0x13: /* SYS_ERRNO */
  291. result = arm->semihosting_errno;
  292. break;
  293. case 0x15: /* SYS_GET_CMDLINE */
  294. retval = target_read_memory(target, r1, 4, 2, params);
  295. if (retval != ERROR_OK)
  296. return retval;
  297. else {
  298. uint32_t a = target_buffer_get_u32(target, params+0);
  299. uint32_t l = target_buffer_get_u32(target, params+4);
  300. char *arg = "foobar";
  301. uint32_t s = strlen(arg) + 1;
  302. if (l < s)
  303. result = -1;
  304. else {
  305. retval = target_write_buffer(target, a, s, (void *)arg);
  306. if (retval != ERROR_OK)
  307. return retval;
  308. result = 0;
  309. }
  310. }
  311. break;
  312. case 0x16: /* SYS_HEAPINFO */
  313. retval = target_read_memory(target, r1, 4, 1, params);
  314. if (retval != ERROR_OK)
  315. return retval;
  316. else {
  317. uint32_t a = target_buffer_get_u32(target, params+0);
  318. /* tell the remote we have no idea */
  319. memset(params, 0, 4*4);
  320. retval = target_write_memory(target, a, 4, 4, params);
  321. if (retval != ERROR_OK)
  322. return retval;
  323. result = 0;
  324. }
  325. break;
  326. case 0x18: /* angel_SWIreason_ReportException */
  327. switch (r1) {
  328. case 0x20026: /* ADP_Stopped_ApplicationExit */
  329. fprintf(stderr, "semihosting: *** application exited ***\n");
  330. break;
  331. case 0x20000: /* ADP_Stopped_BranchThroughZero */
  332. case 0x20001: /* ADP_Stopped_UndefinedInstr */
  333. case 0x20002: /* ADP_Stopped_SoftwareInterrupt */
  334. case 0x20003: /* ADP_Stopped_PrefetchAbort */
  335. case 0x20004: /* ADP_Stopped_DataAbort */
  336. case 0x20005: /* ADP_Stopped_AddressException */
  337. case 0x20006: /* ADP_Stopped_IRQ */
  338. case 0x20007: /* ADP_Stopped_FIQ */
  339. case 0x20020: /* ADP_Stopped_BreakPoint */
  340. case 0x20021: /* ADP_Stopped_WatchPoint */
  341. case 0x20022: /* ADP_Stopped_StepComplete */
  342. case 0x20023: /* ADP_Stopped_RunTimeErrorUnknown */
  343. case 0x20024: /* ADP_Stopped_InternalError */
  344. case 0x20025: /* ADP_Stopped_UserInterruption */
  345. case 0x20027: /* ADP_Stopped_StackOverflow */
  346. case 0x20028: /* ADP_Stopped_DivisionByZero */
  347. case 0x20029: /* ADP_Stopped_OSSpecific */
  348. default:
  349. fprintf(stderr, "semihosting: exception %#x\n",
  350. (unsigned) r1);
  351. }
  352. return target_call_event_callbacks(target, TARGET_EVENT_HALTED);
  353. case 0x0d: /* SYS_TMPNAM */
  354. case 0x10: /* SYS_CLOCK */
  355. case 0x12: /* SYS_SYSTEM */
  356. case 0x17: /* angel_SWIreason_EnterSVC */
  357. case 0x30: /* SYS_ELAPSED */
  358. case 0x31: /* SYS_TICKFREQ */
  359. default:
  360. fprintf(stderr, "semihosting: unsupported call %#x\n",
  361. (unsigned) r0);
  362. result = -1;
  363. arm->semihosting_errno = ENOTSUP;
  364. }
  365. /* resume execution to the original mode */
  366. /* REVISIT this looks wrong ... ARM11 and Cortex-A8
  367. * should work this way at least sometimes.
  368. */
  369. if (is_arm7_9(target_to_arm7_9(target))) {
  370. uint32_t spsr;
  371. /* return value in R0 */
  372. buf_set_u32(arm->core_cache->reg_list[0].value, 0, 32, result);
  373. arm->core_cache->reg_list[0].dirty = 1;
  374. /* LR --> PC */
  375. buf_set_u32(arm->core_cache->reg_list[15].value, 0, 32,
  376. buf_get_u32(arm_reg_current(arm, 14)->value, 0, 32));
  377. arm->core_cache->reg_list[15].dirty = 1;
  378. /* saved PSR --> current PSR */
  379. spsr = buf_get_u32(arm->spsr->value, 0, 32);
  380. /* REVISIT should this be arm_set_cpsr(arm, spsr)
  381. * instead of a partially unrolled version?
  382. */
  383. buf_set_u32(arm->cpsr->value, 0, 32, spsr);
  384. arm->cpsr->dirty = 1;
  385. arm->core_mode = spsr & 0x1f;
  386. if (spsr & 0x20)
  387. arm->core_state = ARM_STATE_THUMB;
  388. } else {
  389. /* resume execution, this will be pc+2 to skip over the
  390. * bkpt instruction */
  391. /* return result in R0 */
  392. buf_set_u32(arm->core_cache->reg_list[0].value, 0, 32, result);
  393. arm->core_cache->reg_list[0].dirty = 1;
  394. }
  395. return target_resume(target, 1, 0, 0, 0);
  396. }
  397. /**
  398. * Checks for and processes an ARM semihosting request. This is meant
  399. * to be called when the target is stopped due to a debug mode entry.
  400. * If the value 0 is returned then there was nothing to process. A non-zero
  401. * return value signifies that a request was processed and the target resumed,
  402. * or an error was encountered, in which case the caller must return
  403. * immediately.
  404. *
  405. * @param target Pointer to the ARM target to process. This target must
  406. * not represent an ARMv6-M or ARMv7-M processor.
  407. * @param retval Pointer to a location where the return code will be stored
  408. * @return non-zero value if a request was processed or an error encountered
  409. */
  410. int arm_semihosting(struct target *target, int *retval)
  411. {
  412. struct arm *arm = target_to_arm(target);
  413. uint32_t pc, lr, spsr;
  414. struct reg *r;
  415. if (!arm->is_semihosting)
  416. return 0;
  417. if (is_arm7_9(target_to_arm7_9(target))) {
  418. if (arm->core_mode != ARM_MODE_SVC)
  419. return 0;
  420. /* Check for PC == 0x00000008 or 0xffff0008: Supervisor Call vector. */
  421. r = arm->pc;
  422. pc = buf_get_u32(r->value, 0, 32);
  423. if (pc != 0x00000008 && pc != 0xffff0008)
  424. return 0;
  425. r = arm_reg_current(arm, 14);
  426. lr = buf_get_u32(r->value, 0, 32);
  427. /* Core-specific code should make sure SPSR is retrieved
  428. * when the above checks pass...
  429. */
  430. if (!arm->spsr->valid) {
  431. LOG_ERROR("SPSR not valid!");
  432. *retval = ERROR_FAIL;
  433. return 1;
  434. }
  435. spsr = buf_get_u32(arm->spsr->value, 0, 32);
  436. /* check instruction that triggered this trap */
  437. if (spsr & (1 << 5)) {
  438. /* was in Thumb (or ThumbEE) mode */
  439. uint8_t insn_buf[2];
  440. uint16_t insn;
  441. *retval = target_read_memory(target, lr-2, 2, 1, insn_buf);
  442. if (*retval != ERROR_OK)
  443. return 1;
  444. insn = target_buffer_get_u16(target, insn_buf);
  445. /* SVC 0xab */
  446. if (insn != 0xDFAB)
  447. return 0;
  448. } else if (spsr & (1 << 24)) {
  449. /* was in Jazelle mode */
  450. return 0;
  451. } else {
  452. /* was in ARM mode */
  453. uint8_t insn_buf[4];
  454. uint32_t insn;
  455. *retval = target_read_memory(target, lr-4, 4, 1, insn_buf);
  456. if (*retval != ERROR_OK)
  457. return 1;
  458. insn = target_buffer_get_u32(target, insn_buf);
  459. /* SVC 0x123456 */
  460. if (insn != 0xEF123456)
  461. return 0;
  462. }
  463. } else if (is_armv7m(target_to_armv7m(target))) {
  464. uint16_t insn;
  465. if (target->debug_reason != DBG_REASON_BREAKPOINT)
  466. return 0;
  467. r = arm->pc;
  468. pc = buf_get_u32(r->value, 0, 32);
  469. pc &= ~1;
  470. *retval = target_read_u16(target, pc, &insn);
  471. if (*retval != ERROR_OK)
  472. return 1;
  473. /* bkpt 0xAB */
  474. if (insn != 0xBEAB)
  475. return 0;
  476. } else {
  477. LOG_ERROR("Unsupported semi-hosting Target");
  478. return 0;
  479. }
  480. *retval = do_semihosting(target);
  481. return 1;
  482. }