openocd/src/target/target/str730.cfg

#STR730 CPU


jtag_khz 3000
proc target_0_pre_reset {} {
	jtag_khz 10
}
proc target_0_post_reset {} {
	jtag_khz 3000
}


#use combined on interfaces or targets that can’t set TRST/SRST separately
#reset_config trst_and_srst srst_pulls_trst
reset_config trst_and_srst srst_pulls_trst

#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe

#jtag nTRST and nSRST delay
jtag_nsrst_delay 500
jtag_ntrst_delay 500

target arm7tdmi little 0 arm7tdmi

run_and_halt_time 0 30

target_script 0 gdb_program_config event/str730_program.script

working_area 0 0x40000000 0x4000 nobackup

#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank str7x 0x20000000 0x00040000 0 0 0 STR3x