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  1. /***************************************************************************
  2. * Copyright (C) 2006 by Magnus Lundin *
  3. * lundin@mlu.mine.nu *
  4. * *
  5. * Copyright (C) 2008 by Spencer Oliver *
  6. * spen@spen-soft.co.uk *
  7. * *
  8. * This program is free software; you can redistribute it and/or modify *
  9. * it under the terms of the GNU General Public License as published by *
  10. * the Free Software Foundation; either version 2 of the License, or *
  11. * (at your option) any later version. *
  12. * *
  13. * This program is distributed in the hope that it will be useful, *
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  16. * GNU General Public License for more details. *
  17. * *
  18. * You should have received a copy of the GNU General Public License *
  19. * along with this program; if not, write to the *
  20. * Free Software Foundation, Inc., *
  21. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  22. ***************************************************************************/
  23. .text
  24. .syntax unified
  25. .cpu cortex-m3
  26. .thumb
  27. .thumb_func
  28. .align 2
  29. /*
  30. Call with :
  31. r0 = buffer address
  32. r1 = destination address
  33. r2 = bytecount (in) - endaddr (work)
  34. Used registers:
  35. r3 = pFLASH_CTRL_BASE
  36. r4 = FLASHWRITECMD
  37. r5 = #1
  38. r6 = bytes written
  39. r7 = temp reg
  40. */
  41. write:
  42. ldr r3,pFLASH_CTRL_BASE
  43. ldr r4,FLASHWRITECMD
  44. movs r5, 1
  45. movs r6, #0
  46. mainloop:
  47. str r1, [r3, #0]
  48. ldr r7, [r0, r6]
  49. str r7, [r3, #4]
  50. str r4, [r3, #8]
  51. waitloop:
  52. ldr r7, [r3, #8]
  53. tst r7, r5
  54. bne waitloop
  55. adds r1, r1, #4
  56. adds r6, r6, #4
  57. cmp r6, r2
  58. bne mainloop
  59. bkpt #0
  60. pFLASH_CTRL_BASE: .word 0x400FD000
  61. FLASHWRITECMD: .word 0xA4420001