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  1. /***************************************************************************
  2. * Copyright (C) 2011 by Broadcom Corporation *
  3. * Evan Hunter - ehunter@broadcom.com *
  4. * *
  5. * This program is free software; you can redistribute it and/or modify *
  6. * it under the terms of the GNU General Public License as published by *
  7. * the Free Software Foundation; either version 2 of the License, or *
  8. * (at your option) any later version. *
  9. * *
  10. * This program is distributed in the hope that it will be useful, *
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  13. * GNU General Public License for more details. *
  14. * *
  15. * You should have received a copy of the GNU General Public License *
  16. * along with this program; if not, write to the *
  17. * Free Software Foundation, Inc., *
  18. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  19. ***************************************************************************/
  20. #ifdef HAVE_CONFIG_H
  21. #include "config.h"
  22. #endif
  23. #include "rtos.h"
  24. static const struct stack_register_offset rtos_standard_Cortex_M3_stack_offsets [] =
  25. { { 0x20, 32 }, // r0
  26. { 0x24, 32 }, // r1
  27. { 0x28, 32 }, // r2
  28. { 0x2c, 32 }, // r3
  29. { 0x00, 32 }, // r4
  30. { 0x04, 32 }, // r5
  31. { 0x08, 32 }, // r6
  32. { 0x0c, 32 }, // r7
  33. { 0x10, 32 }, // r8
  34. { 0x14, 32 }, // r9
  35. { 0x18, 32 }, // r10
  36. { 0x1c, 32 }, // r11
  37. { 0x30, 32 }, // r12
  38. { -2, 32 }, // sp
  39. { 0x34, 32 }, // lr
  40. { 0x38, 32 }, // pc
  41. { -1, 96 }, // FPA1
  42. { -1, 96 }, // FPA2
  43. { -1, 96 }, // FPA3
  44. { -1, 96 }, // FPA4
  45. { -1, 96 }, // FPA5
  46. { -1, 96 }, // FPA6
  47. { -1, 96 }, // FPA7
  48. { -1, 96 }, // FPA8
  49. { -1, 32 }, // FPS
  50. { 0x3c, 32 }, // xPSR
  51. };
  52. const struct rtos_register_stacking rtos_standard_Cortex_M3_stacking =
  53. {
  54. 0x40, // stack_registers_size
  55. 1, // stack_growth_direction
  56. 26, // num_output_registers
  57. rtos_standard_Cortex_M3_stack_offsets // register_offsets
  58. };