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openocd/tcl/board/imx27lnst.cfg

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  1. # The Linuxstamp-mx27 is board has a single IMX27 chip

  2. # For further info see http://opencircuits.com/Linuxstamp_mx27#OpenOCD

  3. source [find target/imx27.cfg]

  4. $_TARGETNAME configure -event gdb-attach { reset init }

  5. $_TARGETNAME configure -event reset-init { imx27lnst_init }

  6. 

  7. proc imx27lnst_init { } {

  8. 	# This setup puts RAM at 0xA0000000

  9. 

  10. 	# reset the board correctly

  11. 	adapter speed 500

  12. 	reset run

  13. 	reset halt

  14. 

  15. 	mww 0x10000000 0x20040304

  16. 	mww 0x10020000 0x00000000

  17. 	mww 0x10000004 0xDFFBFCFB

  18. 	mww 0x10020004 0xFFFFFFFF

  19. 

  20. 	sleep 100

  21. 

  22. 	# ========================================

  23. 	#  Configure DDR on CSD0 -- initial reset

  24. 	# ========================================

  25. 	mww 0xD8001010 0x00000008

  26. 

  27. 	sleep 100

  28. 

  29. 	# ========================================

  30. 	#  Configure DDR on CSD0 -- wait 5000 cycle

  31. 	# ========================================

  32. 	mww 0x10027828 0x55555555

  33. 	mww 0x10027830 0x55555555

  34. 	mww 0x10027834 0x55555555

  35. 	mww 0x10027838 0x00005005

  36. 	mww 0x1002783C 0x15555555

  37. 

  38. 	mww 0xD8001010 0x00000004

  39. 

  40. 	mww 0xD8001004 0x00795729

  41. 

  42. 	#mww 0xD8001000 0x92200000

  43. 	mww 0xD8001000 0x91120000

  44. 	mww 0xA0000F00 0x0

  45. 

  46. 	#mww 0xD8001000 0xA2200000

  47. 	mww 0xD8001000 0xA1120000

  48. 	mww 0xA0000F00 0x0

  49. 	mww 0xA0000F00 0x0

  50. 

  51. 	#mww 0xD8001000 0xB2200000

  52. 	mww 0xD8001000 0xB1120000

  53. 	mwb 0xA0000033 0xFF

  54. 	mwb 0xA1000000 0xAA

  55. 

  56. 	#mww 0xD8001000 0x82228085

  57. 	mww 0xD8001000 0x81128080

  58. 

  59. }