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  1. #
  2. # Texas Instruments CC26x0 - ARM Cortex-M3
  3. #
  4. # http://www.ti.com
  5. #
  6. source [find target/icepick.cfg]
  7. source [find target/ti-cjtag.cfg]
  8. if { [info exists CHIPNAME] } {
  9. set _CHIPNAME $CHIPNAME
  10. } else {
  11. set _CHIPNAME cc26x0
  12. }
  13. #
  14. # Main DAP
  15. #
  16. if { [info exists DAP_TAPID] } {
  17. set _DAP_TAPID $DAP_TAPID
  18. } else {
  19. set _DAP_TAPID 0x4BA00477
  20. }
  21. jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
  22. jtag configure $_CHIPNAME.cpu -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"
  23. #
  24. # ICEpick-C (JTAG route controller)
  25. #
  26. if { [info exists JRC_TAPID] } {
  27. set _JRC_TAPID $JRC_TAPID
  28. } else {
  29. set _JRC_TAPID 0x0B99A02F
  30. }
  31. jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
  32. jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.cpu"
  33. # A start sequence is needed to change from 2-pin cJTAG to 4-pin JTAG
  34. jtag configure $_CHIPNAME.jrc -event post-reset "ti_cjtag_to_4pin_jtag $_CHIPNAME.jrc"
  35. set _TARGETNAME $_CHIPNAME.cpu
  36. dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  37. target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
  38. if { [info exists WORKAREASIZE] } {
  39. set _WORKAREASIZE $WORKAREASIZE
  40. } else {
  41. set _WORKAREASIZE 0x4000
  42. }
  43. $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  44. set _FLASHNAME $_CHIPNAME.flash
  45. flash bank $_FLASHNAME cc26xx 0 0 0 0 $_TARGETNAME
  46. cortex_m reset_config vectreset