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  1. # Config for Texas Instruments low power RF SoC CC2538
  2. # http://www.ti.com/lit/pdf/swru319
  3. adapter speed 100
  4. source [find target/icepick.cfg]
  5. source [find target/ti-cjtag.cfg]
  6. if { [info exists CHIPNAME] } {
  7. set _CHIPNAME $CHIPNAME
  8. } else {
  9. set _CHIPNAME cc2538
  10. }
  11. #
  12. # Main DAP
  13. #
  14. if { [info exists DAP_TAPID] } {
  15. set _DAP_TAPID $DAP_TAPID
  16. } else {
  17. set _DAP_TAPID 0x8B96402F
  18. }
  19. jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
  20. jtag configure $_CHIPNAME.cpu -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"
  21. #
  22. # ICEpick-C (JTAG route controller)
  23. #
  24. if { [info exists JRC_TAPID] } {
  25. set _JRC_TAPID $JRC_TAPID
  26. } else {
  27. set _JRC_TAPID 0x8B96402F
  28. }
  29. jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
  30. # A start sequence is needed to change from cJTAG (Compact JTAG) to
  31. # 4-pin JTAG before talking via JTAG commands
  32. jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.cpu"
  33. jtag configure $_CHIPNAME.jrc -event post-reset "ti_cjtag_to_4pin_jtag $_CHIPNAME.jrc"
  34. #
  35. # Cortex-M3 target
  36. #
  37. set _TARGETNAME $_CHIPNAME.cpu
  38. dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  39. target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
  40. # Flash
  41. if { [info exists WORKAREASIZE] } {
  42. set _WORKAREASIZE $WORKAREASIZE
  43. } else {
  44. set _WORKAREASIZE 0x4000
  45. }
  46. $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  47. set _FLASHNAME $_CHIPNAME.flash
  48. flash bank $_FLASHNAME cc2538 0 0 0 0 $_TARGETNAME