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22 KiB

  1. /***************************************************************************
  2. * Copyright (C) 2011 by Mathias Kuester *
  3. * kesmtp@freenet.de *
  4. * *
  5. * Copyright (C) 2011 sleep(5) ltd *
  6. * tomas@sleepfive.com *
  7. * *
  8. * Copyright (C) 2012 by Christopher D. Kilgour *
  9. * techie at whiterocker.com *
  10. * *
  11. * This program is free software; you can redistribute it and/or modify *
  12. * it under the terms of the GNU General Public License as published by *
  13. * the Free Software Foundation; either version 2 of the License, or *
  14. * (at your option) any later version. *
  15. * *
  16. * This program is distributed in the hope that it will be useful, *
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  19. * GNU General Public License for more details. *
  20. * *
  21. * You should have received a copy of the GNU General Public License *
  22. * along with this program; if not, write to the *
  23. * Free Software Foundation, Inc., *
  24. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  25. ***************************************************************************/
  26. #ifdef HAVE_CONFIG_H
  27. #include "config.h"
  28. #endif
  29. #include "imp.h"
  30. #include "helper/binarybuffer.h"
  31. /*
  32. * Implementation Notes
  33. *
  34. * The persistent memories in the Kinetis chip families K10 through
  35. * K70 are all manipulated with the Flash Memory Module. Some
  36. * variants call this module the FTFE, others call it the FTFL. To
  37. * indicate that both are considered here, we use FTFX.
  38. *
  39. * Within the module, according to the chip variant, the persistent
  40. * memory is divided into what Freescale terms Program Flash, FlexNVM,
  41. * and FlexRAM. All chip variants have Program Flash. Some chip
  42. * variants also have FlexNVM and FlexRAM, which always appear
  43. * together.
  44. *
  45. * A given Kinetis chip may have 2 or 4 blocks of flash. Here we map
  46. * each block to a separate bank. Each block size varies by chip and
  47. * may be determined by the read-only SIM_FCFG1 register. The sector
  48. * size within each bank/block varies by the chip granularity as
  49. * described below.
  50. *
  51. * Kinetis offers four different of flash granularities applicable
  52. * across the chip families. The granularity is apparently reflected
  53. * by at least the reference manual suffix. For example, for chip
  54. * MK60FN1M0VLQ12, reference manual K60P144M150SF3RM ends in "SF3RM",
  55. * where the "3" indicates there are four flash blocks with 4kiB
  56. * sectors. All possible granularities are indicated below.
  57. *
  58. * The first half of the flash (1 or 2 blocks, depending on the
  59. * granularity) is always Program Flash and always starts at address
  60. * 0x00000000. The "PFLSH" flag, bit 23 of the read-only SIM_FCFG2
  61. * register, determines whether the second half of the flash is also
  62. * Program Flash or FlexNVM+FlexRAM. When PFLSH is set, the second
  63. * half of flash is Program Flash and is contiguous in the memory map
  64. * from the first half. When PFLSH is clear, the second half of flash
  65. * is FlexNVM and always starts at address 0x10000000. FlexRAM, which
  66. * is also present when PFLSH is clear, always starts at address
  67. * 0x14000000.
  68. *
  69. * The Flash Memory Module provides a register set where flash
  70. * commands are loaded to perform flash operations like erase and
  71. * program. Different commands are available depending on whether
  72. * Program Flash or FlexNVM/FlexRAM is being manipulated. Although
  73. * the commands used are quite consistent between flash blocks, the
  74. * parameters they accept differ according to the flash granularity.
  75. * Some Kinetis chips have different granularity between Program Flash
  76. * and FlexNVM/FlexRAM, so flash command arguments may differ between
  77. * blocks in the same chip.
  78. *
  79. * Although not documented as such by Freescale, it appears that bits
  80. * 8:7 of the read-only SIM_SDID register reflect the granularity
  81. * settings 0..3, so sector sizes and block counts are applicable
  82. * according to the following table.
  83. */
  84. const struct {
  85. unsigned pflash_sector_size_bytes;
  86. unsigned nvm_sector_size_bytes;
  87. unsigned num_blocks;
  88. } kinetis_flash_params[4] = {
  89. { 1<<10, 1<<10, 2 },
  90. { 2<<10, 1<<10, 2 },
  91. { 2<<10, 2<<10, 2 },
  92. { 4<<10, 4<<10, 4 }
  93. };
  94. struct kinetis_flash_bank {
  95. unsigned granularity;
  96. unsigned bank_ordinal;
  97. uint32_t sector_size;
  98. uint32_t protection_size;
  99. uint32_t sim_sdid;
  100. uint32_t sim_fcfg1;
  101. uint32_t sim_fcfg2;
  102. enum {
  103. FC_AUTO = 0,
  104. FC_PFLASH,
  105. FC_FLEX_NVM,
  106. FC_FLEX_RAM,
  107. } flash_class;
  108. };
  109. FLASH_BANK_COMMAND_HANDLER(kinetis_flash_bank_command)
  110. {
  111. struct kinetis_flash_bank *bank_info;
  112. if (CMD_ARGC < 6)
  113. return ERROR_COMMAND_SYNTAX_ERROR;
  114. LOG_INFO("add flash_bank kinetis %s", bank->name);
  115. bank_info = malloc(sizeof(struct kinetis_flash_bank));
  116. memset(bank_info, 0, sizeof(struct kinetis_flash_bank));
  117. bank->driver_priv = bank_info;
  118. return ERROR_OK;
  119. }
  120. static int kinetis_protect(struct flash_bank *bank, int set, int first,
  121. int last)
  122. {
  123. LOG_WARNING("kinetis_protect not supported yet");
  124. /* FIXME: TODO */
  125. if (bank->target->state != TARGET_HALTED) {
  126. LOG_ERROR("Target not halted");
  127. return ERROR_TARGET_NOT_HALTED;
  128. }
  129. return ERROR_FLASH_BANK_INVALID;
  130. }
  131. static int kinetis_protect_check(struct flash_bank *bank)
  132. {
  133. struct kinetis_flash_bank *kinfo = bank->driver_priv;
  134. if (bank->target->state != TARGET_HALTED) {
  135. LOG_ERROR("Target not halted");
  136. return ERROR_TARGET_NOT_HALTED;
  137. }
  138. if (kinfo->flash_class == FC_PFLASH) {
  139. int result;
  140. uint8_t buffer[4];
  141. uint32_t fprot, psec;
  142. int i, b;
  143. /* read protection register FTFx_FPROT */
  144. result = target_read_memory(bank->target, 0x40020010, 1, 4, buffer);
  145. if (result != ERROR_OK)
  146. return result;
  147. fprot = target_buffer_get_u32(bank->target, buffer);
  148. /*
  149. * Every bit protects 1/32 of the full flash (not necessarily
  150. * just this bank), but we enforce the bank ordinals for
  151. * PFlash to start at zero.
  152. */
  153. b = kinfo->bank_ordinal * (bank->size / kinfo->protection_size);
  154. for (psec = 0, i = 0; i < bank->num_sectors; i++) {
  155. if ((fprot >> b) & 1)
  156. bank->sectors[i].is_protected = 0;
  157. else
  158. bank->sectors[i].is_protected = 1;
  159. psec += bank->sectors[i].size;
  160. if (psec >= kinfo->protection_size) {
  161. psec = 0;
  162. b++;
  163. }
  164. }
  165. } else {
  166. LOG_ERROR("Protection checks for FlexNVM not yet supported");
  167. return ERROR_FLASH_BANK_INVALID;
  168. }
  169. return ERROR_OK;
  170. }
  171. static int kinetis_ftfx_command(struct flash_bank *bank, uint32_t w0,
  172. uint32_t w1, uint32_t w2, uint8_t *ftfx_fstat)
  173. {
  174. uint8_t buffer[12];
  175. int result, i;
  176. /* wait for done */
  177. for (i = 0; i < 50; i++) {
  178. result =
  179. target_read_memory(bank->target, 0x40020000, 1, 1, buffer);
  180. if (result != ERROR_OK)
  181. return result;
  182. if (buffer[0] & 0x80)
  183. break;
  184. buffer[0] = 0x00;
  185. }
  186. if (buffer[0] != 0x80) {
  187. /* reset error flags */
  188. buffer[0] = 0x30;
  189. result =
  190. target_write_memory(bank->target, 0x40020000, 1, 1, buffer);
  191. if (result != ERROR_OK)
  192. return result;
  193. }
  194. target_buffer_set_u32(bank->target, buffer, w0);
  195. target_buffer_set_u32(bank->target, buffer + 4, w1);
  196. target_buffer_set_u32(bank->target, buffer + 8, w2);
  197. result = target_write_memory(bank->target, 0x40020004, 4, 3, buffer);
  198. if (result != ERROR_OK)
  199. return result;
  200. /* start command */
  201. buffer[0] = 0x80;
  202. result = target_write_memory(bank->target, 0x40020000, 1, 1, buffer);
  203. if (result != ERROR_OK)
  204. return result;
  205. /* wait for done */
  206. for (i = 0; i < 50; i++) {
  207. result =
  208. target_read_memory(bank->target, 0x40020000, 1, 1, ftfx_fstat);
  209. if (result != ERROR_OK)
  210. return result;
  211. if (*ftfx_fstat & 0x80)
  212. break;
  213. }
  214. if ((*ftfx_fstat & 0xf0) != 0x80) {
  215. LOG_ERROR
  216. ("ftfx command failed FSTAT: %02X W0: %08X W1: %08X W2: %08X",
  217. *ftfx_fstat, w0, w1, w2);
  218. return ERROR_FLASH_OPERATION_FAILED;
  219. }
  220. return ERROR_OK;
  221. }
  222. static int kinetis_erase(struct flash_bank *bank, int first, int last)
  223. {
  224. int result, i;
  225. uint32_t w0 = 0, w1 = 0, w2 = 0;
  226. if (bank->target->state != TARGET_HALTED) {
  227. LOG_ERROR("Target not halted");
  228. return ERROR_TARGET_NOT_HALTED;
  229. }
  230. if ((first > bank->num_sectors) || (last > bank->num_sectors))
  231. return ERROR_FLASH_OPERATION_FAILED;
  232. /*
  233. * FIXME: TODO: use the 'Erase Flash Block' command if the
  234. * requested erase is PFlash or NVM and encompasses the entire
  235. * block. Should be quicker.
  236. */
  237. for (i = first; i <= last; i++) {
  238. uint8_t ftfx_fstat;
  239. /* set command and sector address */
  240. w0 = (0x09 << 24) | (bank->base + bank->sectors[i].offset);
  241. result = kinetis_ftfx_command(bank, w0, w1, w2, &ftfx_fstat);
  242. if (result != ERROR_OK) {
  243. LOG_WARNING("erase sector %d failed", i);
  244. return ERROR_FLASH_OPERATION_FAILED;
  245. }
  246. bank->sectors[i].is_erased = 1;
  247. }
  248. if (first == 0) {
  249. LOG_WARNING
  250. ("flash configuration field erased, please reset the device");
  251. }
  252. return ERROR_OK;
  253. }
  254. static int kinetis_write(struct flash_bank *bank, uint8_t *buffer,
  255. uint32_t offset, uint32_t count)
  256. {
  257. unsigned int i, result, fallback = 0;
  258. uint8_t buf[8];
  259. uint32_t wc, w0 = 0, w1 = 0, w2 = 0;
  260. struct kinetis_flash_bank *kinfo = bank->driver_priv;
  261. if (bank->target->state != TARGET_HALTED) {
  262. LOG_ERROR("Target not halted");
  263. return ERROR_TARGET_NOT_HALTED;
  264. }
  265. if (kinfo->flash_class == FC_FLEX_NVM) {
  266. uint8_t ftfx_fstat;
  267. LOG_DEBUG("flash write into FlexNVM @%08X", offset);
  268. /* make flex ram available */
  269. w0 = (0x81 << 24) | 0x00ff0000;
  270. result = kinetis_ftfx_command(bank, w0, w1, w2, &ftfx_fstat);
  271. if (result != ERROR_OK)
  272. return ERROR_FLASH_OPERATION_FAILED;
  273. /* check if ram ready */
  274. result = target_read_memory(bank->target, 0x40020001, 1, 1, buf);
  275. if (result != ERROR_OK)
  276. return result;
  277. if (!(buf[0] & (1 << 1))) {
  278. /* fallback to longword write */
  279. fallback = 1;
  280. LOG_WARNING("ram not ready, fallback to slow longword write (FCNFG: %02X)",
  281. buf[0]);
  282. }
  283. } else {
  284. LOG_DEBUG("flash write into PFLASH @08%X", offset);
  285. }
  286. /* program section command */
  287. if (fallback == 0) {
  288. unsigned prog_section_bytes = kinfo->sector_size >> 8;
  289. for (i = 0; i < count; i += kinfo->sector_size) {
  290. uint8_t ftfx_fstat;
  291. wc = kinfo->sector_size / 4;
  292. if ((count - i) < kinfo->sector_size) {
  293. wc = count - i;
  294. wc /= 4;
  295. }
  296. LOG_DEBUG("write section @ %08X with length %d",
  297. offset + i, wc * 4);
  298. /* write data to flexram */
  299. result =
  300. target_write_memory(bank->target, 0x14000000, 4, wc,
  301. buffer + i);
  302. if (result != ERROR_OK) {
  303. LOG_ERROR("target_write_memory failed");
  304. return result;
  305. }
  306. /* execute section command */
  307. w0 = (0x0b << 24) | (bank->base + offset + i);
  308. w1 = ((wc * 4 / prog_section_bytes) << 16);
  309. result = kinetis_ftfx_command(bank, w0, w1, w2, &ftfx_fstat);
  310. if (result != ERROR_OK)
  311. return ERROR_FLASH_OPERATION_FAILED;
  312. }
  313. }
  314. /* program longword command, not supported in "SF3" devices */
  315. else if (kinfo->granularity != 3) {
  316. for (i = 0; i < count; i += 4) {
  317. uint8_t ftfx_fstat;
  318. LOG_DEBUG("write longword @ %08X", offset + i);
  319. w0 = (0x06 << 24) | (bank->base + offset + i);
  320. w1 = buf_get_u32(buffer + offset + i, 0, 32);
  321. result = kinetis_ftfx_command(bank, w0, w1, w2, &ftfx_fstat);
  322. if (result != ERROR_OK)
  323. return ERROR_FLASH_OPERATION_FAILED;
  324. }
  325. } else {
  326. LOG_ERROR("Flash write strategy not implemented");
  327. return ERROR_FLASH_OPERATION_FAILED;
  328. }
  329. return ERROR_OK;
  330. }
  331. static int kinetis_read_part_info(struct flash_bank *bank)
  332. {
  333. int result, i;
  334. uint8_t buf[4];
  335. uint32_t offset = 0;
  336. uint8_t fcfg1_nvmsize, fcfg1_pfsize, fcfg1_eesize, fcfg2_pflsh;
  337. uint32_t nvm_size = 0, pf_size = 0, ee_size = 0;
  338. unsigned granularity, num_blocks = 0, num_pflash_blocks = 0, num_nvm_blocks = 0,
  339. first_nvm_bank = 0, reassign = 0;
  340. struct kinetis_flash_bank *kinfo = bank->driver_priv;
  341. result = target_read_memory(bank->target, 0x40048024, 1, 4, buf);
  342. if (result != ERROR_OK)
  343. return result;
  344. kinfo->sim_sdid = target_buffer_get_u32(bank->target, buf);
  345. granularity = (kinfo->sim_sdid >> 7) & 0x03;
  346. result = target_read_memory(bank->target, 0x4004804c, 1, 4, buf);
  347. if (result != ERROR_OK)
  348. return result;
  349. kinfo->sim_fcfg1 = target_buffer_get_u32(bank->target, buf);
  350. result = target_read_memory(bank->target, 0x40048050, 1, 4, buf);
  351. if (result != ERROR_OK)
  352. return result;
  353. kinfo->sim_fcfg2 = target_buffer_get_u32(bank->target, buf);
  354. fcfg2_pflsh = (kinfo->sim_fcfg2 >> 23) & 0x01;
  355. LOG_DEBUG("SDID: %08X FCFG1: %08X FCFG2: %08X", kinfo->sim_sdid,
  356. kinfo->sim_fcfg1, kinfo->sim_fcfg2);
  357. fcfg1_nvmsize = (uint8_t)((kinfo->sim_fcfg1 >> 28) & 0x0f);
  358. fcfg1_pfsize = (uint8_t)((kinfo->sim_fcfg1 >> 24) & 0x0f);
  359. fcfg1_eesize = (uint8_t)((kinfo->sim_fcfg1 >> 16) & 0x0f);
  360. /* when the PFLSH bit is set, there is no FlexNVM/FlexRAM */
  361. if (!fcfg2_pflsh) {
  362. switch (fcfg1_nvmsize) {
  363. case 0x03:
  364. case 0x07:
  365. case 0x09:
  366. case 0x0b:
  367. nvm_size = 1 << (14 + (fcfg1_nvmsize >> 1));
  368. break;
  369. case 0x0f:
  370. if (granularity == 3)
  371. nvm_size = 512<<10;
  372. else
  373. nvm_size = 256<<10;
  374. break;
  375. default:
  376. nvm_size = 0;
  377. break;
  378. }
  379. switch (fcfg1_eesize) {
  380. case 0x00:
  381. case 0x01:
  382. case 0x02:
  383. case 0x03:
  384. case 0x04:
  385. case 0x05:
  386. case 0x06:
  387. case 0x07:
  388. case 0x08:
  389. case 0x09:
  390. ee_size = (16 << (10 - fcfg1_eesize));
  391. break;
  392. default:
  393. ee_size = 0;
  394. break;
  395. }
  396. }
  397. switch (fcfg1_pfsize) {
  398. case 0x03:
  399. case 0x05:
  400. case 0x07:
  401. case 0x09:
  402. case 0x0b:
  403. case 0x0d:
  404. pf_size = 1 << (14 + (fcfg1_pfsize >> 1));
  405. break;
  406. case 0x0f:
  407. if (granularity == 3)
  408. pf_size = 1024<<10;
  409. else if (fcfg2_pflsh)
  410. pf_size = 512<<10;
  411. else
  412. pf_size = 256<<10;
  413. break;
  414. default:
  415. pf_size = 0;
  416. break;
  417. }
  418. LOG_DEBUG("FlexNVM: %d PFlash: %d FlexRAM: %d PFLSH: %d",
  419. nvm_size, pf_size, ee_size, fcfg2_pflsh);
  420. num_blocks = kinetis_flash_params[granularity].num_blocks;
  421. num_pflash_blocks = num_blocks / (2 - fcfg2_pflsh);
  422. first_nvm_bank = num_pflash_blocks;
  423. num_nvm_blocks = num_blocks - num_pflash_blocks;
  424. LOG_DEBUG("%d blocks total: %d PFlash, %d FlexNVM",
  425. num_blocks, num_pflash_blocks, num_nvm_blocks);
  426. /*
  427. * If the flash class is already assigned, verify the
  428. * parameters.
  429. */
  430. if (kinfo->flash_class != FC_AUTO) {
  431. if (kinfo->bank_ordinal != (unsigned) bank->bank_number) {
  432. LOG_WARNING("Flash ordinal/bank number mismatch");
  433. reassign = 1;
  434. } else if (kinfo->granularity != granularity) {
  435. LOG_WARNING("Flash granularity mismatch");
  436. reassign = 1;
  437. } else {
  438. switch (kinfo->flash_class) {
  439. case FC_PFLASH:
  440. if (kinfo->bank_ordinal >= first_nvm_bank) {
  441. LOG_WARNING("Class mismatch, bank %d is not PFlash",
  442. bank->bank_number);
  443. reassign = 1;
  444. } else if (bank->size != (pf_size / num_pflash_blocks)) {
  445. LOG_WARNING("PFlash size mismatch");
  446. reassign = 1;
  447. } else if (bank->base !=
  448. (0x00000000 + bank->size * kinfo->bank_ordinal)) {
  449. LOG_WARNING("PFlash address range mismatch");
  450. reassign = 1;
  451. } else if (kinfo->sector_size !=
  452. kinetis_flash_params[granularity].pflash_sector_size_bytes) {
  453. LOG_WARNING("PFlash sector size mismatch");
  454. reassign = 1;
  455. } else {
  456. LOG_DEBUG("PFlash bank %d already configured okay",
  457. kinfo->bank_ordinal);
  458. }
  459. break;
  460. case FC_FLEX_NVM:
  461. if ((kinfo->bank_ordinal >= num_blocks) ||
  462. (kinfo->bank_ordinal < first_nvm_bank)) {
  463. LOG_WARNING("Class mismatch, bank %d is not FlexNVM",
  464. bank->bank_number);
  465. reassign = 1;
  466. } else if (bank->size != (nvm_size / num_nvm_blocks)) {
  467. LOG_WARNING("FlexNVM size mismatch");
  468. reassign = 1;
  469. } else if (bank->base !=
  470. (0x10000000 + bank->size * kinfo->bank_ordinal)) {
  471. LOG_WARNING("FlexNVM address range mismatch");
  472. reassign = 1;
  473. } else if (kinfo->sector_size !=
  474. kinetis_flash_params[granularity].nvm_sector_size_bytes) {
  475. LOG_WARNING("FlexNVM sector size mismatch");
  476. reassign = 1;
  477. } else {
  478. LOG_DEBUG("FlexNVM bank %d already configured okay",
  479. kinfo->bank_ordinal);
  480. }
  481. break;
  482. case FC_FLEX_RAM:
  483. if (kinfo->bank_ordinal != num_blocks) {
  484. LOG_WARNING("Class mismatch, bank %d is not FlexRAM",
  485. bank->bank_number);
  486. reassign = 1;
  487. } else if (bank->size != ee_size) {
  488. LOG_WARNING("FlexRAM size mismatch");
  489. reassign = 1;
  490. } else if (bank->base != 0x14000000) {
  491. LOG_WARNING("FlexRAM address mismatch");
  492. reassign = 1;
  493. } else if (kinfo->sector_size !=
  494. kinetis_flash_params[granularity].nvm_sector_size_bytes) {
  495. LOG_WARNING("FlexRAM sector size mismatch");
  496. reassign = 1;
  497. } else {
  498. LOG_DEBUG("FlexRAM bank %d already configured okay",
  499. kinfo->bank_ordinal);
  500. }
  501. break;
  502. default:
  503. LOG_WARNING("Unknown or inconsistent flash class");
  504. reassign = 1;
  505. break;
  506. }
  507. }
  508. } else {
  509. LOG_INFO("Probing flash info for bank %d", bank->bank_number);
  510. reassign = 1;
  511. }
  512. if (!reassign)
  513. return ERROR_OK;
  514. kinfo->granularity = granularity;
  515. if ((unsigned)bank->bank_number < num_pflash_blocks) {
  516. /* pflash, banks start at address zero */
  517. kinfo->flash_class = FC_PFLASH;
  518. bank->size = (pf_size / num_pflash_blocks);
  519. bank->base = 0x00000000 + bank->size * bank->bank_number;
  520. kinfo->sector_size = kinetis_flash_params[granularity].pflash_sector_size_bytes;
  521. kinfo->protection_size = pf_size / 32;
  522. } else if ((unsigned)bank->bank_number < num_blocks) {
  523. /* nvm, banks start at address 0x10000000 */
  524. kinfo->flash_class = FC_FLEX_NVM;
  525. bank->size = (nvm_size / num_nvm_blocks);
  526. bank->base = 0x10000000 + bank->size * (bank->bank_number - first_nvm_bank);
  527. kinfo->sector_size = kinetis_flash_params[granularity].nvm_sector_size_bytes;
  528. kinfo->protection_size = 0; /* FIXME: TODO: depends on DEPART bits, chip */
  529. } else if ((unsigned)bank->bank_number == num_blocks) {
  530. LOG_ERROR("FlexRAM support not yet implemented");
  531. return ERROR_FLASH_OPER_UNSUPPORTED;
  532. } else {
  533. LOG_ERROR("Cannot determine parameters for bank %d, only %d banks on device",
  534. bank->bank_number, num_blocks);
  535. return ERROR_FLASH_BANK_INVALID;
  536. }
  537. if (bank->sectors) {
  538. free(bank->sectors);
  539. bank->sectors = NULL;
  540. }
  541. bank->num_sectors = bank->size / kinfo->sector_size;
  542. assert(bank->num_sectors > 0);
  543. bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
  544. for (i = 0; i < bank->num_sectors; i++) {
  545. bank->sectors[i].offset = offset;
  546. bank->sectors[i].size = kinfo->sector_size;
  547. offset += kinfo->sector_size;
  548. bank->sectors[i].is_erased = -1;
  549. bank->sectors[i].is_protected = 1;
  550. }
  551. return ERROR_OK;
  552. }
  553. static int kinetis_probe(struct flash_bank *bank)
  554. {
  555. if (bank->target->state != TARGET_HALTED) {
  556. LOG_WARNING("Cannot communicate... target not halted.");
  557. return ERROR_TARGET_NOT_HALTED;
  558. }
  559. return kinetis_read_part_info(bank);
  560. }
  561. static int kinetis_auto_probe(struct flash_bank *bank)
  562. {
  563. struct kinetis_flash_bank *kinfo = bank->driver_priv;
  564. if (kinfo->sim_sdid)
  565. return ERROR_OK;
  566. return kinetis_probe(bank);
  567. }
  568. static int kinetis_info(struct flash_bank *bank, char *buf, int buf_size)
  569. {
  570. const char *bank_class_names[] = {
  571. "(ANY)", "PFlash", "FlexNVM", "FlexRAM"
  572. };
  573. struct kinetis_flash_bank *kinfo = bank->driver_priv;
  574. (void) snprintf(buf, buf_size,
  575. "%s driver for %s flash bank %s at 0x%8.8" PRIx32 "",
  576. bank->driver->name, bank_class_names[kinfo->flash_class],
  577. bank->name, bank->base);
  578. return ERROR_OK;
  579. }
  580. static int kinetis_blank_check(struct flash_bank *bank)
  581. {
  582. struct kinetis_flash_bank *kinfo = bank->driver_priv;
  583. if (bank->target->state != TARGET_HALTED) {
  584. LOG_ERROR("Target not halted");
  585. return ERROR_TARGET_NOT_HALTED;
  586. }
  587. if (kinfo->flash_class == FC_PFLASH) {
  588. int result;
  589. uint32_t w0 = 0, w1 = 0, w2 = 0;
  590. uint8_t ftfx_fstat;
  591. /* check if whole bank is blank */
  592. w0 = (0x00 << 24) | bank->base;
  593. w1 = 0; /* "normal margin" */
  594. result = kinetis_ftfx_command(bank, w0, w1, w2, &ftfx_fstat);
  595. if (result != ERROR_OK)
  596. return result;
  597. if (ftfx_fstat & 0x01) {
  598. /* the whole bank is not erased, check sector-by-sector */
  599. int i;
  600. for (i = 0; i < bank->num_sectors; i++) {
  601. w0 = (0x01 << 24) | (bank->base + bank->sectors[i].offset);
  602. w1 = (0x100 << 16) | 0; /* normal margin */
  603. result = kinetis_ftfx_command(bank, w0, w1, w2, &ftfx_fstat);
  604. if (result == ERROR_OK) {
  605. bank->sectors[i].is_erased = !(ftfx_fstat & 0x01);
  606. } else {
  607. LOG_DEBUG("Ignoring errored PFlash sector blank-check");
  608. bank->sectors[i].is_erased = -1;
  609. }
  610. }
  611. } else {
  612. /* the whole bank is erased, update all sectors */
  613. int i;
  614. for (i = 0; i < bank->num_sectors; i++)
  615. bank->sectors[i].is_erased = 1;
  616. }
  617. } else {
  618. LOG_WARNING("kinetis_blank_check not supported yet for FlexNVM");
  619. return ERROR_FLASH_OPERATION_FAILED;
  620. }
  621. return ERROR_OK;
  622. }
  623. static int kinetis_flash_read(struct flash_bank *bank,
  624. uint8_t *buffer, uint32_t offset, uint32_t count)
  625. {
  626. LOG_WARNING("kinetis_flash_read not supported yet");
  627. if (bank->target->state != TARGET_HALTED) {
  628. LOG_ERROR("Target not halted");
  629. return ERROR_TARGET_NOT_HALTED;
  630. }
  631. return ERROR_FLASH_OPERATION_FAILED;
  632. }
  633. struct flash_driver kinetis_flash = {
  634. .name = "kinetis",
  635. .flash_bank_command = kinetis_flash_bank_command,
  636. .erase = kinetis_erase,
  637. .protect = kinetis_protect,
  638. .write = kinetis_write,
  639. .read = kinetis_flash_read,
  640. .probe = kinetis_probe,
  641. .auto_probe = kinetis_auto_probe,
  642. .erase_check = kinetis_blank_check,
  643. .protect_check = kinetis_protect_check,
  644. .info = kinetis_info,
  645. };