- fix build warning in cortex_m3 - code cleanup - remove trailing lf and convert c++ comments git-svn-id: svn://svn.berlios.de/openocd/trunk@1238 b42882b7-edfa-0310-969c-e2dbd0fdcd60tags/v0.1.0
@@ -148,10 +148,10 @@ typedef struct cfi_fixup_s | |||
} cfi_fixup_t; | |||
#define CFI_MFR_AMD 0x0001 | |||
#define CFI_MFR_FUJITSU 0x0004 | |||
#define CFI_MFR_FUJITSU 0x0004 | |||
#define CFI_MFR_ATMEL 0x001F | |||
#define CFI_MFR_ST 0x0020 /* STMicroelectronics */ | |||
#define CFI_MFR_AMIC 0x0037 | |||
#define CFI_MFR_AMIC 0x0037 | |||
#define CFI_MFR_SST 0x00BF | |||
#define CFI_MFR_MX 0x00C2 | |||
@@ -25,7 +25,6 @@ | |||
#include "replacements.h" | |||
#include "flash.h" | |||
#include "target.h" | |||
@@ -37,8 +36,6 @@ | |||
#include "../target/embeddedice.h" | |||
#include "types.h" | |||
int ecosflash_register_commands(struct command_context_s *cmd_ctx); | |||
int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank); | |||
int ecosflash_erase(struct flash_bank_s *bank, int first, int last); | |||
@@ -99,42 +96,41 @@ flash_errmsg(int err); | |||
#define FLASH_ERR_DRV_WRONG_PART 0x0d /* Driver does not support device */ | |||
#define FLASH_ERR_LOW_VOLTAGE 0x0e /* Not enough juice to complete job */ | |||
char * | |||
flash_errmsg(int err) | |||
{ | |||
switch (err) { | |||
case FLASH_ERR_OK: | |||
return "No error - operation complete"; | |||
case FLASH_ERR_ERASE_SUSPEND: | |||
return "Device is in erase suspend state"; | |||
case FLASH_ERR_PROGRAM_SUSPEND: | |||
return "Device is in program suspend state"; | |||
case FLASH_ERR_INVALID: | |||
return "Invalid FLASH address"; | |||
case FLASH_ERR_ERASE: | |||
return "Error trying to erase"; | |||
case FLASH_ERR_LOCK: | |||
return "Error trying to lock/unlock"; | |||
case FLASH_ERR_PROGRAM: | |||
return "Error trying to program"; | |||
case FLASH_ERR_PROTOCOL: | |||
return "Generic error"; | |||
case FLASH_ERR_PROTECT: | |||
return "Device/region is write-protected"; | |||
case FLASH_ERR_NOT_INIT: | |||
return "FLASH sub-system not initialized"; | |||
case FLASH_ERR_DRV_VERIFY: | |||
return "Data verify failed after operation"; | |||
case FLASH_ERR_DRV_TIMEOUT: | |||
return "Driver timed out waiting for device"; | |||
case FLASH_ERR_DRV_WRONG_PART: | |||
return "Driver does not support device"; | |||
case FLASH_ERR_LOW_VOLTAGE: | |||
return "Device reports low voltage"; | |||
default: | |||
return "Unknown error"; | |||
} | |||
switch (err) { | |||
case FLASH_ERR_OK: | |||
return "No error - operation complete"; | |||
case FLASH_ERR_ERASE_SUSPEND: | |||
return "Device is in erase suspend state"; | |||
case FLASH_ERR_PROGRAM_SUSPEND: | |||
return "Device is in program suspend state"; | |||
case FLASH_ERR_INVALID: | |||
return "Invalid FLASH address"; | |||
case FLASH_ERR_ERASE: | |||
return "Error trying to erase"; | |||
case FLASH_ERR_LOCK: | |||
return "Error trying to lock/unlock"; | |||
case FLASH_ERR_PROGRAM: | |||
return "Error trying to program"; | |||
case FLASH_ERR_PROTOCOL: | |||
return "Generic error"; | |||
case FLASH_ERR_PROTECT: | |||
return "Device/region is write-protected"; | |||
case FLASH_ERR_NOT_INIT: | |||
return "FLASH sub-system not initialized"; | |||
case FLASH_ERR_DRV_VERIFY: | |||
return "Data verify failed after operation"; | |||
case FLASH_ERR_DRV_TIMEOUT: | |||
return "Driver timed out waiting for device"; | |||
case FLASH_ERR_DRV_WRONG_PART: | |||
return "Driver does not support device"; | |||
case FLASH_ERR_LOW_VOLTAGE: | |||
return "Device reports low voltage"; | |||
default: | |||
return "Unknown error"; | |||
} | |||
} | |||
#endif | |||
@@ -185,7 +181,6 @@ int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, c | |||
return ERROR_OK; | |||
} | |||
int loadDriver(ecosflash_flash_bank_t *info) | |||
{ | |||
u32 buf_cnt; | |||
@@ -228,7 +223,6 @@ int loadDriver(ecosflash_flash_bank_t *info) | |||
return ERROR_OK; | |||
} | |||
static int const OFFSET_ERASE=0x0; | |||
static int const OFFSET_ERASE_SIZE=0x8; | |||
static int const OFFSET_FLASH=0xc; | |||
@@ -236,7 +230,6 @@ static int const OFFSET_FLASH_SIZE=0x8; | |||
static int const OFFSET_GET_WORKAREA=0x18; | |||
static int const OFFSET_GET_WORKAREA_SIZE=0x4; | |||
int runCode(ecosflash_flash_bank_t *info, | |||
u32 codeStart, u32 codeStop, u32 r0, u32 r1, u32 r2, | |||
u32 *result, | |||
@@ -334,8 +327,8 @@ int eCosBoard_flash(ecosflash_flash_bank_t *info, void *data, u32 address, u32 l | |||
int i; | |||
for (i=0; i<len; i+=chunk) | |||
{ | |||
for (i=0; i<len; i+=chunk) | |||
{ | |||
int t=len-i; | |||
if (t>chunk) | |||
{ | |||
@@ -343,38 +336,36 @@ int eCosBoard_flash(ecosflash_flash_bank_t *info, void *data, u32 address, u32 l | |||
} | |||
int retval; | |||
retval=target_write_buffer(target, buffer, t, ((u8 *)data)+i); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
u32 flashErr; | |||
retval=runCode(info, | |||
info->start_address+OFFSET_FLASH, | |||
info->start_address+OFFSET_FLASH+OFFSET_FLASH_SIZE, | |||
buffer, | |||
address+i, | |||
t, | |||
&flashErr, | |||
timeout); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
retval=target_write_buffer(target, buffer, t, ((u8 *)data)+i); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
u32 flashErr; | |||
retval=runCode(info, | |||
info->start_address+OFFSET_FLASH, | |||
info->start_address+OFFSET_FLASH+OFFSET_FLASH_SIZE, | |||
buffer, | |||
address+i, | |||
t, | |||
&flashErr, | |||
timeout); | |||
if (retval != ERROR_OK) | |||
return retval; | |||
if (flashErr != 0x0) | |||
{ | |||
LOG_ERROR("Flash prog failed with %d (%s)\n", flashErr, flash_errmsg(flashErr)); | |||
return ERROR_FAIL; | |||
} | |||
} | |||
} | |||
return ERROR_OK; | |||
} | |||
int ecosflash_probe(struct flash_bank_s *bank) | |||
{ | |||
return ERROR_OK; | |||
} | |||
int ecosflash_register_commands(struct command_context_s *cmd_ctx) | |||
{ | |||
register_command(cmd_ctx, NULL, "ecosflash", NULL, COMMAND_ANY, NULL); | |||
@@ -382,7 +373,7 @@ int ecosflash_register_commands(struct command_context_s *cmd_ctx) | |||
return ERROR_OK; | |||
} | |||
/* | |||
#if 0 | |||
static void command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf) | |||
{ | |||
ecosflash_flash_bank_t *info = bank->driver_priv; | |||
@@ -403,7 +394,7 @@ static void command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf) | |||
} | |||
} | |||
} | |||
*/ | |||
#endif | |||
u32 ecosflash_address(struct flash_bank_s *bank, u32 address) | |||
{ | |||
@@ -421,7 +412,6 @@ u32 ecosflash_address(struct flash_bank_s *bank, u32 address) | |||
return retval + bank->base; | |||
} | |||
int ecosflash_erase(struct flash_bank_s *bank, int first, int last) | |||
{ | |||
struct flash_bank_s *c=bank; | |||
@@ -434,7 +424,6 @@ int ecosflash_protect(struct flash_bank_s *bank, int set, int first, int last) | |||
return ERROR_OK; | |||
} | |||
int ecosflash_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) | |||
{ | |||
ecosflash_flash_bank_t *info = bank->driver_priv; | |||
@@ -442,7 +431,6 @@ int ecosflash_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count | |||
return eCosBoard_flash(info, buffer, c->base+offset, count); | |||
} | |||
int ecosflash_protect_check(struct flash_bank_s *bank) | |||
{ | |||
return ERROR_OK; | |||
@@ -455,7 +443,6 @@ int ecosflash_info(struct flash_bank_s *bank, char *buf, int buf_size) | |||
return ERROR_OK; | |||
} | |||
u32 ecosflash_get_flash_status(flash_bank_t *bank) | |||
{ | |||
return ERROR_OK; | |||
@@ -475,7 +462,3 @@ int ecosflash_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, | |||
{ | |||
return ERROR_OK; | |||
} | |||
@@ -466,7 +466,6 @@ int handle_flash_erase_check_command(struct command_context_s *cmd_ctx, char *cm | |||
j, p->sectors[j].offset, p->sectors[j].size, p->sectors[j].size>>10, | |||
erase_state); | |||
} | |||
} | |||
return ERROR_OK; | |||
@@ -658,7 +657,6 @@ int handle_flash_write_image_command(struct command_context_s *cmd_ctx, char *cm | |||
command_print(cmd_ctx, "auto erase enabled"); | |||
} | |||
if (argc < 1) | |||
{ | |||
return ERROR_COMMAND_SYNTAX_ERROR; | |||
@@ -743,7 +741,6 @@ int handle_flash_fill_command(struct command_context_s *cmd_ctx, char *cmd, char | |||
if(count == 0) | |||
return ERROR_OK; | |||
switch(cmd[4]) | |||
{ | |||
case 'w': | |||
@@ -804,7 +801,6 @@ int handle_flash_fill_command(struct command_context_s *cmd_ctx, char *cmd, char | |||
return retval; | |||
} | |||
if(err == ERROR_OK) | |||
{ | |||
float speed; | |||
@@ -577,7 +577,7 @@ int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) | |||
break; | |||
if (bytes_remaining >= thisrun_bytes) | |||
{ | |||
{ | |||
if ((retval = target_write_buffer(bank->target, download_area->address, thisrun_bytes, buffer + bytes_written)) != ERROR_OK) | |||
{ | |||
retval = ERROR_FLASH_OPERATION_FAILED; | |||
@@ -126,7 +126,6 @@ flash_driver_t lpc288x_flash = | |||
.info = lpc288x_info | |||
}; | |||
int lpc288x_register_commands(struct command_context_s *cmd_ctx) | |||
{ | |||
return ERROR_OK; | |||
@@ -204,7 +203,7 @@ int lpc288x_read_part_info(struct flash_bank_s *bank) | |||
int lpc288x_protect_check(struct flash_bank_s *bank) | |||
{ | |||
return ERROR_OK; | |||
return ERROR_OK; | |||
} | |||
/* flash_bank LPC288x 0 0 0 0 <target#> <cclk> */ | |||
@@ -69,7 +69,7 @@ nand_flash_controller_t lpc3180_nand_controller = | |||
int lpc3180_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device) | |||
{ | |||
lpc3180_nand_controller_t *lpc3180_info; | |||
if (argc < 3) | |||
{ | |||
LOG_WARNING("incomplete 'lpc3180' nand flash configuration"); | |||
@@ -126,7 +126,7 @@ int lpc3180_pll(int fclkin, u32 pll_ctrl) | |||
if (bypass && !direct) /* bypass mode */ | |||
return fclkin / (2 * p); | |||
if (bypass & direct) /* direct bypass mode */ | |||
return fclkin; | |||
@@ -273,7 +273,7 @@ int lpc3180_init(struct nand_device_s *device) | |||
trhz = ((30 / cycle) + 1); | |||
trbwb = ((100 / cycle) + 1); | |||
tcea = ((45 / cycle) + 1); | |||
/* MLC_LOCK = 0xa25e (unlock protected registers) */ | |||
target_write_u32(target, 0x200b8044, 0xa25e); | |||
@@ -80,7 +80,7 @@ static int pxa270_set_gpio_to_output (mflash_gpio_num_t gpio) | |||
target_t *target = mflash_bank->target; | |||
int ret; | |||
// remove alternate function. | |||
/* remove alternate function. */ | |||
mask = 0x3u << (gpio.num & 0xF)*2; | |||
addr = PXA270_GAFR0_L + (gpio.num >> 4) * 4; | |||
@@ -95,7 +95,7 @@ static int pxa270_set_gpio_to_output (mflash_gpio_num_t gpio) | |||
if ((ret = target_write_u32(target, addr, value)) != ERROR_OK) | |||
return ret; | |||
// set direction to output | |||
/* set direction to output */ | |||
mask = 0x1u << (gpio.num & 0x1F); | |||
addr = PXA270_GPDR0 + (gpio.num >> 5) * 4; | |||
@@ -261,75 +261,75 @@ static int mg_dsk_wait(mg_io_type_wait wait, u32 time) | |||
duration_start_measure(&duration); | |||
while (time) { | |||
target_read_u8(target, mg_task_reg + MG_REG_STATUS, &status); | |||
if (status & mg_io_rbit_status_busy) | |||
{ | |||
if (wait == mg_io_wait_bsy) | |||
return ERROR_OK; | |||
} else { | |||
switch(wait) | |||
{ | |||
case mg_io_wait_not_bsy: | |||
return ERROR_OK; | |||
case mg_io_wait_rdy_noerr: | |||
if (status & mg_io_rbit_status_ready) | |||
return ERROR_OK; | |||
break; | |||
case mg_io_wait_drq_noerr: | |||
if (status & mg_io_rbit_status_data_req) | |||
return ERROR_OK; | |||
break; | |||
default: | |||
break; | |||
} | |||
// Now we check the error condition! | |||
if (status & mg_io_rbit_status_error) | |||
{ | |||
target_read_u8(target, mg_task_reg + MG_REG_ERROR, &error); | |||
if (error & mg_io_rbit_err_bad_sect_num) { | |||
LOG_ERROR("sector not found"); | |||
return ERROR_FAIL; | |||
} | |||
else if (error & (mg_io_rbit_err_bad_block | mg_io_rbit_err_uncorrectable)) { | |||
LOG_ERROR("bad block"); | |||
return ERROR_FAIL; | |||
} else { | |||
LOG_ERROR("disk operation fail"); | |||
return ERROR_FAIL; | |||
} | |||
} | |||
switch (wait) | |||
{ | |||
case mg_io_wait_rdy: | |||
if (status & mg_io_rbit_status_ready) | |||
return ERROR_OK; | |||
case mg_io_wait_drq: | |||
if (status & mg_io_rbit_status_data_req) | |||
return ERROR_OK; | |||
default: | |||
break; | |||
} | |||
} | |||
duration_stop_measure(&duration, NULL); | |||
t=duration.duration.tv_usec/1000; | |||
t+=duration.duration.tv_sec*1000; | |||
while (time) { | |||
target_read_u8(target, mg_task_reg + MG_REG_STATUS, &status); | |||
if (status & mg_io_rbit_status_busy) | |||
{ | |||
if (wait == mg_io_wait_bsy) | |||
return ERROR_OK; | |||
} else { | |||
switch(wait) | |||
{ | |||
case mg_io_wait_not_bsy: | |||
return ERROR_OK; | |||
case mg_io_wait_rdy_noerr: | |||
if (status & mg_io_rbit_status_ready) | |||
return ERROR_OK; | |||
break; | |||
case mg_io_wait_drq_noerr: | |||
if (status & mg_io_rbit_status_data_req) | |||
return ERROR_OK; | |||
break; | |||
default: | |||
break; | |||
} | |||
/* Now we check the error condition! */ | |||
if (status & mg_io_rbit_status_error) | |||
{ | |||
target_read_u8(target, mg_task_reg + MG_REG_ERROR, &error); | |||
if (error & mg_io_rbit_err_bad_sect_num) { | |||
LOG_ERROR("sector not found"); | |||
return ERROR_FAIL; | |||
} | |||
else if (error & (mg_io_rbit_err_bad_block | mg_io_rbit_err_uncorrectable)) { | |||
LOG_ERROR("bad block"); | |||
return ERROR_FAIL; | |||
} else { | |||
LOG_ERROR("disk operation fail"); | |||
return ERROR_FAIL; | |||
} | |||
} | |||
switch (wait) | |||
{ | |||
case mg_io_wait_rdy: | |||
if (status & mg_io_rbit_status_ready) | |||
return ERROR_OK; | |||
case mg_io_wait_drq: | |||
if (status & mg_io_rbit_status_data_req) | |||
return ERROR_OK; | |||
default: | |||
break; | |||
} | |||
} | |||
duration_stop_measure(&duration, NULL); | |||
t=duration.duration.tv_usec/1000; | |||
t+=duration.duration.tv_sec*1000; | |||
if (t > time) | |||
break; | |||
} | |||
break; | |||
} | |||
LOG_ERROR("timeout occured"); | |||
return ERROR_FAIL; | |||
LOG_ERROR("timeout occured"); | |||
return ERROR_FAIL; | |||
} | |||
static int mg_dsk_srst(u8 on) | |||
@@ -634,7 +634,6 @@ static int mg_mflash_read (u32 addr, u8 *buff, u32 len) | |||
LOG_DEBUG("copies %u byte", end_addr - cur_addr); | |||
} | |||
} | |||
free(sect_buff); | |||
@@ -671,7 +670,6 @@ static int mg_mflash_write(u32 addr, u8 *buff, u32 len) | |||
} | |||
mg_mflash_write_sects(sect_buff, sect_num, 1); | |||
} | |||
if (cur_addr < end_addr) { | |||
@@ -697,9 +695,7 @@ static int mg_mflash_write(u32 addr, u8 *buff, u32 len) | |||
memcpy(sect_buff, buff_ptr, end_addr - cur_addr); | |||
LOG_DEBUG("copies %u byte", end_addr - cur_addr); | |||
mg_mflash_write_sects(sect_buff, sect_num, 1); | |||
} | |||
} | |||
free(sect_buff); | |||
@@ -711,7 +707,7 @@ static int mflash_write_command(struct command_context_s *cmd_ctx, char *cmd, ch | |||
{ | |||
u32 address, buf_cnt; | |||
u8 *buffer; | |||
// TODO : multi-bank support, large file support | |||
/* TODO : multi-bank support, large file support */ | |||
fileio_t fileio; | |||
duration_t duration; | |||
char *duration_text; | |||
@@ -727,7 +723,6 @@ static int mflash_write_command(struct command_context_s *cmd_ctx, char *cmd, ch | |||
mg_mflash_probe(); | |||
} | |||
if (fileio_open(&fileio, args[1], FILEIO_READ, FILEIO_BINARY) != ERROR_OK) { | |||
return ERROR_FAIL; | |||
} | |||
@@ -764,7 +759,7 @@ static int mflash_dump_command(struct command_context_s *cmd_ctx, char *cmd, cha | |||
{ | |||
u32 address, size_written, size; | |||
u8 *buffer; | |||
// TODO : multi-bank support | |||
/* TODO : multi-bank support */ | |||
fileio_t fileio; | |||
duration_t duration; | |||
char *duration_text; | |||
@@ -39,79 +39,79 @@ typedef struct mflash_gpio_drv_s | |||
typedef struct _mg_io_type_drv_info { | |||
mg_io_uint16 general_configuration; // 00 | |||
mg_io_uint16 number_of_cylinders; // 01 | |||
mg_io_uint16 reserved1; // 02 | |||
mg_io_uint16 number_of_heads; // 03 | |||
mg_io_uint16 unformatted_bytes_per_track; // 04 | |||
mg_io_uint16 unformatted_bytes_per_sector; // 05 | |||
mg_io_uint16 sectors_per_track; // 06 | |||
mg_io_uint8 vendor_unique1[6]; // 07/08/09 | |||
mg_io_uint8 serial_number[20]; // 10~19 | |||
mg_io_uint16 buffer_type; // 20 | |||
mg_io_uint16 buffer_sector_size; // 21 | |||
mg_io_uint16 number_of_ecc_bytes; // 22 | |||
mg_io_uint8 firmware_revision[8]; // 23~26 | |||
mg_io_uint8 model_number[40]; // 27 | |||
mg_io_uint8 maximum_block_transfer; // 47 low byte | |||
mg_io_uint8 vendor_unique2; // 47 high byte | |||
mg_io_uint16 dword_io; // 48 | |||
mg_io_uint16 capabilities; // 49 | |||
mg_io_uint16 reserved2; // 50 | |||
mg_io_uint8 vendor_unique3; // 51 low byte | |||
mg_io_uint8 pio_cycle_timing_mode; // 51 high byte | |||
mg_io_uint8 vendor_unique4; // 52 low byte | |||
mg_io_uint8 dma_cycle_timing_mode; // 52 high byte | |||
mg_io_uint16 translation_fields_valid; // 53 (low bit) | |||
mg_io_uint16 number_of_current_cylinders; // 54 | |||
mg_io_uint16 number_of_current_heads; // 55 | |||
mg_io_uint16 current_sectors_per_track; // 56 | |||
mg_io_uint16 current_sector_capacity_lo; // 57 & 58 | |||
mg_io_uint16 current_sector_capacity_hi; // 57 & 58 | |||
mg_io_uint8 multi_sector_count; // 59 low | |||
mg_io_uint8 multi_sector_setting_valid; // 59 high (low bit) | |||
mg_io_uint16 total_user_addressable_sectors_lo; // 60 & 61 | |||
mg_io_uint16 total_user_addressable_sectors_hi; // 60 & 61 | |||
mg_io_uint8 single_dma_modes_supported; // 62 low byte | |||
mg_io_uint8 single_dma_transfer_active; // 62 high byte | |||
mg_io_uint8 multi_dma_modes_supported; // 63 low byte | |||
mg_io_uint8 multi_dma_transfer_active; // 63 high byte | |||
mg_io_uint16 adv_pio_mode; | |||
mg_io_uint16 min_dma_cyc; | |||
mg_io_uint16 recommend_dma_cyc; | |||
mg_io_uint16 min_pio_cyc_no_iordy; | |||
mg_io_uint16 min_pio_cyc_with_iordy; | |||
mg_io_uint8 reserved3[22]; | |||
mg_io_uint16 major_ver_num; | |||
mg_io_uint16 minor_ver_num; | |||
mg_io_uint16 feature_cmd_set_suprt0; | |||
mg_io_uint16 feature_cmd_set_suprt1; | |||
mg_io_uint16 feature_cmd_set_suprt2; | |||
mg_io_uint16 feature_cmd_set_en0; | |||
mg_io_uint16 feature_cmd_set_en1; | |||
mg_io_uint16 feature_cmd_set_en2; | |||
mg_io_uint16 reserved4; | |||
mg_io_uint16 req_time_for_security_er_done; | |||
mg_io_uint16 req_time_for_enhan_security_er_done; | |||
mg_io_uint16 adv_pwr_mgm_lvl_val; | |||
mg_io_uint16 reserved5; | |||
mg_io_uint16 re_of_hw_rst; | |||
mg_io_uint8 reserved6[68]; | |||
mg_io_uint16 security_stas; | |||
mg_io_uint8 vendor_uniq_bytes[62]; | |||
mg_io_uint16 cfa_pwr_mode; | |||
mg_io_uint8 reserved7[186]; | |||
mg_io_uint16 scts_per_secure_data_unit; | |||
mg_io_uint16 integrity_word; | |||
mg_io_uint16 general_configuration; /* 00 */ | |||
mg_io_uint16 number_of_cylinders; /* 01 */ | |||
mg_io_uint16 reserved1; /* 02 */ | |||
mg_io_uint16 number_of_heads; /* 03 */ | |||
mg_io_uint16 unformatted_bytes_per_track; /* 04 */ | |||
mg_io_uint16 unformatted_bytes_per_sector; /* 05 */ | |||
mg_io_uint16 sectors_per_track; /* 06 */ | |||
mg_io_uint8 vendor_unique1[6]; /* 07/08/09 */ | |||
mg_io_uint8 serial_number[20]; /* 10~19 */ | |||
mg_io_uint16 buffer_type; /* 20 */ | |||
mg_io_uint16 buffer_sector_size; /* 21 */ | |||
mg_io_uint16 number_of_ecc_bytes; /* 22 */ | |||
mg_io_uint8 firmware_revision[8]; /* 23~26 */ | |||
mg_io_uint8 model_number[40]; /* 27 */ | |||
mg_io_uint8 maximum_block_transfer; /* 47 low byte */ | |||
mg_io_uint8 vendor_unique2; /* 47 high byte */ | |||
mg_io_uint16 dword_io; /* 48 */ | |||
mg_io_uint16 capabilities; /* 49 */ | |||
mg_io_uint16 reserved2; /* 50 */ | |||
mg_io_uint8 vendor_unique3; /* 51 low byte */ | |||
mg_io_uint8 pio_cycle_timing_mode; /* 51 high byte */ | |||
mg_io_uint8 vendor_unique4; /* 52 low byte */ | |||
mg_io_uint8 dma_cycle_timing_mode; /* 52 high byte */ | |||
mg_io_uint16 translation_fields_valid; /* 53 (low bit) */ | |||
mg_io_uint16 number_of_current_cylinders; /* 54 */ | |||
mg_io_uint16 number_of_current_heads; /* 55 */ | |||
mg_io_uint16 current_sectors_per_track; /* 56 */ | |||
mg_io_uint16 current_sector_capacity_lo; /* 57 & 58 */ | |||
mg_io_uint16 current_sector_capacity_hi; /* 57 & 58 */ | |||
mg_io_uint8 multi_sector_count; /* 59 low */ | |||
mg_io_uint8 multi_sector_setting_valid; /* 59 high (low bit) */ | |||
mg_io_uint16 total_user_addressable_sectors_lo; /* 60 & 61 */ | |||
mg_io_uint16 total_user_addressable_sectors_hi; /* 60 & 61 */ | |||
mg_io_uint8 single_dma_modes_supported; /* 62 low byte */ | |||
mg_io_uint8 single_dma_transfer_active; /* 62 high byte */ | |||
mg_io_uint8 multi_dma_modes_supported; /* 63 low byte */ | |||
mg_io_uint8 multi_dma_transfer_active; /* 63 high byte */ | |||
mg_io_uint16 adv_pio_mode; | |||
mg_io_uint16 min_dma_cyc; | |||
mg_io_uint16 recommend_dma_cyc; | |||
mg_io_uint16 min_pio_cyc_no_iordy; | |||
mg_io_uint16 min_pio_cyc_with_iordy; | |||
mg_io_uint8 reserved3[22]; | |||
mg_io_uint16 major_ver_num; | |||
mg_io_uint16 minor_ver_num; | |||
mg_io_uint16 feature_cmd_set_suprt0; | |||
mg_io_uint16 feature_cmd_set_suprt1; | |||
mg_io_uint16 feature_cmd_set_suprt2; | |||
mg_io_uint16 feature_cmd_set_en0; | |||
mg_io_uint16 feature_cmd_set_en1; | |||
mg_io_uint16 feature_cmd_set_en2; | |||
mg_io_uint16 reserved4; | |||
mg_io_uint16 req_time_for_security_er_done; | |||
mg_io_uint16 req_time_for_enhan_security_er_done; | |||
mg_io_uint16 adv_pwr_mgm_lvl_val; | |||
mg_io_uint16 reserved5; | |||
mg_io_uint16 re_of_hw_rst; | |||
mg_io_uint8 reserved6[68]; | |||
mg_io_uint16 security_stas; | |||
mg_io_uint8 vendor_uniq_bytes[62]; | |||
mg_io_uint16 cfa_pwr_mode; | |||
mg_io_uint8 reserved7[186]; | |||
mg_io_uint16 scts_per_secure_data_unit; | |||
mg_io_uint16 integrity_word; | |||
} mg_io_type_drv_info; | |||
@@ -140,105 +140,105 @@ typedef struct mflash_bank_s | |||
extern int mflash_register_commands(struct command_context_s *cmd_ctx); | |||
extern int mflash_init_drivers(struct command_context_s *cmd_ctx); | |||
#define MG_MFLASH_SECTOR_SIZE (0x200) //512Bytes = 2^9 | |||
#define MG_MFLASH_SECTOR_SIZE_MASK (0x200-1) | |||
#define MG_MFLASH_SECTOR_SIZE_SHIFT (9) | |||
#define MG_MFLASH_SECTOR_SIZE (0x200) /* 512Bytes = 2^9 */ | |||
#define MG_MFLASH_SECTOR_SIZE_MASK (0x200-1) | |||
#define MG_MFLASH_SECTOR_SIZE_SHIFT (9) | |||
#define MG_BUFFER_OFFSET 0x8000 | |||
#define MG_BUFFER_OFFSET 0x8000 | |||
#define MG_REG_OFFSET 0xC000 | |||
#define MG_REG_FEATURE 0x2 // write case | |||
#define MG_REG_ERROR 0x2 // read case | |||
#define MG_REG_FEATURE 0x2 /* write case */ | |||
#define MG_REG_ERROR 0x2 /* read case */ | |||
#define MG_REG_SECT_CNT 0x4 | |||
#define MG_REG_SECT_NUM 0x6 | |||
#define MG_REG_CYL_LOW 0x8 | |||
#define MG_REG_CYL_HIGH 0xA | |||
#define MG_REG_DRV_HEAD 0xC | |||
#define MG_REG_COMMAND 0xE // write case | |||
#define MG_REG_STATUS 0xE // read case | |||
#define MG_REG_COMMAND 0xE /* write case */ | |||
#define MG_REG_STATUS 0xE /* read case */ | |||
#define MG_REG_DRV_CTRL 0x10 | |||
#define MG_REG_BURST_CTRL 0x12 | |||
#define MG_OEM_DISK_WAIT_TIME_LONG 15000 // msec | |||
#define MG_OEM_DISK_WAIT_TIME_NORMAL 3000 // msec | |||
#define MG_OEM_DISK_WAIT_TIME_SHORT 1000 // msec | |||
#define MG_OEM_DISK_WAIT_TIME_LONG 15000 /* msec */ | |||
#define MG_OEM_DISK_WAIT_TIME_NORMAL 3000 /* msec */ | |||
#define MG_OEM_DISK_WAIT_TIME_SHORT 1000 /* msec */ | |||
typedef enum _mg_io_type_wait{ | |||
mg_io_wait_bsy = 1, | |||
mg_io_wait_not_bsy = 2, | |||
mg_io_wait_rdy = 3, | |||
mg_io_wait_drq = 4, // wait for data request | |||
mg_io_wait_drq_noerr = 5, // wait for DRQ but ignore the error status bit | |||
mg_io_wait_rdy_noerr = 6 // wait for ready, but ignore error status bit | |||
mg_io_wait_bsy = 1, | |||
mg_io_wait_not_bsy = 2, | |||
mg_io_wait_rdy = 3, | |||
mg_io_wait_drq = 4, /* wait for data request */ | |||
mg_io_wait_drq_noerr = 5, /* wait for DRQ but ignore the error status bit */ | |||
mg_io_wait_rdy_noerr = 6 /* wait for ready, but ignore error status bit */ | |||
} mg_io_type_wait; | |||
//= "Status Register" bit masks. | |||
/*= "Status Register" bit masks. */ | |||
typedef enum _mg_io_type_rbit_status{ | |||
mg_io_rbit_status_error = 0x01, // error bit in status register | |||
mg_io_rbit_status_corrected_error = 0x04, // corrected error in status register | |||
mg_io_rbit_status_data_req = 0x08, // data request bit in status register | |||
mg_io_rbit_status_seek_done = 0x10, // DSC - Drive Seek Complete | |||
mg_io_rbit_status_write_fault = 0x20, // DWF - Drive Write Fault | |||
mg_io_rbit_status_ready = 0x40, | |||
mg_io_rbit_status_busy = 0x80 | |||
mg_io_rbit_status_error = 0x01, /* error bit in status register */ | |||
mg_io_rbit_status_corrected_error = 0x04, /* corrected error in status register */ | |||
mg_io_rbit_status_data_req = 0x08, /* data request bit in status register */ | |||
mg_io_rbit_status_seek_done = 0x10, /* DSC - Drive Seek Complete */ | |||
mg_io_rbit_status_write_fault = 0x20, /* DWF - Drive Write Fault */ | |||
mg_io_rbit_status_ready = 0x40, | |||
mg_io_rbit_status_busy = 0x80 | |||
} mg_io_type_rbit_status; | |||
//= "Error Register" bit masks. | |||
/*= "Error Register" bit masks. */ | |||
typedef enum _mg_io_type_rbit_error{ | |||
mg_io_rbit_err_general = 0x01, | |||
mg_io_rbit_err_aborted = 0x04, | |||
mg_io_rbit_err_bad_sect_num = 0x10, | |||
mg_io_rbit_err_uncorrectable = 0x40, | |||
mg_io_rbit_err_bad_block = 0x80 | |||
mg_io_rbit_err_general = 0x01, | |||
mg_io_rbit_err_aborted = 0x04, | |||
mg_io_rbit_err_bad_sect_num = 0x10, | |||
mg_io_rbit_err_uncorrectable = 0x40, | |||
mg_io_rbit_err_bad_block = 0x80 | |||
} mg_io_type_rbit_error; | |||
//= "Device Control Register" bit. | |||
/* = "Device Control Register" bit. */ | |||
typedef enum _mg_io_type_rbit_devc{ | |||
mg_io_rbit_devc_intr = 0x02,// interrupt enable bit (1:disable, 0:enable) | |||
mg_io_rbit_devc_srst = 0x04 // softwrae reset bit (1:assert, 0:de-assert) | |||
mg_io_rbit_devc_intr = 0x02, /* interrupt enable bit (1:disable, 0:enable) */ | |||
mg_io_rbit_devc_srst = 0x04 /* softwrae reset bit (1:assert, 0:de-assert) */ | |||
} mg_io_type_rbit_devc; | |||
// "Drive Select/Head Register" values. | |||
/* "Drive Select/Head Register" values. */ | |||
typedef enum _mg_io_type_rval_dev{ | |||
mg_io_rval_dev_must_be_on = 0x80, // These 1 bits are always on | |||
mg_io_rval_dev_drv_master = (0x00 | mg_io_rval_dev_must_be_on),// Master | |||
mg_io_rval_dev_drv_slave0 = (0x10 | mg_io_rval_dev_must_be_on),// Slave0 | |||
mg_io_rval_dev_drv_slave1 = (0x20 | mg_io_rval_dev_must_be_on),// Slave1 | |||
mg_io_rval_dev_drv_slave2 = (0x30 | mg_io_rval_dev_must_be_on),// Slave2 | |||
mg_io_rval_dev_lba_mode = (0x40 | mg_io_rval_dev_must_be_on) | |||
mg_io_rval_dev_must_be_on = 0x80, /* These 1 bits are always on */ | |||
mg_io_rval_dev_drv_master = (0x00 | mg_io_rval_dev_must_be_on), /* Master */ | |||
mg_io_rval_dev_drv_slave0 = (0x10 | mg_io_rval_dev_must_be_on), /* Slave0 */ | |||
mg_io_rval_dev_drv_slave1 = (0x20 | mg_io_rval_dev_must_be_on), /* Slave1 */ | |||
mg_io_rval_dev_drv_slave2 = (0x30 | mg_io_rval_dev_must_be_on), /* Slave2 */ | |||
mg_io_rval_dev_lba_mode = (0x40 | mg_io_rval_dev_must_be_on) | |||
} mg_io_type_rval_dev; | |||
typedef enum _mg_io_type_cmd | |||
{ | |||
mg_io_cmd_read =0x20, | |||
mg_io_cmd_write =0x30, | |||
mg_io_cmd_read =0x20, | |||
mg_io_cmd_write =0x30, | |||
mg_io_cmd_setmul =0xC6, | |||
mg_io_cmd_readmul =0xC4, | |||
mg_io_cmd_writemul =0xC5, | |||
mg_io_cmd_setmul =0xC6, | |||
mg_io_cmd_readmul =0xC4, | |||
mg_io_cmd_writemul =0xC5, | |||
mg_io_cmd_idle =0x97,//0xE3 | |||
mg_io_cmd_idle_immediate =0x95,//0xE1 | |||
mg_io_cmd_idle =0x97, /* 0xE3 */ | |||
mg_io_cmd_idle_immediate =0x95, /* 0xE1 */ | |||
mg_io_cmd_setsleep =0x99,//0xE6 | |||
mg_io_cmd_stdby =0x96,//0xE2 | |||
mg_io_cmd_stdby_immediate =0x94,//0xE0 | |||
mg_io_cmd_setsleep =0x99, /* 0xE6 */ | |||
mg_io_cmd_stdby =0x96, /* 0xE2 */ | |||
mg_io_cmd_stdby_immediate =0x94, /* 0xE0 */ | |||
mg_io_cmd_identify =0xEC, | |||
mg_io_cmd_set_feature =0xEF, | |||
mg_io_cmd_identify =0xEC, | |||
mg_io_cmd_set_feature =0xEF, | |||
mg_io_cmd_confirm_write =0x3C, | |||
mg_io_cmd_confirm_read =0x40, | |||
mg_io_cmd_wakeup =0xC3 | |||
mg_io_cmd_confirm_write =0x3C, | |||
mg_io_cmd_confirm_read =0x40, | |||
mg_io_cmd_wakeup =0xC3 | |||
} mg_io_type_cmd; | |||
@@ -1524,4 +1524,3 @@ int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, | |||
return ERROR_OK; | |||
} | |||
@@ -85,11 +85,11 @@ | |||
#define S3C2440_NFCONT_SPARE_ECCLOCK (1<<6) | |||
#define S3C2440_NFCONT_MAIN_ECCLOCK (1<<5) | |||
#define S3C2440_NFCONT_INITECC (1<<4) | |||
#define S3C2440_NFCONT_nFCE (1<<1) | |||
#define S3C2440_NFCONT_nFCE (1<<1) | |||
#define S3C2440_NFCONT_ENABLE (1<<0) | |||
#define S3C2440_NFSTAT_READY (1<<0) | |||
#define S3C2440_NFSTAT_nCE (1<<1) | |||
#define S3C2440_NFSTAT_nCE (1<<1) | |||
#define S3C2440_NFSTAT_RnB_CHANGE (1<<2) | |||
#define S3C2440_NFSTAT_ILLEGAL_ACCESS (1<<3) | |||
@@ -114,13 +114,13 @@ | |||
#define S3C2412_NFSTAT_RnB_CHANGE (1<<4) | |||
#define S3C2412_NFSTAT_nFCE1 (1<<3) | |||
#define S3C2412_NFSTAT_nFCE0 (1<<2) | |||
#define S3C2412_NFSTAT_Res1 (1<<1) | |||
#define S3C2412_NFSTAT_Res1 (1<<1) | |||
#define S3C2412_NFSTAT_READY (1<<0) | |||
#define S3C2412_NFECCERR_SERRDATA(x) (((x) >> 21) & 0xf) | |||
#define S3C2412_NFECCERR_SERRBIT(x) (((x) >> 18) & 0x7) | |||
#define S3C2412_NFECCERR_SERRBIT(x) (((x) >> 18) & 0x7) | |||
#define S3C2412_NFECCERR_MERRDATA(x) (((x) >> 7) & 0x3ff) | |||
#define S3C2412_NFECCERR_MERRBIT(x) (((x) >> 4) & 0x7) | |||
#define S3C2412_NFECCERR_MERRBIT(x) (((x) >> 4) & 0x7) | |||
#define S3C2412_NFECCERR_SPARE_ERR(x) (((x) >> 2) & 0x3) | |||
#define S3C2412_NFECCERR_MAIN_ERR(x) (((x) >> 2) & 0x3) | |||
#define S3C2412_NFECCERR_NONE (0) | |||
@@ -83,7 +83,6 @@ typedef struct stellaris_flash_bank_s | |||
#define AMASK 1 | |||
#define PMASK 2 | |||
/* Flash Controller Command bits */ | |||
#define FMC_WRKEY (0xA442<<16) | |||
#define FMC_COMT (1<<3) | |||
@@ -100,4 +100,3 @@ typedef struct stm32x_mem_layout_s { | |||
} stm32x_mem_layout_t; | |||
#endif /* STM32X_H */ | |||
@@ -717,4 +717,3 @@ int str7x_handle_disable_jtag_command(struct command_context_s *cmd_ctx, char *c | |||
return ERROR_OK; | |||
} | |||
@@ -109,4 +109,3 @@ typedef struct str7x_mem_layout_s { | |||
} str7x_mem_layout_t; | |||
#endif /* STR7X_H */ | |||
@@ -50,7 +50,7 @@ enum str9x_status_codes | |||
STR9X_BUSY = 11 | |||
}; | |||
/* Flash registers */ | |||
/* Flash registers */ | |||
#define FLASH_BBSR 0x54000000 /* Boot Bank Size Register */ | |||
#define FLASH_NBBSR 0x54000004 /* Non-Boot Bank Size Register */ | |||
@@ -61,4 +61,3 @@ enum str9x_status_codes | |||
#define FLASH_BCE5ADDR 0x54000020 /* BC Fifth Entry Target Address Register */ | |||
#endif /* STR9X_H */ | |||
@@ -73,7 +73,7 @@ const flash_sector_t TMS470R1A256_SECTORS[] = { | |||
}; | |||
#define TMS470R1A256_NUM_SECTORS \ | |||
(sizeof(TMS470R1A256_SECTORS)/sizeof(TMS470R1A256_SECTORS[0])) | |||
(sizeof(TMS470R1A256_SECTORS)/sizeof(TMS470R1A256_SECTORS[0])) | |||
const flash_sector_t TMS470R1A288_BANK0_SECTORS[] = { | |||
{0x00000000, 0x00002000, -1, -1}, | |||
@@ -83,7 +83,7 @@ const flash_sector_t TMS470R1A288_BANK0_SECTORS[] = { | |||
}; | |||
#define TMS470R1A288_BANK0_NUM_SECTORS \ | |||
(sizeof(TMS470R1A288_BANK0_SECTORS)/sizeof(TMS470R1A288_BANK0_SECTORS[0])) | |||
(sizeof(TMS470R1A288_BANK0_SECTORS)/sizeof(TMS470R1A288_BANK0_SECTORS[0])) | |||
const flash_sector_t TMS470R1A288_BANK1_SECTORS[] = { | |||
{0x00040000, 0x00010000, -1, -1}, | |||
@@ -93,43 +93,43 @@ const flash_sector_t TMS470R1A288_BANK1_SECTORS[] = { | |||
}; | |||
#define TMS470R1A288_BANK1_NUM_SECTORS \ | |||
(sizeof(TMS470R1A288_BANK1_SECTORS)/sizeof(TMS470R1A288_BANK1_SECTORS[0])) | |||
(sizeof(TMS470R1A288_BANK1_SECTORS)/sizeof(TMS470R1A288_BANK1_SECTORS[0])) | |||
const flash_sector_t TMS470R1A384_BANK0_SECTORS[] = { | |||
{0x00000000, 0x00002000, -1, -1}, | |||
{0x00002000, 0x00002000, -1, -1}, | |||
{0x00004000, 0x00004000, -1, -1}, | |||
{0x00008000, 0x00004000, -1, -1}, | |||
{0x0000C000, 0x00004000, -1, -1}, | |||
{0x00010000, 0x00004000, -1, -1}, | |||
{0x00014000, 0x00004000, -1, -1}, | |||
{0x00018000, 0x00002000, -1, -1}, | |||
{0x0001C000, 0x00002000, -1, -1}, | |||
{0x0001E000, 0x00002000, -1, -1}, | |||
{0x00000000, 0x00002000, -1, -1}, | |||
{0x00002000, 0x00002000, -1, -1}, | |||
{0x00004000, 0x00004000, -1, -1}, | |||
{0x00008000, 0x00004000, -1, -1}, | |||
{0x0000C000, 0x00004000, -1, -1}, | |||
{0x00010000, 0x00004000, -1, -1}, | |||
{0x00014000, 0x00004000, -1, -1}, | |||
{0x00018000, 0x00002000, -1, -1}, | |||
{0x0001C000, 0x00002000, -1, -1}, | |||
{0x0001E000, 0x00002000, -1, -1}, | |||
}; | |||
#define TMS470R1A384_BANK0_NUM_SECTORS \ | |||
(sizeof(TMS470R1A384_BANK0_SECTORS)/sizeof(TMS470R1A384_BANK0_SECTORS[0])) | |||
(sizeof(TMS470R1A384_BANK0_SECTORS)/sizeof(TMS470R1A384_BANK0_SECTORS[0])) | |||
const flash_sector_t TMS470R1A384_BANK1_SECTORS[] = { | |||
{0x00020000, 0x00008000, -1, -1}, | |||
{0x00028000, 0x00008000, -1, -1}, | |||
{0x00030000, 0x00008000, -1, -1}, | |||
{0x00038000, 0x00008000, -1, -1}, | |||
{0x00020000, 0x00008000, -1, -1}, | |||
{0x00028000, 0x00008000, -1, -1}, | |||
{0x00030000, 0x00008000, -1, -1}, | |||
{0x00038000, 0x00008000, -1, -1}, | |||
}; | |||
#define TMS470R1A384_BANK1_NUM_SECTORS \ | |||
(sizeof(TMS470R1A384_BANK1_SECTORS)/sizeof(TMS470R1A384_BANK1_SECTORS[0])) | |||
(sizeof(TMS470R1A384_BANK1_SECTORS)/sizeof(TMS470R1A384_BANK1_SECTORS[0])) | |||
const flash_sector_t TMS470R1A384_BANK2_SECTORS[] = { | |||
{0x00040000, 0x00008000, -1, -1}, | |||
{0x00048000, 0x00008000, -1, -1}, | |||
{0x00050000, 0x00008000, -1, -1}, | |||
{0x00058000, 0x00008000, -1, -1}, | |||
{0x00040000, 0x00008000, -1, -1}, | |||
{0x00048000, 0x00008000, -1, -1}, | |||
{0x00050000, 0x00008000, -1, -1}, | |||
{0x00058000, 0x00008000, -1, -1}, | |||
}; | |||
#define TMS470R1A384_BANK2_NUM_SECTORS \ | |||
(sizeof(TMS470R1A384_BANK2_SECTORS)/sizeof(TMS470R1A384_BANK2_SECTORS[0])) | |||
(sizeof(TMS470R1A384_BANK2_SECTORS)/sizeof(TMS470R1A384_BANK2_SECTORS[0])) | |||
/* ---------------------------------------------------------------------- */ | |||
@@ -229,56 +229,56 @@ int tms470_read_part_info(struct flash_bank_s *bank) | |||
} | |||
break; | |||
case 0x2d: | |||
part_name = "TMS470R1A384"; | |||
if ((bank->base >= 0x00000000) && (bank->base < 0x00020000)) | |||
{ | |||
tms470_info->ordinal = 0; | |||
bank->base = 0x00000000; | |||
bank->size = 128 * 1024; | |||
bank->num_sectors = TMS470R1A384_BANK0_NUM_SECTORS; | |||
bank->sectors = malloc(sizeof(TMS470R1A384_BANK0_SECTORS)); | |||
if (!bank->sectors) | |||
{ | |||
return ERROR_FLASH_OPERATION_FAILED; | |||
} | |||
(void)memcpy(bank->sectors, TMS470R1A384_BANK0_SECTORS, sizeof(TMS470R1A384_BANK0_SECTORS)); | |||
} | |||
else if ((bank->base >= 0x00020000) && (bank->base < 0x00040000)) | |||
{ | |||
tms470_info->ordinal = 1; | |||
bank->base = 0x00020000; | |||
bank->size = 128 * 1024; | |||
bank->num_sectors = TMS470R1A384_BANK1_NUM_SECTORS; | |||
bank->sectors = malloc(sizeof(TMS470R1A384_BANK1_SECTORS)); | |||
if (!bank->sectors) | |||
{ | |||
return ERROR_FLASH_OPERATION_FAILED; | |||
} | |||
(void)memcpy(bank->sectors, TMS470R1A384_BANK1_SECTORS, sizeof(TMS470R1A384_BANK1_SECTORS)); | |||
} | |||
else if ((bank->base >= 0x00040000) && (bank->base < 0x00060000)) | |||
{ | |||
tms470_info->ordinal = 2; | |||
bank->base = 0x00040000; | |||
bank->size = 128 * 1024; | |||
bank->num_sectors = TMS470R1A384_BANK2_NUM_SECTORS; | |||
bank->sectors = malloc(sizeof(TMS470R1A384_BANK2_SECTORS)); | |||
if (!bank->sectors) | |||
{ | |||
return ERROR_FLASH_OPERATION_FAILED; | |||
} | |||
(void)memcpy(bank->sectors, TMS470R1A384_BANK2_SECTORS, sizeof(TMS470R1A384_BANK2_SECTORS)); | |||
} | |||
else | |||
{ | |||
LOG_ERROR("No %s flash bank contains base address 0x%08x.", part_name, bank->base); | |||
return ERROR_FLASH_OPERATION_FAILED; | |||
} | |||
break; | |||
default: | |||
case 0x2d: | |||
part_name = "TMS470R1A384"; | |||
if ((bank->base >= 0x00000000) && (bank->base < 0x00020000)) | |||
{ | |||
tms470_info->ordinal = 0; | |||
bank->base = 0x00000000; | |||
bank->size = 128 * 1024; | |||
bank->num_sectors = TMS470R1A384_BANK0_NUM_SECTORS; | |||
bank->sectors = malloc(sizeof(TMS470R1A384_BANK0_SECTORS)); | |||
if (!bank->sectors) | |||
{ | |||
return ERROR_FLASH_OPERATION_FAILED; | |||
} | |||
(void)memcpy(bank->sectors, TMS470R1A384_BANK0_SECTORS, sizeof(TMS470R1A384_BANK0_SECTORS)); | |||
} | |||
else if ((bank->base >= 0x00020000) && (bank->base < 0x00040000)) | |||
{ | |||
tms470_info->ordinal = 1; | |||
bank->base = 0x00020000; | |||
bank->size = 128 * 1024; | |||
bank->num_sectors = TMS470R1A384_BANK1_NUM_SECTORS; | |||
bank->sectors = malloc(sizeof(TMS470R1A384_BANK1_SECTORS)); | |||
if (!bank->sectors) | |||
{ | |||
return ERROR_FLASH_OPERATION_FAILED; | |||
} | |||
(void)memcpy(bank->sectors, TMS470R1A384_BANK1_SECTORS, sizeof(TMS470R1A384_BANK1_SECTORS)); | |||
} | |||
else if ((bank->base >= 0x00040000) && (bank->base < 0x00060000)) | |||
{ | |||
tms470_info->ordinal = 2; | |||
bank->base = 0x00040000; | |||
bank->size = 128 * 1024; | |||
bank->num_sectors = TMS470R1A384_BANK2_NUM_SECTORS; | |||
bank->sectors = malloc(sizeof(TMS470R1A384_BANK2_SECTORS)); | |||
if (!bank->sectors) | |||
{ | |||
return ERROR_FLASH_OPERATION_FAILED; | |||
} | |||
(void)memcpy(bank->sectors, TMS470R1A384_BANK2_SECTORS, sizeof(TMS470R1A384_BANK2_SECTORS)); | |||
} | |||
else | |||
{ | |||
LOG_ERROR("No %s flash bank contains base address 0x%08x.", part_name, bank->base); | |||
return ERROR_FLASH_OPERATION_FAILED; | |||
} | |||
break; | |||
default: | |||
LOG_WARNING("Could not identify part 0x%02x as a member of the TMS470 family.", part_number); | |||
return ERROR_FLASH_OPERATION_FAILED; | |||
} | |||
@@ -30,7 +30,7 @@ int main(int argc, char **argv) | |||
if (argc == 1) { | |||
fprintf(stderr, "bin2char <varname>\n"); | |||
fprintf(stderr, "read from standard input and write a char" | |||
" array out to standard output\n"); | |||
" array out to standard output\n"); | |||
exit(1); | |||
} | |||
@@ -210,7 +210,7 @@ char* buf_to_str(const u8 *buf, int buf_len, int radix) | |||
else if (radix == 10) | |||
{ | |||
factor = 2.40824; /* log(256) / log(10) = 2.40824 */ | |||
} | |||
} | |||
else if (radix == 8) | |||
{ | |||
factor = 2.66667; /* log(256) / log(8) = 2.66667 */ | |||
@@ -222,20 +222,20 @@ char* buf_to_str(const u8 *buf, int buf_len, int radix) | |||
str = calloc(str_len + 1, 1); | |||
for (i = b256_len - 1; i >= 0; i--) | |||
{ | |||
tmp = buf[i]; | |||
if ((i == (buf_len / 8)) && (buf_len % 8)) | |||
tmp &= (0xff >> (8 - (buf_len % 8))); | |||
for (j = str_len; j > 0; j--) | |||
{ | |||
tmp += (u32)str[j-1] * 256; | |||
str[j-1] = (u8)(tmp % radix); | |||
tmp /= radix; | |||
} | |||
} | |||
for (j = 0; j < str_len; j++) | |||
{ | |||
tmp = buf[i]; | |||
if ((i == (buf_len / 8)) && (buf_len % 8)) | |||
tmp &= (0xff >> (8 - (buf_len % 8))); | |||
for (j = str_len; j > 0; j--) | |||
{ | |||
tmp += (u32)str[j-1] * 256; | |||
str[j-1] = (u8)(tmp % radix); | |||
tmp /= radix; | |||
} | |||
} | |||
for (j = 0; j < str_len; j++) | |||
str[j] = DIGITS[(int)str[j]]; | |||
return str; | |||
@@ -295,23 +295,23 @@ int str_to_buf(const char *str, int str_len, u8 *buf, int buf_len, int radix) | |||
for (i = 0; charbuf[i]; i++) | |||
{ | |||
tmp = charbuf[i]; | |||
if ((tmp >= '0') && (tmp <= '9')) | |||
tmp = (tmp - '0'); | |||
else if ((tmp >= 'a') && (tmp <= 'f')) | |||
tmp = (tmp - 'a' + 10); | |||
else if ((tmp >= 'A') && (tmp <= 'F')) | |||
tmp = (tmp - 'A' + 10); | |||
else continue; /* skip characters other than [0-9,a-f,A-F] */ | |||
if ((tmp >= '0') && (tmp <= '9')) | |||
tmp = (tmp - '0'); | |||
else if ((tmp >= 'a') && (tmp <= 'f')) | |||
tmp = (tmp - 'a' + 10); | |||
else if ((tmp >= 'A') && (tmp <= 'F')) | |||
tmp = (tmp - 'A' + 10); | |||
else continue; /* skip characters other than [0-9,a-f,A-F] */ | |||
if (tmp >= radix) | |||
continue; /* skip digits invalid for the current radix */ | |||
for (j = 0; j < b256_len; j++) | |||
{ | |||
tmp += (u32)b256_buf[j] * radix; | |||
b256_buf[j] = (u8)(tmp & 0xFF); | |||
tmp >>= 8; | |||
} | |||
{ | |||
tmp += (u32)b256_buf[j] * radix; | |||
b256_buf[j] = (u8)(tmp & 0xFF); | |||
tmp >>= 8; | |||
} | |||
} | |||
@@ -229,9 +229,9 @@ command_t* register_command(command_context_t *context, command_t *parent, char | |||
free((void *)override_name); | |||
/* accumulate help text in Tcl helptext list. */ | |||
Jim_Obj *helptext=Jim_GetGlobalVariableStr(interp, "ocd_helptext", JIM_ERRMSG); | |||
if (Jim_IsShared(helptext)) | |||
helptext = Jim_DuplicateObj(interp, helptext); | |||
Jim_Obj *helptext=Jim_GetGlobalVariableStr(interp, "ocd_helptext", JIM_ERRMSG); | |||
if (Jim_IsShared(helptext)) | |||
helptext = Jim_DuplicateObj(interp, helptext); | |||
Jim_Obj *cmd_entry=Jim_NewListObj(interp, NULL, 0); | |||
Jim_Obj *cmd_list=Jim_NewListObj(interp, NULL, 0); | |||
@@ -356,8 +356,8 @@ void command_print_n(command_context_t *context, char *format, ...) | |||
* The latter bit isn't precisely neat, but will do for now. | |||
*/ | |||
LOG_USER_N("%s", string); | |||
// We already printed it above | |||
//command_output_text(context, string); | |||
/* We already printed it above */ | |||
/* command_output_text(context, string); */ | |||
free(string); | |||
} | |||
@@ -381,8 +381,8 @@ void command_print(command_context_t *context, char *format, ...) | |||
* The latter bit isn't precisely neat, but will do for now. | |||
*/ | |||
LOG_USER_N("%s", string); | |||
// We already printed it above | |||
//command_output_text(context, string); | |||
/* We already printed it above */ | |||
/* command_output_text(context, string); */ | |||
free(string); | |||
} | |||
@@ -644,7 +644,6 @@ static char* openocd_jim_fgets(char *s, int size, void *cookie) | |||
return NULL; | |||
} | |||
static int jim_capture(Jim_Interp *interp, int argc, Jim_Obj *const *argv) | |||
{ | |||
if (argc != 2) | |||
@@ -801,7 +800,7 @@ void register_jim(struct command_context_s *cmd_ctx, const char *name, int (*cmd | |||
Jim_CreateCommand(interp, name, cmd, NULL, NULL); | |||
/* FIX!!! it would be prettier to invoke add_help_text... | |||
accumulate help text in Tcl helptext list. */ | |||
* accumulate help text in Tcl helptext list. */ | |||
Jim_Obj *helptext=Jim_GetGlobalVariableStr(interp, "ocd_helptext", JIM_ERRMSG); | |||
if (Jim_IsShared(helptext)) | |||
helptext = Jim_DuplicateObj(interp, helptext); | |||
@@ -816,7 +815,6 @@ void register_jim(struct command_context_s *cmd_ctx, const char *name, int (*cmd | |||
Jim_ListAppendElement(interp, helptext, cmd_entry); | |||
} | |||
/* return global variable long value or 0 upon failure */ | |||
long jim_global_long(const char *variable) | |||
{ | |||
@@ -91,7 +91,6 @@ char *find_file(const char *file) | |||
return NULL; | |||
} | |||
FILE *open_file_from_path (char *file, char *mode) | |||
{ | |||
if (mode[0]!='r') | |||
@@ -44,7 +44,6 @@ enum fileio_type | |||
FILEIO_BINARY, | |||
}; | |||
enum fileio_access | |||
{ | |||
FILEIO_READ, /* open for reading, position at beginning */ | |||
@@ -71,7 +70,7 @@ extern int fileio_close(fileio_t *fileio); | |||
extern int fileio_open(fileio_t *fileio, char *url, enum fileio_access access, enum fileio_type type); | |||
extern int fileio_read_u32(fileio_t *fileio, u32 *data); | |||
extern int fileio_write_u32(fileio_t *fileio, u32 data); | |||
#define ERROR_FILEIO_LOCATION_UNKNOWN (-1200) | |||
#define ERROR_FILEIO_NOT_FOUND (-1201) | |||
#define ERROR_FILEIO_OPERATION_FAILED (-1202) | |||
@@ -413,7 +413,6 @@ void alive_sleep(int ms) | |||
} | |||
} | |||
void busy_sleep(int ms) | |||
{ | |||
long long then; | |||
@@ -124,6 +124,6 @@ extern int debug_level; | |||
/* see "Error:" log entry for meaningful message to the user. The caller should | |||
* make no assumptions about what went wrong and try to handle the problem. | |||
*/ | |||
#define ERROR_FAIL (-4) | |||
#define ERROR_FAIL (-4) | |||
#endif /* LOG_H */ |
@@ -163,6 +163,5 @@ int parse_cmdline_args(struct command_context_s *cmd_ctx, int argc, char *argv[] | |||
exit(-1); | |||
} | |||
return ERROR_OK; | |||
} |
@@ -82,19 +82,19 @@ void *fill_malloc(size_t size) | |||
int gettimeofday(struct timeval *tv, struct timezone *tz) | |||
{ | |||
FILETIME ft; | |||
LARGE_INTEGER li; | |||
__int64 t; | |||
static int tzflag; | |||
FILETIME ft; | |||
LARGE_INTEGER li; | |||
__int64 t; | |||
static int tzflag; | |||
if (tv) | |||
{ | |||
GetSystemTimeAsFileTime(&ft); | |||
li.LowPart = ft.dwLowDateTime; | |||
li.HighPart = ft.dwHighDateTime; | |||
t = li.QuadPart; /* In 100-nanosecond intervals */ | |||
t -= EPOCHFILETIME; /* Offset to the Epoch time */ | |||
t /= 10; /* In microseconds */ | |||
t = li.QuadPart; /* In 100-nanosecond intervals */ | |||
t -= EPOCHFILETIME; /* Offset to the Epoch time */ | |||
t /= 10; /* In microseconds */ | |||
tv->tv_sec = (long)(t / 1000000); | |||
tv->tv_usec = (long)(t % 1000000); | |||
} | |||
@@ -87,7 +87,7 @@ struct timeval { | |||
#ifdef _WIN32 | |||
struct timezone { | |||
int tz_minuteswest; | |||
int tz_minuteswest; | |||
int tz_dsttime; | |||
}; | |||
#endif | |||
@@ -181,27 +181,27 @@ static __inline void outb(unsigned char value, unsigned short int port) | |||
static __inline int write_socket( int handle, const void *buffer, unsigned int count ) | |||
{ | |||
#ifdef _WIN32 | |||
return send(handle, buffer, count, 0); | |||
return send(handle, buffer, count, 0); | |||
#else | |||
return write(handle, buffer, count); | |||
return write(handle, buffer, count); | |||
#endif | |||
} | |||
static __inline int read_socket( int handle, void *buffer, unsigned int count ) | |||
{ | |||
#ifdef _WIN32 | |||
return recv(handle, buffer, count, 0); | |||
return recv(handle, buffer, count, 0); | |||
#else | |||
return read(handle, buffer, count); | |||
return read(handle, buffer, count); | |||
#endif | |||
} | |||
static __inline int close_socket(int sock) | |||
{ | |||
#ifdef _WIN32 | |||
return closesocket(sock); | |||
return closesocket(sock); | |||
#else | |||
return close(sock); | |||
return close(sock); | |||
#endif | |||
} | |||
@@ -229,9 +229,9 @@ typedef struct | |||
u32 e_shoff; /* Section header table file offset */ | |||
u32 e_flags; /* Processor-specific flags */ | |||
u16 e_ehsize; /* ELF header size in bytes */ | |||
u16 e_phentsize; /* Program header table entry size */ | |||
u16 e_phentsize; /* Program header table entry size */ | |||
u16 e_phnum; /* Program header table entry count */ | |||
u16 e_shentsize; /* Section header table entry size */ | |||
u16 e_shentsize; /* Section header table entry size */ | |||
u16 e_shnum; /* Section header table entry count */ | |||
u16 e_shstrndx; /* Section header string table index */ | |||
} Elf32_Ehdr; | |||
@@ -525,7 +525,6 @@ static int jim_flash_banks(Jim_Interp *interp, int argc, Jim_Obj *const *argv) | |||
return JIM_OK; | |||
} | |||
int tclapi_register_commands() | |||
{ | |||
register_jim("ocd_mem2array", jim_mem2array, "read memory and return as a TCL array for script processing"); | |||
@@ -43,10 +43,8 @@ typedef unsigned int u32; | |||
typedef unsigned long long u64; | |||
#endif | |||
typedef struct jtag_tap_s jtag_tap_t; | |||
/* DANGER!!!! here be dragons! Note that the pointer in | |||
* memory might be unaligned. On some CPU's, i.e. ARM7, | |||
* the 2 lsb are ignored for 32 bit access, on others | |||
@@ -59,26 +57,25 @@ typedef struct jtag_tap_s jtag_tap_t; | |||
#define be_to_h_u16(x) ((u16)((x)[1] | (x)[0] << 8)) | |||
#define h_u32_to_le(buf, val) do {\ | |||
(buf)[3] = ((val) & 0xff000000) >> 24;\ | |||
(buf)[2] = ((val) & 0x00ff0000) >> 16;\ | |||
(buf)[1] = ((val) & 0x0000ff00) >> 8;\ | |||
(buf)[0] = ((val) & 0x000000ff);\ | |||
(buf)[3] = ((val) & 0xff000000) >> 24;\ | |||
(buf)[2] = ((val) & 0x00ff0000) >> 16;\ | |||
(buf)[1] = ((val) & 0x0000ff00) >> 8;\ | |||
(buf)[0] = ((val) & 0x000000ff);\ | |||
} while (0) | |||
#define h_u32_to_be(buf, val) do {\ | |||
(buf)[0] = ((val) & 0xff000000) >> 24;\ | |||
(buf)[1] = ((val) & 0x00ff0000) >> 16;\ | |||
(buf)[2] = ((val) & 0x0000ff00) >> 8;\ | |||
(buf)[3] = ((val) & 0x000000ff);\ | |||
(buf)[0] = ((val) & 0xff000000) >> 24;\ | |||
(buf)[1] = ((val) & 0x00ff0000) >> 16;\ | |||
(buf)[2] = ((val) & 0x0000ff00) >> 8;\ | |||
(buf)[3] = ((val) & 0x000000ff);\ | |||
} while (0) | |||
#define h_u16_to_le(buf, val) do {\ | |||
(buf)[1] = ((val) & 0xff00) >> 8;\ | |||
(buf)[0] = ((val) & 0x00ff) >> 0;\ | |||
(buf)[1] = ((val) & 0xff00) >> 8;\ | |||
(buf)[0] = ((val) & 0x00ff) >> 0;\ | |||
} while (0) | |||
#define h_u16_to_be(buf, val) do {\ | |||
(buf)[0] = ((val) & 0xff00) >> 8;\ | |||
(buf)[1] = ((val) & 0x00ff) >> 0;\ | |||
(buf)[0] = ((val) & 0xff00) >> 8;\ | |||
(buf)[1] = ((val) & 0x00ff) >> 0;\ | |||
} while (0) | |||
#endif /* TYPES_H */ |
@@ -39,7 +39,6 @@ | |||
bitbang_interface_t *bitbang_interface; | |||
/* DANGER!!!! clock absolutely *MUST* be 0 in idle or reset won't work! | |||
* | |||
* Set this to 1 and str912 reset halt will fail. | |||
@@ -316,4 +315,3 @@ int bitbang_execute_queue(void) | |||
return retval; | |||
} | |||
@@ -34,7 +34,6 @@ | |||
#include <stdlib.h> | |||
#include <unistd.h> | |||
bitq_interface_t *bitq_interface; /* low level bit queue interface */ | |||
bitq_state_t bitq_in_state; /* state of input queue */ | |||
@@ -42,7 +41,6 @@ bitq_state_t bitq_in_state; /* state of input queue */ | |||
u8 *bitq_in_buffer; /* buffer dynamically reallocated as needed */ | |||
unsigned long bitq_in_bufsize=32; /* min. buffer size */ | |||
/* | |||
* input queue processing does not use jtag_read_buffer() to avoid unnecessary overhead | |||
* also the buffer for incomming data is reallocated only if necessary | |||
@@ -129,8 +127,6 @@ void bitq_in_proc(void) | |||
} | |||
} | |||
void bitq_io(int tms, int tdi, int tdo_req) | |||
{ | |||
bitq_interface->out(tms, tdi, tdo_req); | |||
@@ -138,7 +134,6 @@ void bitq_io(int tms, int tdi, int tdo_req) | |||
if (bitq_interface->in_rdy()) bitq_in_proc(); | |||
} | |||
void bitq_end_state(enum tap_state state) | |||
{ | |||
if (state==-1) return; | |||
@@ -149,7 +144,6 @@ void bitq_end_state(enum tap_state state) | |||
end_state = state; | |||
} | |||
void bitq_state_move(enum tap_state new_state) | |||
{ | |||
int i=0; | |||
@@ -170,7 +164,6 @@ void bitq_state_move(enum tap_state new_state) | |||
cur_state = new_state; | |||
} | |||
void bitq_path_move(pathmove_command_t *cmd) | |||
{ | |||
int i; | |||
@@ -189,7 +182,6 @@ void bitq_path_move(pathmove_command_t *cmd) | |||
end_state = cur_state; | |||
} | |||
void bitq_runtest(int num_cycles) | |||
{ | |||
int i; | |||
@@ -205,7 +197,6 @@ void bitq_runtest(int num_cycles) | |||
if (cur_state != end_state) bitq_state_move(end_state); | |||
} | |||
void bitq_scan_field(scan_field_t *field, int pause) | |||
{ | |||
int bit_cnt; | |||
@@ -245,7 +236,6 @@ void bitq_scan_field(scan_field_t *field, int pause) | |||
} | |||
} | |||
void bitq_scan(scan_command_t *cmd) | |||
{ | |||
int i; | |||
@@ -258,7 +248,6 @@ void bitq_scan(scan_command_t *cmd) | |||
bitq_scan_field(&cmd->fields[i], 1); | |||
} | |||
int bitq_execute_queue(void) | |||
{ | |||
jtag_command_t *cmd = jtag_command_queue; /* currently processed command */ | |||
@@ -356,7 +345,6 @@ int bitq_execute_queue(void) | |||
return bitq_in_state.status; | |||
} | |||
void bitq_cleanup(void) | |||
{ | |||
if (bitq_in_buffer!=NULL) | |||
@@ -26,7 +26,6 @@ | |||
#include "jtag.h" | |||
#include "bitbang.h" | |||
int dummy_speed(int speed); | |||
int dummy_register_commands(struct command_context_s *cmd_ctx); | |||
int dummy_init(void); | |||
@@ -65,7 +64,6 @@ int dummy_read(void) | |||
return 1; | |||
} | |||
void dummy_write(int tck, int tms, int tdi) | |||
{ | |||
} | |||
@@ -73,7 +71,6 @@ void dummy_write(int tck, int tms, int tdi) | |||
void dummy_reset(int trst, int srst) | |||
{ | |||
} | |||
int dummy_speed(int speed) | |||
{ | |||
@@ -85,7 +82,6 @@ int dummy_register_commands(struct command_context_s *cmd_ctx) | |||
return ERROR_OK; | |||
} | |||
int dummy_init(void) | |||
{ | |||
bitbang_interface = &dummy_bitbang; | |||
@@ -98,8 +94,6 @@ int dummy_quit(void) | |||
return ERROR_OK; | |||
} | |||
void dummy_led(int on) | |||
{ | |||
} | |||
@@ -64,7 +64,7 @@ struct timespec ep93xx_zzzz; | |||
jtag_interface_t ep93xx_interface = | |||
{ | |||
.name = "ep93xx", | |||
.execute_queue = bitbang_execute_queue, | |||
.speed = ep93xx_speed, | |||
@@ -126,7 +126,7 @@ void ep93xx_reset(int trst, int srst) | |||
int ep93xx_speed(int speed) | |||
{ | |||
return ERROR_OK; | |||
} | |||
@@ -438,26 +438,26 @@ int gw16012_execute_queue(void) | |||
#if PARPORT_USE_GIVEIO == 1 | |||
int gw16012_get_giveio_access() | |||
{ | |||
HANDLE h; | |||
OSVERSIONINFO version; | |||
version.dwOSVersionInfoSize = sizeof version; | |||
if (!GetVersionEx( &version )) { | |||
errno = EINVAL; | |||
return -1; | |||
} | |||
if (version.dwPlatformId != VER_PLATFORM_WIN32_NT) | |||
return 0; | |||
HANDLE h; | |||
OSVERSIONINFO version; | |||
h = CreateFile( "\\\\.\\giveio", GENERIC_READ, 0, NULL, OPEN_EXISTING, FILE_ATTRIBUTE_NORMAL, NULL ); | |||
if (h == INVALID_HANDLE_VALUE) { | |||
errno = ENODEV; | |||
return -1; | |||
} | |||
version.dwOSVersionInfoSize = sizeof version; | |||
if (!GetVersionEx( &version )) { | |||
errno = EINVAL; | |||
return -1; | |||
} | |||
if (version.dwPlatformId != VER_PLATFORM_WIN32_NT) | |||
return 0; | |||
CloseHandle( h ); | |||
h = CreateFile( "\\\\.\\giveio", GENERIC_READ, 0, NULL, OPEN_EXISTING, FILE_ATTRIBUTE_NORMAL, NULL ); | |||
if (h == INVALID_HANDLE_VALUE) { | |||
errno = ENODEV; | |||
return -1; | |||
} | |||
return 0; | |||
CloseHandle( h ); | |||
return 0; | |||
} | |||
#endif | |||
@@ -250,8 +250,6 @@ jtag_interface_t *jtag = NULL; | |||
jtag_interface_t *jtag_interface = NULL; | |||
int jtag_speed = 0; | |||
/* forward declarations */ | |||
void jtag_add_pathmove(int num_states, enum tap_state *path); | |||
void jtag_add_runtest(int num_cycles, enum tap_state endstate); | |||
@@ -279,14 +277,12 @@ int Jim_Command_drscan(Jim_Interp *interp, int argc, Jim_Obj *const *argv); | |||
int handle_verify_ircapture_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); | |||
jtag_tap_t *jtag_AllTaps(void) | |||
{ | |||
return jtag_all_taps; | |||
return jtag_all_taps; | |||
}; | |||
int | |||
jtag_NumTotalTaps(void) | |||
int jtag_NumTotalTaps(void) | |||
{ | |||
jtag_tap_t *t; | |||
int n; | |||
@@ -300,8 +296,7 @@ jtag_NumTotalTaps(void) | |||
return n; | |||
} | |||
int | |||
jtag_NumEnabledTaps(void) | |||
int jtag_NumEnabledTaps(void) | |||
{ | |||
jtag_tap_t *t; | |||
int n; | |||
@@ -345,8 +340,7 @@ jtag_tap_t *jtag_TapByString( const char *s ) | |||
return t; | |||
} | |||
jtag_tap_t * | |||
jtag_TapByJimObj( Jim_Interp *interp, Jim_Obj *o ) | |||
jtag_tap_t * jtag_TapByJimObj( Jim_Interp *interp, Jim_Obj *o ) | |||
{ | |||
jtag_tap_t *t; | |||
const char *cp; | |||
@@ -365,8 +359,7 @@ jtag_TapByJimObj( Jim_Interp *interp, Jim_Obj *o ) | |||
} | |||
/* returns a pointer to the n-th device in the scan chain */ | |||
jtag_tap_t * | |||
jtag_TapByAbsPosition( int n ) | |||
jtag_tap_t * jtag_TapByAbsPosition( int n ) | |||
{ | |||
int orig_n; | |||
jtag_tap_t *t; | |||
@@ -377,11 +370,10 @@ jtag_TapByAbsPosition( int n ) | |||
while( t && (n > 0)) { | |||
n--; | |||
t = t->next_tap; | |||
} | |||
} | |||
return t; | |||
} | |||
int jtag_register_event_callback(int (*callback)(enum jtag_event event, void *priv), void *priv) | |||
{ | |||
jtag_event_callback_t **callbacks_p = &jtag_event_callbacks; | |||
@@ -463,7 +455,6 @@ jtag_command_t** jtag_get_last_command_p(void) | |||
return last_comand_pointer; | |||
} | |||
void* cmd_queue_alloc(size_t size) | |||
{ | |||
cmd_queue_page_t **p_page = &cmd_queue_pages; | |||
@@ -491,17 +482,16 @@ void* cmd_queue_alloc(size_t size) | |||
* | |||
*/ | |||
union worse_case_align { | |||
int i; | |||
long l; | |||
float f; | |||
void *v; | |||
int i; | |||
long l; | |||
float f; | |||
void *v; | |||
}; | |||
#define ALIGN_SIZE (sizeof(union worse_case_align)) | |||
// The alignment process. | |||
/* The alignment process. */ | |||
size = (size + ALIGN_SIZE -1) & (~(ALIGN_SIZE-1)); | |||
// Done... | |||
/* Done... */ | |||
if (*p_page) | |||
{ | |||
@@ -652,7 +642,6 @@ int MINIDRIVER(interface_jtag_add_ir_scan)(int num_fields, scan_field_t *fields, | |||
(*last_cmd)->cmd.scan->fields[nth_tap].out_value = buf_set_ones(cmd_queue_alloc(CEIL(scan_size, 8)), scan_size); | |||
(*last_cmd)->cmd.scan->fields[nth_tap].out_mask = NULL; | |||
tap->bypass = 1; | |||
} | |||
/* update device information */ | |||
@@ -1023,7 +1012,6 @@ void jtag_add_pathmove(int num_states, enum tap_state *path) | |||
jtag_prelude1(); | |||
retval=interface_jtag_add_pathmove(num_states, path); | |||
cmd_queue_cur_state = path[num_states - 1]; | |||
if (retval!=ERROR_OK) | |||