Browse Source

target: Add 64-bit target address support

Define a target_addr_t type to support 32-bit and 64-bit addresses at
the same time. Also define matching TARGET_PRI*ADDR format macros as
well as a convenient TARGET_ADDR_FMT.

In targets that are 32-bit (avr32, nds32, arm7/9/11, fm4, xmc1000)
be least invasive by leaving the formatting unchanged apart from the
type;
for generic code adopt TARGET_ADDR_FMT as unified address format.

Don't silently change gdb formatting here, leave that to later.

Add COMMAND_PARSE_ADDRESS() macro to abstract the address type.
Implement it using its own parse_target_addr() function, in the hopes
of catching pointer type mismatches better.

Add '--disable-target64' configure option to revert to previous 32-bit
target address behavior.

Change-Id: I2e91d205862ceb14f94b3e72a7e99ee0373a85d5
Signed-off-by: Dongxue Zhang <elta.era@gmail.com>
Signed-off-by: David Ung <david.ung.42@gmail.com>
[AF: Default to enabling (Paul Fertser), rename macros, simplify]
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
jim-nuttx
Dongxue Zhang 10 years ago
committed by Matthias Welwarsky
parent
commit
47b8cf8420
68 changed files with 728 additions and 546 deletions
  1. +12
    -0
      configure.ac
  2. +1
    -1
      src/flash/nor/cfi.c
  3. +1
    -1
      src/flash/nor/fm4.c
  4. +1
    -1
      src/flash/nor/lpc2000.c
  5. +1
    -1
      src/flash/nor/lpcspifi.c
  6. +1
    -1
      src/flash/nor/xmc1xxx.c
  7. +2
    -0
      src/helper/command.c
  8. +6
    -0
      src/helper/command.h
  9. +28
    -2
      src/helper/types.h
  10. +2
    -2
      src/jtag/aice/aice_pipe.c
  11. +1
    -1
      src/jtag/aice/aice_port.h
  12. +3
    -3
      src/jtag/aice/aice_usb.c
  13. +2
    -2
      src/rtos/linux.c
  14. +4
    -4
      src/server/gdb_server.c
  15. +1
    -1
      src/target/algorithm.h
  16. +3
    -3
      src/target/arm.h
  17. +11
    -11
      src/target/arm11.c
  18. +4
    -4
      src/target/arm720t.c
  19. +20
    -17
      src/target/arm7_9_common.c
  20. +8
    -8
      src/target/arm7_9_common.h
  21. +5
    -5
      src/target/arm920t.c
  22. +2
    -2
      src/target/arm920t.h
  23. +5
    -5
      src/target/arm926ejs.c
  24. +1
    -1
      src/target/arm926ejs.h
  25. +2
    -2
      src/target/arm946e.c
  26. +8
    -8
      src/target/armv4_5.c
  27. +3
    -2
      src/target/armv4_5_mmu.h
  28. +1
    -1
      src/target/armv7a.h
  29. +23
    -23
      src/target/armv7a_cache_l2x.c
  30. +1
    -1
      src/target/armv7a_cache_l2x.h
  31. +6
    -6
      src/target/armv7m.c
  32. +5
    -5
      src/target/armv7m.h
  33. +7
    -7
      src/target/avr32_ap7k.c
  34. +4
    -4
      src/target/avrt.c
  35. +22
    -21
      src/target/breakpoints.c
  36. +10
    -9
      src/target/breakpoints.h
  37. +35
    -32
      src/target/cortex_a.c
  38. +7
    -7
      src/target/cortex_m.c
  39. +11
    -11
      src/target/dsp563xx.c
  40. +7
    -7
      src/target/dsp5680xx.c
  41. +2
    -2
      src/target/feroceon.c
  42. +11
    -9
      src/target/hla_target.c
  43. +1
    -1
      src/target/image.h
  44. +2
    -2
      src/target/lakemont.c
  45. +2
    -2
      src/target/lakemont.h
  46. +6
    -6
      src/target/ls1_sap.c
  47. +6
    -6
      src/target/mips32.c
  48. +3
    -3
      src/target/mips32.h
  49. +1
    -1
      src/target/mips32_pracc.c
  50. +16
    -14
      src/target/mips_m4k.c
  51. +10
    -10
      src/target/nds32.c
  52. +7
    -7
      src/target/nds32.h
  53. +2
    -2
      src/target/nds32_aice.c
  54. +2
    -2
      src/target/nds32_aice.h
  55. +4
    -4
      src/target/nds32_tlb.c
  56. +4
    -4
      src/target/nds32_tlb.h
  57. +13
    -13
      src/target/nds32_v2.c
  58. +4
    -4
      src/target/nds32_v3.c
  59. +11
    -11
      src/target/nds32_v3_common.c
  60. +7
    -7
      src/target/nds32_v3_common.h
  61. +4
    -4
      src/target/nds32_v3m.c
  62. +18
    -15
      src/target/openrisc/or1k.c
  63. +210
    -99
      src/target/target.c
  64. +26
    -21
      src/target/target.h
  65. +16
    -17
      src/target/target_type.h
  66. +44
    -41
      src/target/x86_32_common.c
  67. +5
    -5
      src/target/x86_32_common.h
  68. +14
    -12
      src/target/xscale.c

+ 12
- 0
configure.ac View File

@@ -339,6 +339,10 @@ AC_ARG_ENABLE([internal-libjaylink],
[Disable building internal libjaylink]),
[use_internal_libjaylink=$enableval], [use_internal_libjaylink=yes])

AC_ARG_ENABLE([target64],
AS_HELP_STRING([--disable-target64], [Disable 64-bit target address]),
[build_target64=$enableval], [build_target64=yes])

build_minidriver=no
AC_MSG_CHECKING([whether to enable ZY1000 minidriver])
AS_IF([test "x$build_zy1000" = "xyes"], [
@@ -572,6 +576,13 @@ AS_IF([test "x$build_sysfsgpio" = "xyes"], [
AC_DEFINE([BUILD_SYSFSGPIO], [0], [0 if you don't want SysfsGPIO driver.])
])

AS_IF([test "x$build_target64" = "xyes"], [
AC_DEFINE([BUILD_TARGET64], [1], [1 if you want 64-bit addresses.])
], [
AC_DEFINE([BUILD_TARGET64], [0], [0 if you don't want 64-bit addresses.])
])


PKG_CHECK_MODULES([LIBUSB1], [libusb-1.0], [
use_libusb1=yes
AC_DEFINE([HAVE_LIBUSB1], [1], [Define if you have libusb-1.x])
@@ -689,6 +700,7 @@ AM_CONDITIONAL([BITQ], [test "x$build_bitq" = "xyes"])
AM_CONDITIONAL([USE_LIBFTDI], [test "x$use_libftdi" = "xyes"])
AM_CONDITIONAL([USE_HIDAPI], [test "x$use_hidapi" = "xyes"])
AM_CONDITIONAL([USE_LIBJAYLINK], [test "x$use_libjaylink" = "xyes"])
AM_CONDITIONAL([TARGET64], [test "x$build_target64" = "xyes"])

AM_CONDITIONAL([MINIDRIVER], [test "x$build_minidriver" = "xyes"])
AM_CONDITIONAL([MINIDRIVER_DUMMY], [test "x$build_minidriver_dummy" = "xyes"])


+ 1
- 1
src/flash/nor/cfi.c View File

@@ -1312,7 +1312,7 @@ static int cfi_intel_write_block(struct flash_bank *bank, const uint8_t *buffer,
busy_pattern_val = cfi_command_val(bank, 0x80);
error_pattern_val = cfi_command_val(bank, 0x7e);

LOG_DEBUG("Using target buffer at 0x%08" PRIx32 " and of size 0x%04" PRIx32,
LOG_DEBUG("Using target buffer at " TARGET_ADDR_FMT " and of size 0x%04" PRIx32,
source->address, buffer_size);

/* Programming main loop */


+ 1
- 1
src/flash/nor/fm4.c View File

@@ -272,7 +272,7 @@ static int fm4_flash_write(struct flash_bank *bank, const uint8_t *buffer,
uint32_t halfwords = MIN(halfword_count, data_workarea->size / 2);
uint32_t addr = bank->base + offset;

LOG_DEBUG("copying %" PRId32 " bytes to SRAM 0x%08" PRIx32,
LOG_DEBUG("copying %" PRId32 " bytes to SRAM 0x%08" TARGET_PRIxADDR,
MIN(halfwords * 2, byte_count), data_workarea->address);

retval = target_write_buffer(target, data_workarea->address,


+ 1
- 1
src/flash/nor/lpc2000.c View File

@@ -688,7 +688,7 @@ static int lpc2000_iap_working_area_init(struct flash_bank *bank, struct working

int retval = target_write_memory(target, (*iap_working_area)->address, 4, 2, jump_gate);
if (retval != ERROR_OK) {
LOG_ERROR("Write memory at address 0x%8.8" PRIx32 " failed (check work_area definition)",
LOG_ERROR("Write memory at address 0x%8.8" TARGET_PRIxADDR " failed (check work_area definition)",
(*iap_working_area)->address);
target_free_working_area(target, *iap_working_area);
}


+ 1
- 1
src/flash/nor/lpcspifi.c View File

@@ -186,7 +186,7 @@ static int lpcspifi_set_hw_mode(struct flash_bank *bank)
return retval;
}

LOG_DEBUG("Writing algorithm to working area at 0x%08" PRIx32,
LOG_DEBUG("Writing algorithm to working area at 0x%08" TARGET_PRIxADDR,
spifi_init_algorithm->address);
/* Write algorithm to working area */
retval = target_write_buffer(target,


+ 1
- 1
src/flash/nor/xmc1xxx.c View File

@@ -305,7 +305,7 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer,
uint32_t blocks = MIN(block_count, data_workarea->size / NVM_BLOCK_SIZE);
uint32_t addr = bank->base + offset;

LOG_DEBUG("copying %" PRId32 " bytes to SRAM 0x%08" PRIx32,
LOG_DEBUG("copying %" PRId32 " bytes to SRAM 0x%08" TARGET_PRIxADDR,
MIN(blocks * NVM_BLOCK_SIZE, byte_count),
data_workarea->address);



+ 2
- 0
src/helper/command.c View File

@@ -1410,6 +1410,8 @@ DEFINE_PARSE_ULONGLONG(_u32, uint32_t, 0, UINT32_MAX)
DEFINE_PARSE_ULONGLONG(_u16, uint16_t, 0, UINT16_MAX)
DEFINE_PARSE_ULONGLONG(_u8, uint8_t, 0, UINT8_MAX)

DEFINE_PARSE_ULONGLONG(_target_addr, target_addr_t, 0, TARGET_ADDR_MAX)

#define DEFINE_PARSE_LONGLONG(name, type, min, max) \
DEFINE_PARSE_WRAPPER(name, type, min, max, long long, _llong)
DEFINE_PARSE_LONGLONG(_int, int, n < INT_MIN, INT_MAX)


+ 6
- 0
src/helper/command.h View File

@@ -357,10 +357,13 @@ DECLARE_PARSE_WRAPPER(_u16, uint16_t);
DECLARE_PARSE_WRAPPER(_u8, uint8_t);

DECLARE_PARSE_WRAPPER(_int, int);
DECLARE_PARSE_WRAPPER(_s64, int64_t);
DECLARE_PARSE_WRAPPER(_s32, int32_t);
DECLARE_PARSE_WRAPPER(_s16, int16_t);
DECLARE_PARSE_WRAPPER(_s8, int8_t);

DECLARE_PARSE_WRAPPER(_target_addr, target_addr_t);

/**
* @brief parses the string @a in into @a out as a @a type, or prints
* a command error and passes the error code to the caller. If an error
@@ -382,6 +385,9 @@ DECLARE_PARSE_WRAPPER(_s8, int8_t);
} \
} while (0)

#define COMMAND_PARSE_ADDRESS(in, out) \
COMMAND_PARSE_NUMBER(target_addr, in, out)

/**
* Parse the string @c as a binary parameter, storing the boolean value
* in @c out. The strings @c on and @c off are used to match different


+ 28
- 2
src/helper/types.h View File

@@ -296,14 +296,21 @@ static inline int parity_u32(uint32_t x)
*/

#if !defined(_STDINT_H)
#define PRIx32 "x"
#define PRId32 "d"
#define SCNx32 "x"
#define PRIi32 "i"
#define PRIo32 "o"
#define PRIu32 "u"
#define PRIx32 "x"
#define PRIX32 "X"
#define SCNx32 "x"
#define PRId8 PRId32
#define SCNx64 "llx"
#define PRId64 "lld"
#define PRIi64 "lli"
#define PRIo64 "llo"
#define PRIu64 "llu"
#define PRIx64 "llx"
#define PRIX64 "llX"

typedef CYG_ADDRWORD intptr_t;
typedef int64_t intmax_t;
@@ -337,4 +344,23 @@ typedef uint64_t uintmax_t;

#endif

#if BUILD_TARGET64
typedef uint64_t target_addr_t;
#define TARGET_ADDR_MAX UINT64_MAX
#define TARGET_PRIdADDR PRId64
#define TARGET_PRIuADDR PRIu64
#define TARGET_PRIoADDR PRIo64
#define TARGET_PRIxADDR PRIx64
#define TARGET_PRIXADDR PRIX64
#else
typedef uint32_t target_addr_t;
#define TARGET_ADDR_MAX UINT32_MAX
#define TARGET_PRIdADDR PRId32
#define TARGET_PRIuADDR PRIu32
#define TARGET_PRIoADDR PRIo32
#define TARGET_PRIxADDR PRIx32
#define TARGET_PRIXADDR PRIX32
#endif
#define TARGET_ADDR_FMT "0x%8.8" TARGET_PRIxADDR

#endif /* OPENOCD_HELPER_TYPES_H */

+ 2
- 2
src/jtag/aice/aice_pipe.c View File

@@ -786,8 +786,8 @@ static int aice_pipe_memory_mode(uint32_t coreid, enum nds_memory_select mem_sel
return ERROR_FAIL;
}

static int aice_pipe_read_tlb(uint32_t coreid, uint32_t virtual_address,
uint32_t *physical_address)
static int aice_pipe_read_tlb(uint32_t coreid, target_addr_t virtual_address,
target_addr_t *physical_address)
{
char line[AICE_PIPE_MAXLINE];
char command[AICE_PIPE_MAXLINE];


+ 1
- 1
src/jtag/aice/aice_port.h View File

@@ -180,7 +180,7 @@ struct aice_port_api_s {
int (*memory_mode)(uint32_t coreid, enum nds_memory_select mem_select);

/** */
int (*read_tlb)(uint32_t coreid, uint32_t virtual_address, uint32_t *physical_address);
int (*read_tlb)(uint32_t coreid, target_addr_t virtual_address, target_addr_t *physical_address);

/** */
int (*cache_ctl)(uint32_t coreid, uint32_t subtype, uint32_t address);


+ 3
- 3
src/jtag/aice/aice_usb.c View File

@@ -3424,10 +3424,10 @@ static int aice_usb_memory_mode(uint32_t coreid, enum nds_memory_select mem_sele
return ERROR_OK;
}

static int aice_usb_read_tlb(uint32_t coreid, uint32_t virtual_address,
uint32_t *physical_address)
static int aice_usb_read_tlb(uint32_t coreid, target_addr_t virtual_address,
target_addr_t *physical_address)
{
LOG_DEBUG("aice_usb_read_tlb, virtual address: 0x%08" PRIx32, virtual_address);
LOG_DEBUG("aice_usb_read_tlb, virtual address: 0x%08" TARGET_PRIxADDR, virtual_address);

uint32_t instructions[4];
uint32_t probe_result;


+ 2
- 2
src/rtos/linux.c View File

@@ -105,11 +105,11 @@ static int linux_os_dummy_update(struct rtos *rtos)
return 0;
}

static int linux_compute_virt2phys(struct target *target, uint32_t address)
static int linux_compute_virt2phys(struct target *target, target_addr_t address)
{
struct linux_os *linux_os = (struct linux_os *)
target->rtos->rtos_specific_params;
uint32_t pa = 0;
target_addr_t pa = 0;
int retval = target->type->virt2phys(target, address, &pa);
if (retval != ERROR_OK) {
LOG_ERROR("Cannot compute linux virt2phys translation");


+ 4
- 4
src/server/gdb_server.c View File

@@ -735,22 +735,22 @@ static void gdb_signal_reply(struct target *target, struct connection *connectio
stop_reason[0] = '\0';
if (target->debug_reason == DBG_REASON_WATCHPOINT) {
enum watchpoint_rw hit_wp_type;
uint32_t hit_wp_address;
target_addr_t hit_wp_address;

if (watchpoint_hit(target, &hit_wp_type, &hit_wp_address) == ERROR_OK) {

switch (hit_wp_type) {
case WPT_WRITE:
snprintf(stop_reason, sizeof(stop_reason),
"watch:%08" PRIx32 ";", hit_wp_address);
"watch:%08" TARGET_PRIxADDR ";", hit_wp_address);
break;
case WPT_READ:
snprintf(stop_reason, sizeof(stop_reason),
"rwatch:%08" PRIx32 ";", hit_wp_address);
"rwatch:%08" TARGET_PRIxADDR ";", hit_wp_address);
break;
case WPT_ACCESS:
snprintf(stop_reason, sizeof(stop_reason),
"awatch:%08" PRIx32 ";", hit_wp_address);
"awatch:%08" TARGET_PRIxADDR ";", hit_wp_address);
break;
default:
break;


+ 1
- 1
src/target/algorithm.h View File

@@ -26,7 +26,7 @@ enum param_direction {
};

struct mem_param {
uint32_t address;
target_addr_t address;
uint32_t size;
uint8_t *value;
enum param_direction direction;


+ 3
- 3
src/target/arm.h View File

@@ -231,7 +231,7 @@ int arm_init_arch_info(struct target *target, struct arm *arm);
int armv4_5_run_algorithm(struct target *target,
int num_mem_params, struct mem_param *mem_params,
int num_reg_params, struct reg_param *reg_params,
uint32_t entry_point, uint32_t exit_point,
target_addr_t entry_point, target_addr_t exit_point,
int timeout_ms, void *arch_info);
int armv4_5_run_algorithm_inner(struct target *target,
int num_mem_params, struct mem_param *mem_params,
@@ -242,9 +242,9 @@ int armv4_5_run_algorithm_inner(struct target *target,
int timeout_ms, void *arch_info));

int arm_checksum_memory(struct target *target,
uint32_t address, uint32_t count, uint32_t *checksum);
target_addr_t address, uint32_t count, uint32_t *checksum);
int arm_blank_check_memory(struct target *target,
uint32_t address, uint32_t count, uint32_t *blank, uint8_t erased_value);
target_addr_t address, uint32_t count, uint32_t *blank, uint8_t erased_value);

void arm_set_cpsr(struct arm *arm, uint32_t cpsr);
struct reg *arm_reg_current(struct arm *arm, unsigned regnum);


+ 11
- 11
src/target/arm11.c View File

@@ -42,7 +42,7 @@


static int arm11_step(struct target *target, int current,
uint32_t address, int handle_breakpoints);
target_addr_t address, int handle_breakpoints);


/** Check and if necessary take control of the system
@@ -449,7 +449,7 @@ static uint32_t arm11_nextpc(struct arm11_common *arm11, int current, uint32_t a
}

static int arm11_resume(struct target *target, int current,
uint32_t address, int handle_breakpoints, int debug_execution)
target_addr_t address, int handle_breakpoints, int debug_execution)
{
/* LOG_DEBUG("current %d address %08x handle_breakpoints %d debug_execution %d", */
/* current, address, handle_breakpoints, debug_execution); */
@@ -467,7 +467,7 @@ static int arm11_resume(struct target *target, int current,

address = arm11_nextpc(arm11, current, address);

LOG_DEBUG("RESUME PC %08" PRIx32 "%s", address, !current ? "!" : "");
LOG_DEBUG("RESUME PC %08" TARGET_PRIxADDR "%s", address, !current ? "!" : "");

/* clear breakpoints/watchpoints and VCR*/
CHECK_RETVAL(arm11_sc7_clear_vbw(arm11));
@@ -481,7 +481,7 @@ static int arm11_resume(struct target *target, int current,

for (bp = target->breakpoints; bp; bp = bp->next) {
if (bp->address == address) {
LOG_DEBUG("must step over %08" PRIx32 "", bp->address);
LOG_DEBUG("must step over %08" TARGET_PRIxADDR "", bp->address);
arm11_step(target, 1, 0, 0);
break;
}
@@ -507,7 +507,7 @@ static int arm11_resume(struct target *target, int current,

CHECK_RETVAL(arm11_sc7_run(arm11, brp, ARRAY_SIZE(brp)));

LOG_DEBUG("Add BP %d at %08" PRIx32, brp_num,
LOG_DEBUG("Add BP %d at %08" TARGET_PRIxADDR, brp_num,
bp->address);

brp_num++;
@@ -557,7 +557,7 @@ static int arm11_resume(struct target *target, int current,
}

static int arm11_step(struct target *target, int current,
uint32_t address, int handle_breakpoints)
target_addr_t address, int handle_breakpoints)
{
LOG_DEBUG("target->state: %s",
target_state_name(target));
@@ -571,7 +571,7 @@ static int arm11_step(struct target *target, int current,

address = arm11_nextpc(arm11, current, address);

LOG_DEBUG("STEP PC %08" PRIx32 "%s", address, !current ? "!" : "");
LOG_DEBUG("STEP PC %08" TARGET_PRIxADDR "%s", address, !current ? "!" : "");


/** \todo TODO: Thumb not supported here */
@@ -583,13 +583,13 @@ static int arm11_step(struct target *target, int current,
/* skip over BKPT */
if ((next_instruction & 0xFFF00070) == 0xe1200070) {
address = arm11_nextpc(arm11, 0, address + 4);
LOG_DEBUG("Skipping BKPT %08" PRIx32, address);
LOG_DEBUG("Skipping BKPT %08" TARGET_PRIxADDR, address);
}
/* skip over Wait for interrupt / Standby
* mcr 15, 0, r?, cr7, cr0, {4} */
else if ((next_instruction & 0xFFFF0FFF) == 0xee070f90) {
address = arm11_nextpc(arm11, 0, address + 4);
LOG_DEBUG("Skipping WFI %08" PRIx32, address);
LOG_DEBUG("Skipping WFI %08" TARGET_PRIxADDR, address);
}
/* ignore B to self */
else if ((next_instruction & 0xFEFFFFFF) == 0xeafffffe)
@@ -887,7 +887,7 @@ static int arm11_read_memory_inner(struct target *target,
}

static int arm11_read_memory(struct target *target,
uint32_t address,
target_addr_t address,
uint32_t size,
uint32_t count,
uint8_t *buffer)
@@ -1043,7 +1043,7 @@ static int arm11_write_memory_inner(struct target *target,
}

static int arm11_write_memory(struct target *target,
uint32_t address, uint32_t size,
target_addr_t address, uint32_t size,
uint32_t count, const uint8_t *buffer)
{
/* pointer increment matters only for multi-unit writes ...


+ 4
- 4
src/target/arm720t.c View File

@@ -271,7 +271,7 @@ static int arm720_mmu(struct target *target, int *enabled)
}

static int arm720_virt2phys(struct target *target,
uint32_t virtual, uint32_t *physical)
target_addr_t virtual, target_addr_t *physical)
{
uint32_t cb;
struct arm720t_common *arm720t = target_to_arm720(target);
@@ -286,7 +286,7 @@ static int arm720_virt2phys(struct target *target,
}

static int arm720t_read_memory(struct target *target,
uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
int retval;
struct arm720t_common *arm720t = target_to_arm720(target);
@@ -309,7 +309,7 @@ static int arm720t_read_memory(struct target *target,
}

static int arm720t_read_phys_memory(struct target *target,
uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
struct arm720t_common *arm720t = target_to_arm720(target);

@@ -317,7 +317,7 @@ static int arm720t_read_phys_memory(struct target *target,
}

static int arm720t_write_phys_memory(struct target *target,
uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
{
struct arm720t_common *arm720t = target_to_arm720(target);



+ 20
- 17
src/target/arm7_9_common.c View File

@@ -101,7 +101,8 @@ static void arm7_9_assign_wp(struct arm7_9_common *arm7_9, struct breakpoint *br
arm7_9->wp_available--;
} else
LOG_ERROR("BUG: no hardware comparator available");
LOG_DEBUG("BPID: %" PRId32 " (0x%08" PRIx32 ") using hw wp: %d",

LOG_DEBUG("BPID: %" PRId32 " (0x%08" TARGET_PRIxADDR ") using hw wp: %d",
breakpoint->unique_id,
breakpoint->address,
breakpoint->set);
@@ -187,7 +188,7 @@ static int arm7_9_set_breakpoint(struct target *target, struct breakpoint *break
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
int retval = ERROR_OK;

LOG_DEBUG("BPID: %" PRId32 ", Address: 0x%08" PRIx32 ", Type: %d",
LOG_DEBUG("BPID: %" PRId32 ", Address: 0x%08" TARGET_PRIxADDR ", Type: %d",
breakpoint->unique_id,
breakpoint->address,
breakpoint->type);
@@ -244,7 +245,7 @@ static int arm7_9_set_breakpoint(struct target *target, struct breakpoint *break
if (retval != ERROR_OK)
return retval;
if (verify != arm7_9->arm_bkpt) {
LOG_ERROR("Unable to set 32 bit software breakpoint at address %08" PRIx32
LOG_ERROR("Unable to set 32 bit software breakpoint at address %08" TARGET_PRIxADDR
" - check that memory is read/writable", breakpoint->address);
return ERROR_OK;
}
@@ -264,7 +265,7 @@ static int arm7_9_set_breakpoint(struct target *target, struct breakpoint *break
if (retval != ERROR_OK)
return retval;
if (verify != arm7_9->thumb_bkpt) {
LOG_ERROR("Unable to set thumb software breakpoint at address %08" PRIx32
LOG_ERROR("Unable to set thumb software breakpoint at address %08" TARGET_PRIxADDR
" - check that memory is read/writable", breakpoint->address);
return ERROR_OK;
}
@@ -299,7 +300,7 @@ static int arm7_9_unset_breakpoint(struct target *target, struct breakpoint *bre
int retval = ERROR_OK;
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);

LOG_DEBUG("BPID: %" PRId32 ", Address: 0x%08" PRIx32,
LOG_DEBUG("BPID: %" PRId32 ", Address: 0x%08" TARGET_PRIxADDR,
breakpoint->unique_id,
breakpoint->address);

@@ -1692,7 +1693,7 @@ static void arm7_9_enable_breakpoints(struct target *target)

int arm7_9_resume(struct target *target,
int current,
uint32_t address,
target_addr_t address,
int handle_breakpoints,
int debug_execution)
{
@@ -1724,7 +1725,7 @@ int arm7_9_resume(struct target *target,
breakpoint = breakpoint_find(target,
buf_get_u32(arm->pc->value, 0, 32));
if (breakpoint != NULL) {
LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 " (id: %" PRId32,
LOG_DEBUG("unset breakpoint at 0x%8.8" TARGET_PRIxADDR " (id: %" PRId32,
breakpoint->address,
breakpoint->unique_id);
retval = arm7_9_unset_breakpoint(target, breakpoint);
@@ -1783,7 +1784,7 @@ int arm7_9_resume(struct target *target,
LOG_DEBUG("new PC after step: 0x%8.8" PRIx32,
buf_get_u32(arm->pc->value, 0, 32));

LOG_DEBUG("set breakpoint at 0x%8.8" PRIx32 "", breakpoint->address);
LOG_DEBUG("set breakpoint at 0x%8.8" TARGET_PRIxADDR "", breakpoint->address);
retval = arm7_9_set_breakpoint(target, breakpoint);
if (retval != ERROR_OK)
return retval;
@@ -1894,7 +1895,7 @@ void arm7_9_disable_eice_step(struct target *target)
embeddedice_store_reg(&arm7_9->eice_cache->reg_list[EICE_W1_CONTROL_VALUE]);
}

int arm7_9_step(struct target *target, int current, uint32_t address, int handle_breakpoints)
int arm7_9_step(struct target *target, int current, target_addr_t address, int handle_breakpoints)
{
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
struct arm *arm = &arm7_9->arm;
@@ -2094,7 +2095,7 @@ static int arm7_9_write_core_reg(struct target *target, struct reg *r,
}

int arm7_9_read_memory(struct target *target,
uint32_t address,
target_addr_t address,
uint32_t size,
uint32_t count,
uint8_t *buffer)
@@ -2109,7 +2110,7 @@ int arm7_9_read_memory(struct target *target,
int retval;
int last_reg = 0;

LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
LOG_DEBUG("address: 0x%8.8" TARGET_PRIxADDR ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
address, size, count);

if (target->state != TARGET_HALTED) {
@@ -2247,7 +2248,8 @@ int arm7_9_read_memory(struct target *target,

if (((cpsr & 0x1f) == ARM_MODE_ABT) && (arm->core_mode != ARM_MODE_ABT)) {
LOG_WARNING(
"memory read caused data abort (address: 0x%8.8" PRIx32 ", size: 0x%" PRIx32 ", count: 0x%" PRIx32 ")",
"memory read caused data abort "
"(address: 0x%8.8" TARGET_PRIxADDR ", size: 0x%" PRIx32 ", count: 0x%" PRIx32 ")",
address,
size,
count);
@@ -2263,7 +2265,7 @@ int arm7_9_read_memory(struct target *target,
}

int arm7_9_write_memory(struct target *target,
uint32_t address,
target_addr_t address,
uint32_t size,
uint32_t count,
const uint8_t *buffer)
@@ -2460,7 +2462,8 @@ int arm7_9_write_memory(struct target *target,

if (((cpsr & 0x1f) == ARM_MODE_ABT) && (arm->core_mode != ARM_MODE_ABT)) {
LOG_WARNING(
"memory write caused data abort (address: 0x%8.8" PRIx32 ", size: 0x%" PRIx32 ", count: 0x%" PRIx32 ")",
"memory write caused data abort "
"(address: 0x%8.8" TARGET_PRIxADDR ", size: 0x%" PRIx32 ", count: 0x%" PRIx32 ")",
address,
size,
count);
@@ -2476,7 +2479,7 @@ int arm7_9_write_memory(struct target *target,
}

int arm7_9_write_memory_opt(struct target *target,
uint32_t address,
target_addr_t address,
uint32_t size,
uint32_t count,
const uint8_t *buffer)
@@ -2576,7 +2579,7 @@ static const uint32_t dcc_code[] = {
};

int arm7_9_bulk_write_memory(struct target *target,
uint32_t address,
target_addr_t address,
uint32_t count,
const uint8_t *buffer)
{
@@ -2632,7 +2635,7 @@ int arm7_9_bulk_write_memory(struct target *target,
uint32_t endaddress = buf_get_u32(reg_params[0].value, 0, 32);
if (endaddress != (address + count*4)) {
LOG_ERROR(
"DCC write failed, expected end address 0x%08" PRIx32 " got 0x%0" PRIx32 "",
"DCC write failed, expected end address 0x%08" TARGET_PRIxADDR " got 0x%0" PRIx32 "",
(address + count*4),
endaddress);
retval = ERROR_FAIL;


+ 8
- 8
src/target/arm7_9_common.h View File

@@ -122,13 +122,13 @@ struct arm7_9_common {
* Used as a fallback when bulk writes are unavailable, or for writing data needed to
* do the bulk writes.
*/
int (*write_memory)(struct target *target, uint32_t address,
int (*write_memory)(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer);
/**
* Write target memory in multiples of 4 bytes, optimized for
* writing large quantities of data.
*/
int (*bulk_write_memory)(struct target *target, uint32_t address,
int (*bulk_write_memory)(struct target *target, target_addr_t address,
uint32_t count, const uint8_t *buffer);
};

@@ -155,19 +155,19 @@ int arm7_9_early_halt(struct target *target);
int arm7_9_soft_reset_halt(struct target *target);

int arm7_9_halt(struct target *target);
int arm7_9_resume(struct target *target, int current, uint32_t address,
int arm7_9_resume(struct target *target, int current, target_addr_t address,
int handle_breakpoints, int debug_execution);
int arm7_9_step(struct target *target, int current, uint32_t address,
int arm7_9_step(struct target *target, int current, target_addr_t address,
int handle_breakpoints);
int arm7_9_read_memory(struct target *target, uint32_t address,
int arm7_9_read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer);
int arm7_9_write_memory(struct target *target, uint32_t address,
int arm7_9_write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer);
int arm7_9_write_memory_opt(struct target *target, uint32_t address,
int arm7_9_write_memory_opt(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer);
int arm7_9_write_memory_no_opt(struct target *target, uint32_t address,
uint32_t size, uint32_t count, const uint8_t *buffer);
int arm7_9_bulk_write_memory(struct target *target, uint32_t address,
int arm7_9_bulk_write_memory(struct target *target, target_addr_t address,
uint32_t count, const uint8_t *buffer);

int arm7_9_run_algorithm(struct target *target, int num_mem_params,


+ 5
- 5
src/target/arm920t.c View File

@@ -553,7 +553,7 @@ static int arm920_mmu(struct target *target, int *enabled)
}

static int arm920_virt2phys(struct target *target,
uint32_t virt, uint32_t *phys)
target_addr_t virt, target_addr_t *phys)
{
uint32_t cb;
struct arm920t_common *arm920t = target_to_arm920(target);
@@ -568,7 +568,7 @@ static int arm920_virt2phys(struct target *target,
}

/** Reads a buffer, in the specified word size, with current MMU settings. */
int arm920t_read_memory(struct target *target, uint32_t address,
int arm920t_read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
int retval;
@@ -580,7 +580,7 @@ int arm920t_read_memory(struct target *target, uint32_t address,


static int arm920t_read_phys_memory(struct target *target,
uint32_t address, uint32_t size,
target_addr_t address, uint32_t size,
uint32_t count, uint8_t *buffer)
{
struct arm920t_common *arm920t = target_to_arm920(target);
@@ -590,7 +590,7 @@ static int arm920t_read_phys_memory(struct target *target,
}

static int arm920t_write_phys_memory(struct target *target,
uint32_t address, uint32_t size,
target_addr_t address, uint32_t size,
uint32_t count, const uint8_t *buffer)
{
struct arm920t_common *arm920t = target_to_arm920(target);
@@ -600,7 +600,7 @@ static int arm920t_write_phys_memory(struct target *target,
}

/** Writes a buffer, in the specified word size, with current MMU settings. */
int arm920t_write_memory(struct target *target, uint32_t address,
int arm920t_write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
int retval;


+ 2
- 2
src/target/arm920t.h View File

@@ -55,9 +55,9 @@ struct arm920t_tlb_entry {
int arm920t_arch_state(struct target *target);
int arm920t_soft_reset_halt(struct target *target);
int arm920t_read_memory(struct target *target,
uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer);
int arm920t_write_memory(struct target *target,
uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer);
target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer);
int arm920t_post_debug_entry(struct target *target);
void arm920t_pre_restore_context(struct target *target);
int arm920t_get_ttb(struct target *target, uint32_t *result);


+ 5
- 5
src/target/arm926ejs.c View File

@@ -594,7 +594,7 @@ int arm926ejs_soft_reset_halt(struct target *target)
}

/** Writes a buffer, in the specified word size, with current MMU settings. */
int arm926ejs_write_memory(struct target *target, uint32_t address,
int arm926ejs_write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
int retval;
@@ -623,7 +623,7 @@ int arm926ejs_write_memory(struct target *target, uint32_t address,
return retval;
}

uint32_t pa;
target_addr_t pa;
retval = target->type->virt2phys(target, address, &pa);
if (retval != ERROR_OK)
return retval;
@@ -655,7 +655,7 @@ int arm926ejs_write_memory(struct target *target, uint32_t address,
}

static int arm926ejs_write_phys_memory(struct target *target,
uint32_t address, uint32_t size,
target_addr_t address, uint32_t size,
uint32_t count, const uint8_t *buffer)
{
struct arm926ejs_common *arm926ejs = target_to_arm926(target);
@@ -665,7 +665,7 @@ static int arm926ejs_write_phys_memory(struct target *target,
}

static int arm926ejs_read_phys_memory(struct target *target,
uint32_t address, uint32_t size,
target_addr_t address, uint32_t size,
uint32_t count, uint8_t *buffer)
{
struct arm926ejs_common *arm926ejs = target_to_arm926(target);
@@ -736,7 +736,7 @@ COMMAND_HANDLER(arm926ejs_handle_cache_info_command)
return armv4_5_handle_cache_info_command(CMD_CTX, &arm926ejs->armv4_5_mmu.armv4_5_cache);
}

static int arm926ejs_virt2phys(struct target *target, uint32_t virtual, uint32_t *physical)
static int arm926ejs_virt2phys(struct target *target, target_addr_t virtual, target_addr_t *physical)
{
uint32_t cb;
struct arm926ejs_common *arm926ejs = target_to_arm926(target);


+ 1
- 1
src/target/arm926ejs.h View File

@@ -47,7 +47,7 @@ int arm926ejs_init_arch_info(struct target *target,
struct arm926ejs_common *arm926ejs, struct jtag_tap *tap);
int arm926ejs_arch_state(struct target *target);
int arm926ejs_write_memory(struct target *target,
uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer);
target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer);
int arm926ejs_soft_reset_halt(struct target *target);

extern const struct command_registration arm926ejs_command_handlers[];


+ 2
- 2
src/target/arm946e.c View File

@@ -487,7 +487,7 @@ uint32_t arm946e_invalidate_icache(struct target *target, uint32_t address,
}

/** Writes a buffer, in the specified word size, with current MMU settings. */
int arm946e_write_memory(struct target *target, uint32_t address,
int arm946e_write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
int retval;
@@ -535,7 +535,7 @@ int arm946e_write_memory(struct target *target, uint32_t address,

}

int arm946e_read_memory(struct target *target, uint32_t address,
int arm946e_read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
int retval;


+ 8
- 8
src/target/armv4_5.c View File

@@ -816,7 +816,7 @@ COMMAND_HANDLER(handle_arm_disassemble_command)
}

struct arm *arm = target_to_arm(target);
uint32_t address;
target_addr_t address;
int count = 1;
int thumb = 0;

@@ -840,7 +840,7 @@ COMMAND_HANDLER(handle_arm_disassemble_command)
COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], count);
/* FALL THROUGH */
case 1:
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
COMMAND_PARSE_ADDRESS(CMD_ARGV[0], address);
if (address & 0x01) {
if (!thumb) {
command_print(CMD_CTX, "Disassemble as Thumb");
@@ -1434,8 +1434,8 @@ int armv4_5_run_algorithm(struct target *target,
struct mem_param *mem_params,
int num_reg_params,
struct reg_param *reg_params,
uint32_t entry_point,
uint32_t exit_point,
target_addr_t entry_point,
target_addr_t exit_point,
int timeout_ms,
void *arch_info)
{
@@ -1444,8 +1444,8 @@ int armv4_5_run_algorithm(struct target *target,
mem_params,
num_reg_params,
reg_params,
entry_point,
exit_point,
(uint32_t)entry_point,
(uint32_t)exit_point,
timeout_ms,
arch_info,
armv4_5_run_algorithm_completion);
@@ -1456,7 +1456,7 @@ int armv4_5_run_algorithm(struct target *target,
*
*/
int arm_checksum_memory(struct target *target,
uint32_t address, uint32_t count, uint32_t *checksum)
target_addr_t address, uint32_t count, uint32_t *checksum)
{
struct working_area *crc_algorithm;
struct arm_algorithm arm_algo;
@@ -1529,7 +1529,7 @@ cleanup:
*
*/
int arm_blank_check_memory(struct target *target,
uint32_t address, uint32_t count, uint32_t *blank, uint8_t erased_value)
target_addr_t address, uint32_t count, uint32_t *blank, uint8_t erased_value)
{
struct working_area *check_algorithm;
struct reg_param reg_params[3];


+ 3
- 2
src/target/armv4_5_mmu.h View File

@@ -25,8 +25,9 @@ struct target;

struct armv4_5_mmu_common {
int (*get_ttb)(struct target *target, uint32_t *result);
int (*read_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
int (*write_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer);
int (*read_memory)(struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer);
int (*write_memory)(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer);
int (*disable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache);
int (*enable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache);
struct armv4_5_cache_common armv4_5_cache;


+ 1
- 1
src/target/armv7a.h View File

@@ -90,7 +90,7 @@ struct armv7a_mmu_common {
uint32_t ttbr_mask[2];
uint32_t ttbr_range[2];

int (*read_physical_memory)(struct target *target, uint32_t address, uint32_t size,
int (*read_physical_memory)(struct target *target, target_addr_t address, uint32_t size,
uint32_t count, uint8_t *buffer);
struct armv7a_cache_common armv7a_cache;
uint32_t mmu_enabled;


+ 23
- 23
src/target/armv7a_cache_l2x.c View File

@@ -63,12 +63,12 @@ int arm7a_l2x_flush_all_data(struct target *target)

l2_way_val = (1 << l2x_cache->way) - 1;

return target_write_phys_memory(target,
return target_write_phys_u32(target,
l2x_cache->base + L2X0_CLEAN_INV_WAY,
4, 1, (uint8_t *)&l2_way_val);
l2_way_val);
}

int armv7a_l2x_cache_flush_virt(struct target *target, uint32_t virt,
int armv7a_l2x_cache_flush_virt(struct target *target, target_addr_t virt,
uint32_t size)
{
struct armv7a_common *armv7a = target_to_armv7a(target);
@@ -83,16 +83,15 @@ int armv7a_l2x_cache_flush_virt(struct target *target, uint32_t virt,
return retval;

for (i = 0; i < size; i += linelen) {
uint32_t pa, offs = virt + i;
target_addr_t pa, offs = virt + i;

/* FIXME: use less verbose virt2phys? */
retval = target->type->virt2phys(target, offs, &pa);
if (retval != ERROR_OK)
goto done;

retval = target_write_phys_memory(target,
l2x_cache->base + L2X0_CLEAN_INV_LINE_PA,
4, 1, (uint8_t *)&pa);
retval = target_write_phys_u32(target,
l2x_cache->base + L2X0_CLEAN_INV_LINE_PA, pa);
if (retval != ERROR_OK)
goto done;
}
@@ -104,7 +103,7 @@ done:
return retval;
}

static int armv7a_l2x_cache_inval_virt(struct target *target, uint32_t virt,
static int armv7a_l2x_cache_inval_virt(struct target *target, target_addr_t virt,
uint32_t size)
{
struct armv7a_common *armv7a = target_to_armv7a(target);
@@ -119,16 +118,15 @@ static int armv7a_l2x_cache_inval_virt(struct target *target, uint32_t virt,
return retval;

for (i = 0; i < size; i += linelen) {
uint32_t pa, offs = virt + i;
target_addr_t pa, offs = virt + i;

/* FIXME: use less verbose virt2phys? */
retval = target->type->virt2phys(target, offs, &pa);
if (retval != ERROR_OK)
goto done;

retval = target_write_phys_memory(target,
l2x_cache->base + L2X0_INV_LINE_PA,
4, 1, (uint8_t *)&pa);
retval = target_write_phys_u32(target,
l2x_cache->base + L2X0_INV_LINE_PA, pa);
if (retval != ERROR_OK)
goto done;
}
@@ -140,7 +138,7 @@ done:
return retval;
}

static int armv7a_l2x_cache_clean_virt(struct target *target, uint32_t virt,
static int armv7a_l2x_cache_clean_virt(struct target *target, target_addr_t virt,
unsigned int size)
{
struct armv7a_common *armv7a = target_to_armv7a(target);
@@ -155,16 +153,15 @@ static int armv7a_l2x_cache_clean_virt(struct target *target, uint32_t virt,
return retval;

for (i = 0; i < size; i += linelen) {
uint32_t pa, offs = virt + i;
target_addr_t pa, offs = virt + i;

/* FIXME: use less verbose virt2phys? */
retval = target->type->virt2phys(target, offs, &pa);
if (retval != ERROR_OK)
goto done;

retval = target_write_phys_memory(target,
l2x_cache->base + L2X0_CLEAN_LINE_PA,
4, 1, (uint8_t *)&pa);
retval = target_write_phys_u32(target,
l2x_cache->base + L2X0_CLEAN_LINE_PA, pa);
if (retval != ERROR_OK)
goto done;
}
@@ -252,7 +249,8 @@ COMMAND_HANDLER(arm7a_l2x_cache_flush_all_command)
COMMAND_HANDLER(arm7a_l2x_cache_flush_virt_cmd)
{
struct target *target = get_current_target(CMD_CTX);
uint32_t virt, size;
target_addr_t virt;
uint32_t size;

if (CMD_ARGC == 0 || CMD_ARGC > 2)
return ERROR_COMMAND_SYNTAX_ERROR;
@@ -262,7 +260,7 @@ COMMAND_HANDLER(arm7a_l2x_cache_flush_virt_cmd)
else
size = 1;

COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], virt);
COMMAND_PARSE_ADDRESS(CMD_ARGV[0], virt);

return armv7a_l2x_cache_flush_virt(target, virt, size);
}
@@ -270,7 +268,8 @@ COMMAND_HANDLER(arm7a_l2x_cache_flush_virt_cmd)
COMMAND_HANDLER(arm7a_l2x_cache_inval_virt_cmd)
{
struct target *target = get_current_target(CMD_CTX);
uint32_t virt, size;
target_addr_t virt;
uint32_t size;

if (CMD_ARGC == 0 || CMD_ARGC > 2)
return ERROR_COMMAND_SYNTAX_ERROR;
@@ -280,7 +279,7 @@ COMMAND_HANDLER(arm7a_l2x_cache_inval_virt_cmd)
else
size = 1;

COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], virt);
COMMAND_PARSE_ADDRESS(CMD_ARGV[0], virt);

return armv7a_l2x_cache_inval_virt(target, virt, size);
}
@@ -288,7 +287,8 @@ COMMAND_HANDLER(arm7a_l2x_cache_inval_virt_cmd)
COMMAND_HANDLER(arm7a_l2x_cache_clean_virt_cmd)
{
struct target *target = get_current_target(CMD_CTX);
uint32_t virt, size;
target_addr_t virt;
uint32_t size;

if (CMD_ARGC == 0 || CMD_ARGC > 2)
return ERROR_COMMAND_SYNTAX_ERROR;
@@ -298,7 +298,7 @@ COMMAND_HANDLER(arm7a_l2x_cache_clean_virt_cmd)
else
size = 1;

COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], virt);
COMMAND_PARSE_ADDRESS(CMD_ARGV[0], virt);

return armv7a_l2x_cache_clean_virt(target, virt, size);
}


+ 1
- 1
src/target/armv7a_cache_l2x.h View File

@@ -151,7 +151,7 @@ struct l2c_init_data {

extern const struct command_registration arm7a_l2x_cache_command_handler[];

int armv7a_l2x_cache_flush_virt(struct target *target, uint32_t virt,
int armv7a_l2x_cache_flush_virt(struct target *target, target_addr_t virt,
uint32_t size);
int arm7a_l2x_flush_all_data(struct target *target);



+ 6
- 6
src/target/armv7m.c View File

@@ -318,7 +318,7 @@ int armv7m_get_gdb_reg_list(struct target *target, struct reg **reg_list[],
int armv7m_run_algorithm(struct target *target,
int num_mem_params, struct mem_param *mem_params,
int num_reg_params, struct reg_param *reg_params,
uint32_t entry_point, uint32_t exit_point,
target_addr_t entry_point, target_addr_t exit_point,
int timeout_ms, void *arch_info)
{
int retval;
@@ -343,7 +343,7 @@ int armv7m_run_algorithm(struct target *target,
int armv7m_start_algorithm(struct target *target,
int num_mem_params, struct mem_param *mem_params,
int num_reg_params, struct reg_param *reg_params,
uint32_t entry_point, uint32_t exit_point,
target_addr_t entry_point, target_addr_t exit_point,
void *arch_info)
{
struct armv7m_common *armv7m = target_to_armv7m(target);
@@ -431,7 +431,7 @@ int armv7m_start_algorithm(struct target *target,
int armv7m_wait_algorithm(struct target *target,
int num_mem_params, struct mem_param *mem_params,
int num_reg_params, struct reg_param *reg_params,
uint32_t exit_point, int timeout_ms,
target_addr_t exit_point, int timeout_ms,
void *arch_info)
{
struct armv7m_common *armv7m = target_to_armv7m(target);
@@ -461,7 +461,7 @@ int armv7m_wait_algorithm(struct target *target,

armv7m->load_core_reg_u32(target, 15, &pc);
if (exit_point && (pc != exit_point)) {
LOG_DEBUG("failed algorithm halted at 0x%" PRIx32 ", expected 0x%" PRIx32,
LOG_DEBUG("failed algorithm halted at 0x%" PRIx32 ", expected 0x%" TARGET_PRIxADDR,
pc,
exit_point);
return ERROR_TARGET_TIMEOUT;
@@ -682,7 +682,7 @@ int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m)

/** Generates a CRC32 checksum of a memory region. */
int armv7m_checksum_memory(struct target *target,
uint32_t address, uint32_t count, uint32_t *checksum)
target_addr_t address, uint32_t count, uint32_t *checksum)
{
struct working_area *crc_algorithm;
struct armv7m_algorithm armv7m_info;
@@ -733,7 +733,7 @@ cleanup:

/** Checks whether a memory region is erased. */
int armv7m_blank_check_memory(struct target *target,
uint32_t address, uint32_t count, uint32_t *blank, uint8_t erased_value)
target_addr_t address, uint32_t count, uint32_t *blank, uint8_t erased_value)
{
struct working_area *erase_check_algorithm;
struct reg_param reg_params[3];


+ 5
- 5
src/target/armv7m.h View File

@@ -203,19 +203,19 @@ int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m);
int armv7m_run_algorithm(struct target *target,
int num_mem_params, struct mem_param *mem_params,
int num_reg_params, struct reg_param *reg_params,
uint32_t entry_point, uint32_t exit_point,
target_addr_t entry_point, target_addr_t exit_point,
int timeout_ms, void *arch_info);

int armv7m_start_algorithm(struct target *target,
int num_mem_params, struct mem_param *mem_params,
int num_reg_params, struct reg_param *reg_params,
uint32_t entry_point, uint32_t exit_point,
target_addr_t entry_point, target_addr_t exit_point,
void *arch_info);

int armv7m_wait_algorithm(struct target *target,
int num_mem_params, struct mem_param *mem_params,
int num_reg_params, struct reg_param *reg_params,
uint32_t exit_point, int timeout_ms,
target_addr_t exit_point, int timeout_ms,
void *arch_info);

int armv7m_invalidate_core_regs(struct target *target);
@@ -223,9 +223,9 @@ int armv7m_invalidate_core_regs(struct target *target);
int armv7m_restore_context(struct target *target);

int armv7m_checksum_memory(struct target *target,
uint32_t address, uint32_t count, uint32_t *checksum);
target_addr_t address, uint32_t count, uint32_t *checksum);
int armv7m_blank_check_memory(struct target *target,
uint32_t address, uint32_t count, uint32_t *blank, uint8_t erased_value);
target_addr_t address, uint32_t count, uint32_t *blank, uint8_t erased_value);

int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found);



+ 7
- 7
src/target/avr32_ap7k.c View File

@@ -312,7 +312,7 @@ static int avr32_ap7k_deassert_reset(struct target *target)
}

static int avr32_ap7k_resume(struct target *target, int current,
uint32_t address, int handle_breakpoints, int debug_execution)
target_addr_t address, int handle_breakpoints, int debug_execution)
{
struct avr32_ap7k_common *ap7k = target_to_ap7k(target);
struct breakpoint *breakpoint = NULL;
@@ -348,7 +348,7 @@ static int avr32_ap7k_resume(struct target *target, int current,
/* Single step past breakpoint at current address */
breakpoint = breakpoint_find(target, resume_pc);
if (breakpoint) {
LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 "", breakpoint->address);
LOG_DEBUG("unset breakpoint at 0x%8.8" TARGET_PRIxADDR "", breakpoint->address);
#if 0
avr32_ap7k_unset_breakpoint(target, breakpoint);
avr32_ap7k_single_step_core(target);
@@ -394,7 +394,7 @@ static int avr32_ap7k_resume(struct target *target, int current,
}

static int avr32_ap7k_step(struct target *target, int current,
uint32_t address, int handle_breakpoints)
target_addr_t address, int handle_breakpoints)
{
LOG_ERROR("%s: implement me", __func__);

@@ -431,12 +431,12 @@ static int avr32_ap7k_remove_watchpoint(struct target *target,
return ERROR_OK;
}

static int avr32_ap7k_read_memory(struct target *target, uint32_t address,
static int avr32_ap7k_read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
struct avr32_ap7k_common *ap7k = target_to_ap7k(target);

LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
LOG_DEBUG("address: 0x%8.8" TARGET_PRIxADDR ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
address,
size,
count);
@@ -472,12 +472,12 @@ static int avr32_ap7k_read_memory(struct target *target, uint32_t address,
return ERROR_OK;
}

static int avr32_ap7k_write_memory(struct target *target, uint32_t address,
static int avr32_ap7k_write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
struct avr32_ap7k_common *ap7k = target_to_ap7k(target);

LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
LOG_DEBUG("address: 0x%8.8" TARGET_PRIxADDR ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
address,
size,
count);


+ 4
- 4
src/target/avrt.c View File

@@ -33,9 +33,9 @@ static int avr_init_target(struct command_context *cmd_ctx, struct target *targe
static int avr_arch_state(struct target *target);
static int avr_poll(struct target *target);
static int avr_halt(struct target *target);
static int avr_resume(struct target *target, int current, uint32_t address,
static int avr_resume(struct target *target, int current, target_addr_t address,
int handle_breakpoints, int debug_execution);
static int avr_step(struct target *target, int current, uint32_t address,
static int avr_step(struct target *target, int current, target_addr_t address,
int handle_breakpoints);

static int avr_assert_reset(struct target *target);
@@ -116,14 +116,14 @@ static int avr_halt(struct target *target)
return ERROR_OK;
}

static int avr_resume(struct target *target, int current, uint32_t address,
static int avr_resume(struct target *target, int current, target_addr_t address,
int handle_breakpoints, int debug_execution)
{
LOG_DEBUG("%s", __func__);
return ERROR_OK;
}

static int avr_step(struct target *target, int current, uint32_t address, int handle_breakpoints)
static int avr_step(struct target *target, int current, target_addr_t address, int handle_breakpoints)
{
LOG_DEBUG("%s", __func__);
return ERROR_OK;


+ 22
- 21
src/target/breakpoints.c View File

@@ -42,7 +42,7 @@ static const char * const watchpoint_rw_strings[] = {
static int bpwp_unique_id;

int breakpoint_add_internal(struct target *target,
uint32_t address,
target_addr_t address,
uint32_t length,
enum breakpoint_type type)
{
@@ -60,7 +60,7 @@ int breakpoint_add_internal(struct target *target,
* breakpoint" ... check all the parameters before
* succeeding.
*/
LOG_DEBUG("Duplicate Breakpoint address: 0x%08" PRIx32 " (BP %" PRIu32 ")",
LOG_DEBUG("Duplicate Breakpoint address: " TARGET_ADDR_FMT " (BP %" PRIu32 ")",
address, breakpoint->unique_id);
return ERROR_OK;
}
@@ -98,7 +98,7 @@ fail:
return retval;
}

LOG_DEBUG("added %s breakpoint at 0x%8.8" PRIx32 " of length 0x%8.8x, (BPID: %" PRIu32 ")",
LOG_DEBUG("added %s breakpoint at " TARGET_ADDR_FMT " of length 0x%8.8x, (BPID: %" PRIu32 ")",
breakpoint_type_strings[(*breakpoint_p)->type],
(*breakpoint_p)->address, (*breakpoint_p)->length,
(*breakpoint_p)->unique_id);
@@ -159,7 +159,7 @@ int context_breakpoint_add_internal(struct target *target,
}

int hybrid_breakpoint_add_internal(struct target *target,
uint32_t address,
target_addr_t address,
uint32_t asid,
uint32_t length,
enum breakpoint_type type)
@@ -180,7 +180,7 @@ int hybrid_breakpoint_add_internal(struct target *target,
asid, breakpoint->unique_id);
return -1;
} else if ((breakpoint->address == address) && (breakpoint->asid == 0)) {
LOG_DEBUG("Duplicate Breakpoint IVA: 0x%08" PRIx32 " (BP %" PRIu32 ")",
LOG_DEBUG("Duplicate Breakpoint IVA: " TARGET_ADDR_FMT " (BP %" PRIu32 ")",
address, breakpoint->unique_id);
return -1;

@@ -208,7 +208,7 @@ int hybrid_breakpoint_add_internal(struct target *target,
return retval;
}
LOG_DEBUG(
"added %s Hybrid breakpoint at address 0x%8.8" PRIx32 " of length 0x%8.8x, (BPID: %" PRIu32 ")",
"added %s Hybrid breakpoint at address " TARGET_ADDR_FMT " of length 0x%8.8x, (BPID: %" PRIu32 ")",
breakpoint_type_strings[(*breakpoint_p)->type],
(*breakpoint_p)->address,
(*breakpoint_p)->length,
@@ -218,7 +218,7 @@ int hybrid_breakpoint_add_internal(struct target *target,
}

int breakpoint_add(struct target *target,
uint32_t address,
target_addr_t address,
uint32_t length,
enum breakpoint_type type)
{
@@ -263,7 +263,7 @@ int context_breakpoint_add(struct target *target,
return context_breakpoint_add_internal(target, asid, length, type);
}
int hybrid_breakpoint_add(struct target *target,
uint32_t address,
target_addr_t address,
uint32_t asid,
uint32_t length,
enum breakpoint_type type)
@@ -310,7 +310,7 @@ static void breakpoint_free(struct target *target, struct breakpoint *breakpoint
free(breakpoint);
}

int breakpoint_remove_internal(struct target *target, uint32_t address)
int breakpoint_remove_internal(struct target *target, target_addr_t address)
{
struct breakpoint *breakpoint = target->breakpoints;

@@ -329,11 +329,11 @@ int breakpoint_remove_internal(struct target *target, uint32_t address)
return 1;
} else {
if (!target->smp)
LOG_ERROR("no breakpoint at address 0x%8.8" PRIx32 " found", address);
LOG_ERROR("no breakpoint at address " TARGET_ADDR_FMT " found", address);
return 0;
}
}
void breakpoint_remove(struct target *target, uint32_t address)
void breakpoint_remove(struct target *target, target_addr_t address)
{
int found = 0;
if (target->smp) {
@@ -346,7 +346,7 @@ void breakpoint_remove(struct target *target, uint32_t address)
head = head->next;
}
if (found == 0)
LOG_ERROR("no breakpoint at address 0x%8.8" PRIx32 " found", address);
LOG_ERROR("no breakpoint at address " TARGET_ADDR_FMT " found", address);
} else
breakpoint_remove_internal(target, address);
}
@@ -375,7 +375,7 @@ void breakpoint_clear_target(struct target *target)

}

struct breakpoint *breakpoint_find(struct target *target, uint32_t address)
struct breakpoint *breakpoint_find(struct target *target, target_addr_t address)
{
struct breakpoint *breakpoint = target->breakpoints;

@@ -388,7 +388,7 @@ struct breakpoint *breakpoint_find(struct target *target, uint32_t address)
return NULL;
}

int watchpoint_add(struct target *target, uint32_t address, uint32_t length,
int watchpoint_add(struct target *target, target_addr_t address, uint32_t length,
enum watchpoint_rw rw, uint32_t value, uint32_t mask)
{
struct watchpoint *watchpoint = target->watchpoints;
@@ -402,7 +402,7 @@ int watchpoint_add(struct target *target, uint32_t address, uint32_t length,
|| watchpoint->value != value
|| watchpoint->mask != mask
|| watchpoint->rw != rw) {
LOG_ERROR("address 0x%8.8" PRIx32
LOG_ERROR("address " TARGET_ADDR_FMT
" already has watchpoint %d",
address, watchpoint->unique_id);
return ERROR_FAIL;
@@ -436,7 +436,7 @@ int watchpoint_add(struct target *target, uint32_t address, uint32_t length,
default:
reason = "unrecognized error";
bye:
LOG_ERROR("can't add %s watchpoint at 0x%8.8" PRIx32 ", %s",
LOG_ERROR("can't add %s watchpoint at " TARGET_ADDR_FMT ", %s",
watchpoint_rw_strings[(*watchpoint_p)->rw],
address, reason);
free(*watchpoint_p);
@@ -444,7 +444,7 @@ bye:
return retval;
}

LOG_DEBUG("added %s watchpoint at 0x%8.8" PRIx32
LOG_DEBUG("added %s watchpoint at " TARGET_ADDR_FMT
" of length 0x%8.8" PRIx32 " (WPID: %d)",
watchpoint_rw_strings[(*watchpoint_p)->rw],
(*watchpoint_p)->address,
@@ -475,7 +475,7 @@ static void watchpoint_free(struct target *target, struct watchpoint *watchpoint
free(watchpoint);
}

void watchpoint_remove(struct target *target, uint32_t address)
void watchpoint_remove(struct target *target, target_addr_t address)
{
struct watchpoint *watchpoint = target->watchpoints;

@@ -488,7 +488,7 @@ void watchpoint_remove(struct target *target, uint32_t address)
if (watchpoint)
watchpoint_free(target, watchpoint);
else
LOG_ERROR("no watchpoint at address 0x%8.8" PRIx32 " found", address);
LOG_ERROR("no watchpoint at address " TARGET_ADDR_FMT " found", address);
}

void watchpoint_clear_target(struct target *target)
@@ -499,7 +499,8 @@ void watchpoint_clear_target(struct target *target)
watchpoint_free(target, target->watchpoints);
}

int watchpoint_hit(struct target *target, enum watchpoint_rw *rw, uint32_t *address)
int watchpoint_hit(struct target *target, enum watchpoint_rw *rw,
target_addr_t *address)
{
int retval;
struct watchpoint *hit_watchpoint;
@@ -511,7 +512,7 @@ int watchpoint_hit(struct target *target, enum watchpoint_rw *rw, uint32_t *addr
*rw = hit_watchpoint->rw;
*address = hit_watchpoint->address;

LOG_DEBUG("Found hit watchpoint at 0x%8.8" PRIx32 " (WPID: %d)",
LOG_DEBUG("Found hit watchpoint at " TARGET_ADDR_FMT " (WPID: %d)",
hit_watchpoint->address,
hit_watchpoint->unique_id);



+ 10
- 9
src/target/breakpoints.h View File

@@ -33,7 +33,7 @@ enum watchpoint_rw {
};

struct breakpoint {
uint32_t address;
target_addr_t address;
uint32_t asid;
int length;
enum breakpoint_type type;
@@ -45,7 +45,7 @@ struct breakpoint {
};

struct watchpoint {
uint32_t address;
target_addr_t address;
uint32_t length;
uint32_t mask;
uint32_t value;
@@ -57,22 +57,23 @@ struct watchpoint {

void breakpoint_clear_target(struct target *target);
int breakpoint_add(struct target *target,
uint32_t address, uint32_t length, enum breakpoint_type type);
target_addr_t address, uint32_t length, enum breakpoint_type type);
int context_breakpoint_add(struct target *target,
uint32_t asid, uint32_t length, enum breakpoint_type type);
int hybrid_breakpoint_add(struct target *target,
uint32_t address, uint32_t asid, uint32_t length, enum breakpoint_type type);
void breakpoint_remove(struct target *target, uint32_t address);
target_addr_t address, uint32_t asid, uint32_t length, enum breakpoint_type type);
void breakpoint_remove(struct target *target, target_addr_t address);

struct breakpoint *breakpoint_find(struct target *target, uint32_t address);
struct breakpoint *breakpoint_find(struct target *target, target_addr_t address);

void watchpoint_clear_target(struct target *target);
int watchpoint_add(struct target *target,
uint32_t address, uint32_t length,
target_addr_t address, uint32_t length,
enum watchpoint_rw rw, uint32_t value, uint32_t mask);
void watchpoint_remove(struct target *target, uint32_t address);
void watchpoint_remove(struct target *target, target_addr_t address);

/* report type and address of just hit watchpoint */
int watchpoint_hit(struct target *target, enum watchpoint_rw *rw, uint32_t *address);
int watchpoint_hit(struct target *target, enum watchpoint_rw *rw,
target_addr_t *address);

#endif /* OPENOCD_TARGET_BREAKPOINTS_H */

+ 35
- 32
src/target/cortex_a.c View File

@@ -75,7 +75,7 @@ static int cortex_a_dap_write_coreregister_u32(struct target *target,
static int cortex_a_mmu(struct target *target, int *enabled);
static int cortex_a_mmu_modify(struct target *target, int enable);
static int cortex_a_virt2phys(struct target *target,
uint32_t virt, uint32_t *phys);
target_addr_t virt, target_addr_t *phys);
static int cortex_a_read_cpu_memory(struct target *target,
uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);

@@ -937,7 +937,7 @@ static int cortex_a_halt(struct target *target)
}

static int cortex_a_internal_restore(struct target *target, int current,
uint32_t *address, int handle_breakpoints, int debug_execution)
target_addr_t *address, int handle_breakpoints, int debug_execution)
{
struct armv7a_common *armv7a = target_to_armv7a(target);
struct arm *arm = &armv7a->arm;
@@ -1092,7 +1092,7 @@ static int cortex_a_restore_smp(struct target *target, int handle_breakpoints)
int retval = 0;
struct target_list *head;
struct target *curr;
uint32_t address;
target_addr_t address;
head = target->head;
while (head != (struct target_list *)NULL) {
curr = head->target;
@@ -1110,7 +1110,7 @@ static int cortex_a_restore_smp(struct target *target, int handle_breakpoints)
}

static int cortex_a_resume(struct target *target, int current,
uint32_t address, int handle_breakpoints, int debug_execution)
target_addr_t address, int handle_breakpoints, int debug_execution)
{
int retval = 0;
/* dummy resume for smp toggle in order to reduce gdb impact */
@@ -1134,11 +1134,11 @@ static int cortex_a_resume(struct target *target, int current,
if (!debug_execution) {
target->state = TARGET_RUNNING;
target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
LOG_DEBUG("target resumed at 0x%" PRIx32, address);
LOG_DEBUG("target resumed at " TARGET_ADDR_FMT, address);
} else {
target->state = TARGET_DEBUG_RUNNING;
target_call_event_callbacks(target, TARGET_EVENT_DEBUG_RESUMED);
LOG_DEBUG("target debug resumed at 0x%" PRIx32, address);
LOG_DEBUG("target debug resumed at " TARGET_ADDR_FMT, address);
}

return ERROR_OK;
@@ -1344,7 +1344,7 @@ int cortex_a_set_dscr_bits(struct target *target, unsigned long bit_mask, unsign
return retval;
}

static int cortex_a_step(struct target *target, int current, uint32_t address,
static int cortex_a_step(struct target *target, int current, target_addr_t address,
int handle_breakpoints)
{
struct cortex_a_common *cortex_a = target_to_cortex_a(target);
@@ -2639,7 +2639,7 @@ out:
*/

static int cortex_a_read_phys_memory(struct target *target,
uint32_t address, uint32_t size,
target_addr_t address, uint32_t size,
uint32_t count, uint8_t *buffer)
{
struct armv7a_common *armv7a = target_to_armv7a(target);
@@ -2650,7 +2650,7 @@ static int cortex_a_read_phys_memory(struct target *target,
if (!count || !buffer)
return ERROR_COMMAND_SYNTAX_ERROR;

LOG_DEBUG("Reading memory at real address 0x%" PRIx32 "; size %" PRId32 "; count %" PRId32,
LOG_DEBUG("Reading memory at real address " TARGET_ADDR_FMT "; size %" PRId32 "; count %" PRId32,
address, size, count);

if (armv7a->memory_ap_available && (apsel == armv7a->memory_ap->ap_num))
@@ -2664,14 +2664,14 @@ static int cortex_a_read_phys_memory(struct target *target,
return retval;
}

static int cortex_a_read_memory(struct target *target, uint32_t address,
static int cortex_a_read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
int retval;

/* cortex_a handles unaligned memory access */
LOG_DEBUG("Reading memory at address 0x%" PRIx32 "; size %" PRId32 "; count %" PRId32, address,
size, count);
LOG_DEBUG("Reading memory at address " TARGET_ADDR_FMT "; size %" PRId32 "; count %" PRId32,
address, size, count);

cortex_a_prep_memaccess(target, 0);
retval = cortex_a_read_cpu_memory(target, address, size, count, buffer);
@@ -2680,11 +2680,11 @@ static int cortex_a_read_memory(struct target *target, uint32_t address,
return retval;
}

static int cortex_a_read_memory_ahb(struct target *target, uint32_t address,
static int cortex_a_read_memory_ahb(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
int mmu_enabled = 0;
uint32_t virt, phys;
target_addr_t virt, phys;
int retval;
struct armv7a_common *armv7a = target_to_armv7a(target);
struct adiv5_dap *swjdp = armv7a->arm.dap;
@@ -2694,8 +2694,8 @@ static int cortex_a_read_memory_ahb(struct target *target, uint32_t address,
return target_read_memory(target, address, size, count, buffer);

/* cortex_a handles unaligned memory access */
LOG_DEBUG("Reading memory at address 0x%" PRIx32 "; size %" PRId32 "; count %" PRId32, address,
size, count);
LOG_DEBUG("Reading memory at address " TARGET_ADDR_FMT "; size %" PRId32 "; count %" PRId32,
address, size, count);

/* determine if MMU was enabled on target stop */
if (!armv7a->is_armv7r) {
@@ -2710,7 +2710,8 @@ static int cortex_a_read_memory_ahb(struct target *target, uint32_t address,
if (retval != ERROR_OK)
return retval;

LOG_DEBUG("Reading at virtual address. Translating v:0x%" PRIx32 " to r:0x%" PRIx32,
LOG_DEBUG("Reading at virtual address. "
"Translating v:" TARGET_ADDR_FMT " to r:" TARGET_ADDR_FMT,
virt, phys);
address = phys;
}
@@ -2724,7 +2725,7 @@ static int cortex_a_read_memory_ahb(struct target *target, uint32_t address,
}

static int cortex_a_write_phys_memory(struct target *target,
uint32_t address, uint32_t size,
target_addr_t address, uint32_t size,
uint32_t count, const uint8_t *buffer)
{
struct armv7a_common *armv7a = target_to_armv7a(target);
@@ -2735,8 +2736,8 @@ static int cortex_a_write_phys_memory(struct target *target,
if (!count || !buffer)
return ERROR_COMMAND_SYNTAX_ERROR;

LOG_DEBUG("Writing memory to real address 0x%" PRIx32 "; size %" PRId32 "; count %" PRId32, address,
size, count);
LOG_DEBUG("Writing memory to real address " TARGET_ADDR_FMT "; size %" PRId32 "; count %" PRId32,
address, size, count);

if (armv7a->memory_ap_available && (apsel == armv7a->memory_ap->ap_num))
return mem_ap_write_buf(armv7a->memory_ap, buffer, size, count, address);
@@ -2749,14 +2750,14 @@ static int cortex_a_write_phys_memory(struct target *target,
return retval;
}

static int cortex_a_write_memory(struct target *target, uint32_t address,
static int cortex_a_write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
int retval;

/* cortex_a handles unaligned memory access */
LOG_DEBUG("Writing memory at address 0x%" PRIx32 "; size %" PRId32 "; count %" PRId32, address,
size, count);
LOG_DEBUG("Writing memory at address " TARGET_ADDR_FMT "; size %" PRId32 "; count %" PRId32,
address, size, count);

/* memory writes bypass the caches, must flush before writing */
armv7a_cache_auto_flush_on_write(target, address, size * count);
@@ -2767,11 +2768,11 @@ static int cortex_a_write_memory(struct target *target, uint32_t address,
return retval;
}

static int cortex_a_write_memory_ahb(struct target *target, uint32_t address,
static int cortex_a_write_memory_ahb(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
int mmu_enabled = 0;
uint32_t virt, phys;
target_addr_t virt, phys;
int retval;
struct armv7a_common *armv7a = target_to_armv7a(target);
struct adiv5_dap *swjdp = armv7a->arm.dap;
@@ -2781,8 +2782,8 @@ static int cortex_a_write_memory_ahb(struct target *target, uint32_t address,
return target_write_memory(target, address, size, count, buffer);

/* cortex_a handles unaligned memory access */
LOG_DEBUG("Writing memory at address 0x%" PRIx32 "; size %" PRId32 "; count %" PRId32, address,
size, count);
LOG_DEBUG("Writing memory at address " TARGET_ADDR_FMT "; size %" PRId32 "; count %" PRId32,
address, size, count);

/* determine if MMU was enabled on target stop */
if (!armv7a->is_armv7r) {
@@ -2797,7 +2798,8 @@ static int cortex_a_write_memory_ahb(struct target *target, uint32_t address,
if (retval != ERROR_OK)
return retval;

LOG_DEBUG("Writing to virtual address. Translating v:0x%" PRIx32 " to r:0x%" PRIx32,
LOG_DEBUG("Writing to virtual address. "
"Translating v:" TARGET_ADDR_FMT " to r:" TARGET_ADDR_FMT,
virt,
phys);
address = phys;
@@ -2811,7 +2813,7 @@ static int cortex_a_write_memory_ahb(struct target *target, uint32_t address,
return retval;
}

static int cortex_a_read_buffer(struct target *target, uint32_t address,
static int cortex_a_read_buffer(struct target *target, target_addr_t address,
uint32_t count, uint8_t *buffer)
{
uint32_t size;
@@ -2845,7 +2847,7 @@ static int cortex_a_read_buffer(struct target *target, uint32_t address,
return ERROR_OK;
}

static int cortex_a_write_buffer(struct target *target, uint32_t address,
static int cortex_a_write_buffer(struct target *target, target_addr_t address,
uint32_t count, const uint8_t *buffer)
{
uint32_t size;
@@ -3202,7 +3204,7 @@ static int cortex_a_mmu(struct target *target, int *enabled)
}

static int cortex_a_virt2phys(struct target *target,
uint32_t virt, uint32_t *phys)
target_addr_t virt, target_addr_t *phys)
{
int retval = ERROR_FAIL;
struct armv7a_common *armv7a = target_to_armv7a(target);
@@ -3220,7 +3222,8 @@ static int cortex_a_virt2phys(struct target *target,
retval = cortex_a_mmu_modify(target, 1);
if (retval != ERROR_OK)
goto done;
retval = armv7a_mmu_translate_va_pa(target, virt, phys, 1);
retval = armv7a_mmu_translate_va_pa(target, (uint32_t)virt,
(uint32_t *)phys, 1);
}
done:
return retval;


+ 7
- 7
src/target/cortex_m.c View File

@@ -682,7 +682,7 @@ void cortex_m_enable_breakpoints(struct target *target)
}

static int cortex_m_resume(struct target *target, int current,
uint32_t address, int handle_breakpoints, int debug_execution)
target_addr_t address, int handle_breakpoints, int debug_execution)
{
struct armv7m_common *armv7m = target_to_armv7m(target);
struct breakpoint *breakpoint = NULL;
@@ -750,7 +750,7 @@ static int cortex_m_resume(struct target *target, int current,
/* Single step past breakpoint at current address */
breakpoint = breakpoint_find(target, resume_pc);
if (breakpoint) {
LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 " (ID: %" PRIu32 ")",
LOG_DEBUG("unset breakpoint at " TARGET_ADDR_FMT " (ID: %" PRIu32 ")",
breakpoint->address,
breakpoint->unique_id);
cortex_m_unset_breakpoint(target, breakpoint);
@@ -782,7 +782,7 @@ static int cortex_m_resume(struct target *target, int current,

/* int irqstepcount = 0; */
static int cortex_m_step(struct target *target, int current,
uint32_t address, int handle_breakpoints)
target_addr_t address, int handle_breakpoints)
{
struct cortex_m_common *cortex_m = target_to_cm(target);
struct armv7m_common *armv7m = &cortex_m->armv7m;
@@ -1198,7 +1198,7 @@ int cortex_m_set_breakpoint(struct target *target, struct breakpoint *breakpoint
breakpoint->set = true;
}

LOG_DEBUG("BPID: %" PRIu32 ", Type: %d, Address: 0x%08" PRIx32 " Length: %d (set=%d)",
LOG_DEBUG("BPID: %" PRIu32 ", Type: %d, Address: " TARGET_ADDR_FMT " Length: %d (set=%d)",
breakpoint->unique_id,
(int)(breakpoint->type),
breakpoint->address,
@@ -1219,7 +1219,7 @@ int cortex_m_unset_breakpoint(struct target *target, struct breakpoint *breakpoi
return ERROR_OK;
}

LOG_DEBUG("BPID: %" PRIu32 ", Type: %d, Address: 0x%08" PRIx32 " Length: %d (set=%d)",
LOG_DEBUG("BPID: %" PRIu32 ", Type: %d, Address: " TARGET_ADDR_FMT " Length: %d (set=%d)",
breakpoint->unique_id,
(int)(breakpoint->type),
breakpoint->address,
@@ -1664,7 +1664,7 @@ static int cortex_m_store_core_reg_u32(struct target *target,
return ERROR_OK;
}

static int cortex_m_read_memory(struct target *target, uint32_t address,
static int cortex_m_read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
struct armv7m_common *armv7m = target_to_armv7m(target);
@@ -1678,7 +1678,7 @@ static int cortex_m_read_memory(struct target *target, uint32_t address,
return mem_ap_read_buf(armv7m->debug_ap, buffer, size, count, address);
}

static int cortex_m_write_memory(struct target *target, uint32_t address,
static int cortex_m_write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
struct armv7m_common *armv7m = target_to_armv7m(target);


+ 11
- 11
src/target/dsp563xx.c View File

@@ -1117,7 +1117,7 @@ static int dsp563xx_halt(struct target *target)

static int dsp563xx_resume(struct target *target,
int current,
uint32_t address,
target_addr_t address,
int handle_breakpoints,
int debug_execution)
{
@@ -1290,7 +1290,7 @@ static int dsp563xx_step_ex(struct target *target,

static int dsp563xx_step(struct target *target,
int current,
uint32_t address,
target_addr_t address,
int handle_breakpoints)
{
int err;
@@ -1374,7 +1374,7 @@ static int dsp563xx_deassert_reset(struct target *target)
static int dsp563xx_run_algorithm(struct target *target,
int num_mem_params, struct mem_param *mem_params,
int num_reg_params, struct reg_param *reg_params,
uint32_t entry_point, uint32_t exit_point,
target_addr_t entry_point, target_addr_t exit_point,
int timeout_ms, void *arch_info)
{
int i;
@@ -1592,7 +1592,7 @@ static int dsp563xx_read_memory_core(struct target *target,

static int dsp563xx_read_memory(struct target *target,
int mem_type,
uint32_t address,
target_addr_t address,
uint32_t size,
uint32_t count,
uint8_t *buffer)
@@ -1660,7 +1660,7 @@ static int dsp563xx_read_memory(struct target *target,
}

static int dsp563xx_read_memory_default(struct target *target,
uint32_t address,
target_addr_t address,
uint32_t size,
uint32_t count,
uint8_t *buffer)
@@ -1671,7 +1671,7 @@ static int dsp563xx_read_memory_default(struct target *target,
}

static int dsp563xx_read_buffer_default(struct target *target,
uint32_t address,
target_addr_t address,
uint32_t size,
uint8_t *buffer)
{
@@ -1682,7 +1682,7 @@ static int dsp563xx_read_buffer_default(struct target *target,

static int dsp563xx_write_memory_core(struct target *target,
int mem_type,
uint32_t address,
target_addr_t address,
uint32_t size,
uint32_t count,
const uint8_t *buffer)
@@ -1694,7 +1694,7 @@ static int dsp563xx_write_memory_core(struct target *target,
const uint8_t *b;

LOG_DEBUG(
"memtype: %d address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
"memtype: %d address: 0x%8.8" TARGET_PRIxADDR ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
mem_type,
address,
size,
@@ -1766,7 +1766,7 @@ static int dsp563xx_write_memory_core(struct target *target,

static int dsp563xx_write_memory(struct target *target,
int mem_type,
uint32_t address,
target_addr_t address,
uint32_t size,
uint32_t count,
const uint8_t *buffer)
@@ -1834,7 +1834,7 @@ static int dsp563xx_write_memory(struct target *target,
}

static int dsp563xx_write_memory_default(struct target *target,
uint32_t address,
target_addr_t address,
uint32_t size,
uint32_t count,
const uint8_t *buffer)
@@ -1844,7 +1844,7 @@ static int dsp563xx_write_memory_default(struct target *target,
}

static int dsp563xx_write_buffer_default(struct target *target,
uint32_t address,
target_addr_t address,
uint32_t size,
const uint8_t *buffer)
{


+ 7
- 7
src/target/dsp5680xx.c View File

@@ -1011,7 +1011,7 @@ static int dsp5680xx_poll(struct target *target)
}

static int dsp5680xx_resume(struct target *target, int current,
uint32_t address, int hb, int d)
target_addr_t address, int hb, int d)
{
if (target->state == TARGET_RUNNING) {
LOG_USER("Target already running.");
@@ -1168,7 +1168,7 @@ static int dsp5680xx_read_32_single(struct target *t, uint32_t a,
return retval;
}

static int dsp5680xx_read(struct target *t, uint32_t a, uint32_t size,
static int dsp5680xx_read(struct target *t, target_addr_t a, uint32_t size,
uint32_t count, uint8_t *buf)
{
struct target *target = t;
@@ -1423,7 +1423,7 @@ static int dsp5680xx_write_32(struct target *t, uint32_t a, uint32_t c,
*
* @return
*/
static int dsp5680xx_write(struct target *t, uint32_t a, uint32_t s, uint32_t c,
static int dsp5680xx_write(struct target *t, target_addr_t a, uint32_t s, uint32_t c,
const uint8_t *b)
{
/* TODO Cannot write 32bit to odd address, will write 0x12345678 as 0x5678 0x0012 */
@@ -1468,7 +1468,7 @@ static int dsp5680xx_write(struct target *t, uint32_t a, uint32_t s, uint32_t c,
return retval;
}

static int dsp5680xx_write_buffer(struct target *t, uint32_t a, uint32_t size,
static int dsp5680xx_write_buffer(struct target *t, target_addr_t a, uint32_t size,
const uint8_t *b)
{
check_halt_and_debug(t);
@@ -1485,7 +1485,7 @@ static int dsp5680xx_write_buffer(struct target *t, uint32_t a, uint32_t size,
*
* @return
*/
static int dsp5680xx_read_buffer(struct target *t, uint32_t a, uint32_t size,
static int dsp5680xx_read_buffer(struct target *t, target_addr_t a, uint32_t size,
uint8_t *buf)
{
check_halt_and_debug(t);
@@ -1505,7 +1505,7 @@ static int dsp5680xx_read_buffer(struct target *t, uint32_t a, uint32_t size,
*
* @return
*/
static int dsp5680xx_checksum_memory(struct target *t, uint32_t a, uint32_t s,
static int dsp5680xx_checksum_memory(struct target *t, target_addr_t a, uint32_t s,
uint32_t *checksum)
{
return ERROR_FAIL;
@@ -2262,7 +2262,7 @@ int dsp5680xx_f_lock(struct target *target)
return retval;
}

static int dsp5680xx_step(struct target *target, int current, uint32_t address,
static int dsp5680xx_step(struct target *target, int current, target_addr_t address,
int handle_breakpoints)
{
err_check(ERROR_FAIL, DSP5680XX_ERROR_NOT_IMPLEMENTED_STEP,


+ 2
- 2
src/target/feroceon.c View File

@@ -460,7 +460,7 @@ static int feroceon_examine_debug_reason(struct target *target)
}

static int feroceon_bulk_write_memory(struct target *target,
uint32_t address, uint32_t count, const uint8_t *buffer)
target_addr_t address, uint32_t count, const uint8_t *buffer)
{
int retval;
struct arm *arm = target->arch_info;
@@ -565,7 +565,7 @@ static int feroceon_bulk_write_memory(struct target *target,
buf_get_u32(arm->core_cache->reg_list[0].value, 0, 32);
if (endaddress != address + count*4) {
LOG_ERROR("DCC write failed,"
" expected end address 0x%08" PRIx32
" expected end address 0x%08" TARGET_PRIxADDR
" got 0x%0" PRIx32 "",
address + count*4, endaddress);
retval = ERROR_FAIL;


+ 11
- 9
src/target/hla_target.c View File

@@ -584,7 +584,7 @@ static int adapter_halt(struct target *target)
}

static int adapter_resume(struct target *target, int current,
uint32_t address, int handle_breakpoints,
target_addr_t address, int handle_breakpoints,
int debug_execution)
{
int res;
@@ -594,8 +594,8 @@ static int adapter_resume(struct target *target, int current,
struct breakpoint *breakpoint = NULL;
struct reg *pc;

LOG_DEBUG("%s %d 0x%08" PRIx32 " %d %d", __func__, current, address,
handle_breakpoints, debug_execution);
LOG_DEBUG("%s %d " TARGET_ADDR_FMT " %d %d", __func__, current,
address, handle_breakpoints, debug_execution);

if (target->state != TARGET_HALTED) {
LOG_WARNING("target not halted");
@@ -642,7 +642,7 @@ static int adapter_resume(struct target *target, int current,
/* Single step past breakpoint at current address */
breakpoint = breakpoint_find(target, resume_pc);
if (breakpoint) {
LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 " (ID: %" PRIu32 ")",
LOG_DEBUG("unset breakpoint at " TARGET_ADDR_FMT " (ID: %" PRIu32 ")",
breakpoint->address,
breakpoint->unique_id);
cortex_m_unset_breakpoint(target, breakpoint);
@@ -675,7 +675,7 @@ static int adapter_resume(struct target *target, int current,
}

static int adapter_step(struct target *target, int current,
uint32_t address, int handle_breakpoints)
target_addr_t address, int handle_breakpoints)
{
int res;
struct hl_interface_s *adapter = target_to_adapter(target);
@@ -738,7 +738,7 @@ static int adapter_step(struct target *target, int current,
return ERROR_OK;
}

static int adapter_read_memory(struct target *target, uint32_t address,
static int adapter_read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count,
uint8_t *buffer)
{
@@ -747,12 +747,13 @@ static int adapter_read_memory(struct target *target, uint32_t address,
if (!count || !buffer)
return ERROR_COMMAND_SYNTAX_ERROR;

LOG_DEBUG("%s 0x%08" PRIx32 " %" PRIu32 " %" PRIu32, __func__, address, size, count);
LOG_DEBUG("%s " TARGET_ADDR_FMT " %" PRIu32 " %" PRIu32,
__func__, address, size, count);

return adapter->layout->api->read_mem(adapter->handle, address, size, count, buffer);
}

static int adapter_write_memory(struct target *target, uint32_t address,
static int adapter_write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count,
const uint8_t *buffer)
{
@@ -761,7 +762,8 @@ static int adapter_write_memory(struct target *target, uint32_t address,
if (!count || !buffer)
return ERROR_COMMAND_SYNTAX_ERROR;

LOG_DEBUG("%s 0x%08" PRIx32 " %" PRIu32 " %" PRIu32, __func__, address, size, count);
LOG_DEBUG("%s " TARGET_ADDR_FMT " %" PRIu32 " %" PRIu32,
__func__, address, size, count);

return adapter->layout->api->write_mem(adapter->handle, address, size, count, buffer);
}


+ 1
- 1
src/target/image.h View File

@@ -46,7 +46,7 @@ enum image_type {
};

struct imagesection {
uint32_t base_address;
target_addr_t base_address;
uint32_t size;
int flags;
void *private; /* private data */


+ 2
- 2
src/target/lakemont.c View File

@@ -994,7 +994,7 @@ int lakemont_halt(struct target *t)
}
}

int lakemont_resume(struct target *t, int current, uint32_t address,
int lakemont_resume(struct target *t, int current, target_addr_t address,
int handle_breakpoints, int debug_execution)
{
struct breakpoint *bp = NULL;
@@ -1036,7 +1036,7 @@ int lakemont_resume(struct target *t, int current, uint32_t address,
}

int lakemont_step(struct target *t, int current,
uint32_t address, int handle_breakpoints)
target_addr_t address, int handle_breakpoints)
{
struct x86_32_common *x86_32 = target_to_x86_32(t);
uint32_t eflags = buf_get_u32(x86_32->cache->reg_list[EFLAGS].value, 0, 32);


+ 2
- 2
src/target/lakemont.h View File

@@ -95,10 +95,10 @@ int lakemont_init_arch_info(struct target *t, struct x86_32_common *x86_32);
int lakemont_poll(struct target *t);
int lakemont_arch_state(struct target *t);
int lakemont_halt(struct target *t);
int lakemont_resume(struct target *t, int current, uint32_t address,
int lakemont_resume(struct target *t, int current, target_addr_t address,
int handle_breakpoints, int debug_execution);
int lakemont_step(struct target *t, int current,
uint32_t address, int handle_breakpoints);
target_addr_t address, int handle_breakpoints);
int lakemont_reset_assert(struct target *t);
int lakemont_reset_deassert(struct target *t);
int lakemont_update_after_probemode_entry(struct target *t);


+ 6
- 6
src/target/ls1_sap.c View File

@@ -64,14 +64,14 @@ static int ls1_sap_halt(struct target *target)
return ERROR_OK;
}

static int ls1_sap_resume(struct target *target, int current, uint32_t address,
static int ls1_sap_resume(struct target *target, int current, target_addr_t address,
int handle_breakpoints, int debug_execution)
{
LOG_DEBUG("%s", __func__);
return ERROR_OK;
}

static int ls1_sap_step(struct target *target, int current, uint32_t address,
static int ls1_sap_step(struct target *target, int current, target_addr_t address,
int handle_breakpoints)
{
LOG_DEBUG("%s", __func__);
@@ -178,10 +178,10 @@ static void ls1_sap_memory_write(struct jtag_tap *tap, uint32_t size,
jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
}

static int ls1_sap_read_memory(struct target *target, uint32_t address,
static int ls1_sap_read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
LOG_DEBUG("Reading memory at physical address 0x%" PRIx32
LOG_DEBUG("Reading memory at physical address 0x%" TARGET_PRIxADDR
"; size %" PRId32 "; count %" PRId32, address, size, count);

if (count == 0 || buffer == NULL)
@@ -199,11 +199,11 @@ static int ls1_sap_read_memory(struct target *target, uint32_t address,
return jtag_execute_queue();
}

static int ls1_sap_write_memory(struct target *target, uint32_t address,
static int ls1_sap_write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count,
const uint8_t *buffer)
{
LOG_DEBUG("Writing memory at physical address 0x%" PRIx32
LOG_DEBUG("Writing memory at physical address 0x%" TARGET_PRIxADDR
"; size %" PRId32 "; count %" PRId32, address, size, count);




+ 6
- 6
src/target/mips32.c View File

@@ -391,8 +391,8 @@ int mips32_init_arch_info(struct target *target, struct mips32_common *mips32, s
}

/* run to exit point. return error if exit point was not reached. */
static int mips32_run_and_wait(struct target *target, uint32_t entry_point,
int timeout_ms, uint32_t exit_point, struct mips32_common *mips32)
static int mips32_run_and_wait(struct target *target, target_addr_t entry_point,
int timeout_ms, target_addr_t exit_point, struct mips32_common *mips32)
{
uint32_t pc;
int retval;
@@ -425,8 +425,8 @@ static int mips32_run_and_wait(struct target *target, uint32_t entry_point,

int mips32_run_algorithm(struct target *target, int num_mem_params,
struct mem_param *mem_params, int num_reg_params,
struct reg_param *reg_params, uint32_t entry_point,
uint32_t exit_point, int timeout_ms, void *arch_info)
struct reg_param *reg_params, target_addr_t entry_point,
target_addr_t exit_point, int timeout_ms, void *arch_info)
{
struct mips32_common *mips32 = target_to_mips32(target);
struct mips32_algorithm *mips32_algorithm_info = arch_info;
@@ -696,7 +696,7 @@ int mips32_enable_interrupts(struct target *target, int enable)
return ERROR_OK;
}

int mips32_checksum_memory(struct target *target, uint32_t address,
int mips32_checksum_memory(struct target *target, target_addr_t address,
uint32_t count, uint32_t *checksum)
{
struct working_area *crc_algorithm;
@@ -773,7 +773,7 @@ int mips32_checksum_memory(struct target *target, uint32_t address,

/** Checks whether a memory region is erased. */
int mips32_blank_check_memory(struct target *target,
uint32_t address, uint32_t count, uint32_t *blank, uint8_t erased_value)
target_addr_t address, uint32_t count, uint32_t *blank, uint8_t erased_value)
{
struct working_area *erase_check_algorithm;
struct reg_param reg_params[3];


+ 3
- 3
src/target/mips32.h View File

@@ -232,7 +232,7 @@ struct reg_cache *mips32_build_reg_cache(struct target *target);
int mips32_run_algorithm(struct target *target,
int num_mem_params, struct mem_param *mem_params,
int num_reg_params, struct reg_param *reg_params,
uint32_t entry_point, uint32_t exit_point,
target_addr_t entry_point, target_addr_t exit_point,
int timeout_ms, void *arch_info);

int mips32_configure_break_unit(struct target *target);
@@ -246,9 +246,9 @@ int mips32_register_commands(struct command_context *cmd_ctx);
int mips32_get_gdb_reg_list(struct target *target,
struct reg **reg_list[], int *reg_list_size,
enum target_register_class reg_class);
int mips32_checksum_memory(struct target *target, uint32_t address,
int mips32_checksum_memory(struct target *target, target_addr_t address,
uint32_t count, uint32_t *checksum);
int mips32_blank_check_memory(struct target *target,
uint32_t address, uint32_t count, uint32_t *blank, uint8_t erased_value);
target_addr_t address, uint32_t count, uint32_t *blank, uint8_t erased_value);

#endif /* OPENOCD_TARGET_MIPS32_H */

+ 1
- 1
src/target/mips32_pracc.c View File

@@ -1035,7 +1035,7 @@ int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_are
ejtag_info->fast_access_save = write_t;
}

LOG_DEBUG("%s using 0x%.8" PRIx32 " for write handler", __func__, source->address);
LOG_DEBUG("%s using 0x%.8" TARGET_PRIxADDR " for write handler", __func__, source->address);

jmp_code[0] |= UPPER16(source->address);
jmp_code[1] |= LOWER16(source->address);


+ 16
- 14
src/target/mips_m4k.c View File

@@ -44,7 +44,7 @@ static int mips_m4k_internal_restore(struct target *target, int current,
uint32_t address, int handle_breakpoints,
int debug_execution);
static int mips_m4k_halt(struct target *target);
static int mips_m4k_bulk_write_memory(struct target *target, uint32_t address,
static int mips_m4k_bulk_write_memory(struct target *target, target_addr_t address,
uint32_t count, const uint8_t *buffer);

static int mips_m4k_examine_debug_reason(struct target *target)
@@ -469,7 +469,8 @@ static int mips_m4k_internal_restore(struct target *target, int current,
/* Single step past breakpoint at current address */
breakpoint = breakpoint_find(target, resume_pc);
if (breakpoint) {
LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 "", breakpoint->address);
LOG_DEBUG("unset breakpoint at " TARGET_ADDR_FMT "",
breakpoint->address);
mips_m4k_unset_breakpoint(target, breakpoint);
mips_m4k_single_step_core(target);
mips_m4k_set_breakpoint(target, breakpoint);
@@ -500,7 +501,7 @@ static int mips_m4k_internal_restore(struct target *target, int current,
}

static int mips_m4k_resume(struct target *target, int current,
uint32_t address, int handle_breakpoints, int debug_execution)
target_addr_t address, int handle_breakpoints, int debug_execution)
{
int retval = ERROR_OK;

@@ -527,7 +528,7 @@ static int mips_m4k_resume(struct target *target, int current,
}

static int mips_m4k_step(struct target *target, int current,
uint32_t address, int handle_breakpoints)
target_addr_t address, int handle_breakpoints)
{
/* get pointers to arch-specific information */
struct mips32_common *mips32 = target_to_mips32(target);
@@ -655,7 +656,7 @@ static int mips_m4k_set_breakpoint(struct target *target,
if (retval != ERROR_OK)
return retval;
if (verify != MIPS32_SDBBP) {
LOG_ERROR("Unable to set 32bit breakpoint at address %08" PRIx32
LOG_ERROR("Unable to set 32-bit breakpoint at address " TARGET_ADDR_FMT
" - check that memory is read/writable", breakpoint->address);
return ERROR_OK;
}
@@ -674,7 +675,7 @@ static int mips_m4k_set_breakpoint(struct target *target,
if (retval != ERROR_OK)
return retval;
if (verify != MIPS16_SDBBP) {
LOG_ERROR("Unable to set 16bit breakpoint at address %08" PRIx32
LOG_ERROR("Unable to set 16-bit breakpoint at address " TARGET_ADDR_FMT
" - check that memory is read/writable", breakpoint->address);
return ERROR_OK;
}
@@ -949,13 +950,13 @@ static void mips_m4k_enable_watchpoints(struct target *target)
}
}

static int mips_m4k_read_memory(struct target *target, uint32_t address,
static int mips_m4k_read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
struct mips32_common *mips32 = target_to_mips32(target);
struct mips_ejtag *ejtag_info = &mips32->ejtag_info;

LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
LOG_DEBUG("address: " TARGET_ADDR_FMT ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
address, size, count);

if (target->state != TARGET_HALTED) {
@@ -1008,13 +1009,13 @@ static int mips_m4k_read_memory(struct target *target, uint32_t address,
return retval;
}

static int mips_m4k_write_memory(struct target *target, uint32_t address,
static int mips_m4k_write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
struct mips32_common *mips32 = target_to_mips32(target);
struct mips_ejtag *ejtag_info = &mips32->ejtag_info;

LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
LOG_DEBUG("address: " TARGET_ADDR_FMT ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
address, size, count);

if (target->state != TARGET_HALTED) {
@@ -1139,7 +1140,7 @@ static int mips_m4k_examine(struct target *target)
return ERROR_OK;
}

static int mips_m4k_bulk_write_memory(struct target *target, uint32_t address,
static int mips_m4k_bulk_write_memory(struct target *target, target_addr_t address,
uint32_t count, const uint8_t *buffer)
{
struct mips32_common *mips32 = target_to_mips32(target);
@@ -1148,7 +1149,8 @@ static int mips_m4k_bulk_write_memory(struct target *target, uint32_t address,
int retval;
int write_t = 1;

LOG_DEBUG("address: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, count);
LOG_DEBUG("address: " TARGET_ADDR_FMT ", count: 0x%8.8" PRIx32 "",
address, count);

/* check alignment */
if (address & 0x3u)
@@ -1175,8 +1177,8 @@ static int mips_m4k_bulk_write_memory(struct target *target, uint32_t address,

if (address <= fast_data_area->address + fast_data_area->size &&
fast_data_area->address <= address + count) {
LOG_ERROR("fast_data (0x%8.8" PRIx32 ") is within write area "
"(0x%8.8" PRIx32 "-0x%8.8" PRIx32 ").",
LOG_ERROR("fast_data (" TARGET_ADDR_FMT ") is within write area "
"(" TARGET_ADDR_FMT "-" TARGET_ADDR_FMT ").",
fast_data_area->address, address, address + count);
LOG_ERROR("Change work-area-phys or load_image address!");
return ERROR_FAIL;


+ 10
- 10
src/target/nds32.c View File

@@ -823,7 +823,7 @@ int nds32_read_memory(struct target *target, uint32_t address,
return aice_read_mem_unit(aice, address, size, count, buffer);
}

int nds32_read_phys_memory(struct target *target, uint32_t address,
int nds32_read_phys_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
struct aice_port_s *aice = target_to_aice(target);
@@ -932,7 +932,7 @@ int nds32_write_memory(struct target *target, uint32_t address,
return aice_write_mem_unit(aice, address, size, count, buffer);
}

int nds32_write_phys_memory(struct target *target, uint32_t address,
int nds32_write_phys_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
struct aice_port_s *aice = target_to_aice(target);
@@ -1674,7 +1674,7 @@ int nds32_init_arch_info(struct target *target, struct nds32 *nds32)
return ERROR_OK;
}

int nds32_virtual_to_physical(struct target *target, uint32_t address, uint32_t *physical)
int nds32_virtual_to_physical(struct target *target, target_addr_t address, target_addr_t *physical)
{
struct nds32 *nds32 = target_to_nds32(target);

@@ -1692,7 +1692,7 @@ int nds32_virtual_to_physical(struct target *target, uint32_t address, uint32_t
return ERROR_FAIL;
}

int nds32_cache_sync(struct target *target, uint32_t address, uint32_t length)
int nds32_cache_sync(struct target *target, target_addr_t address, uint32_t length)
{
struct aice_port_s *aice = target_to_aice(target);
struct nds32 *nds32 = target_to_nds32(target);
@@ -1738,7 +1738,7 @@ int nds32_cache_sync(struct target *target, uint32_t address, uint32_t length)
/* Because PSW.IT is turned off under debug exception, address MUST
* be physical address. L1I_VA_INVALIDATE uses PSW.IT to decide
* address translation or not. */
uint32_t physical_addr;
target_addr_t physical_addr;
if (ERROR_FAIL == target->type->virt2phys(target, cur_address,
&physical_addr))
return ERROR_FAIL;
@@ -1764,7 +1764,7 @@ uint32_t nds32_nextpc(struct nds32 *nds32, int current, uint32_t address)
}

int nds32_step(struct target *target, int current,
uint32_t address, int handle_breakpoints)
target_addr_t address, int handle_breakpoints)
{
LOG_DEBUG("target->state: %s",
target_state_name(target));
@@ -1778,7 +1778,7 @@ int nds32_step(struct target *target, int current,

address = nds32_nextpc(nds32, current, address);

LOG_DEBUG("STEP PC %08" PRIx32 "%s", address, !current ? "!" : "");
LOG_DEBUG("STEP PC %08" TARGET_PRIxADDR "%s", address, !current ? "!" : "");

/** set DSSIM */
uint32_t ir14_value;
@@ -2120,9 +2120,9 @@ int nds32_poll(struct target *target)
}

int nds32_resume(struct target *target, int current,
uint32_t address, int handle_breakpoints, int debug_execution)
target_addr_t address, int handle_breakpoints, int debug_execution)
{
LOG_DEBUG("current %d address %08" PRIx32
LOG_DEBUG("current %d address %08" TARGET_PRIxADDR
" handle_breakpoints %d"
" debug_execution %d",
current, address, handle_breakpoints, debug_execution);
@@ -2136,7 +2136,7 @@ int nds32_resume(struct target *target, int current,

address = nds32_nextpc(nds32, current, address);

LOG_DEBUG("RESUME PC %08" PRIx32 "%s", address, !current ? "!" : "");
LOG_DEBUG("RESUME PC %08" TARGET_PRIxADDR "%s", address, !current ? "!" : "");

if (!debug_execution)
target_free_all_working_areas(target);


+ 7
- 7
src/target/nds32.h View File

@@ -400,23 +400,23 @@ extern int nds32_get_mapped_reg(struct nds32 *nds32, unsigned regnum, uint32_t *
extern int nds32_set_mapped_reg(struct nds32 *nds32, unsigned regnum, uint32_t value);

extern int nds32_edm_config(struct nds32 *nds32);
extern int nds32_cache_sync(struct target *target, uint32_t address, uint32_t length);
extern int nds32_cache_sync(struct target *target, target_addr_t address, uint32_t length);
extern int nds32_mmu(struct target *target, int *enabled);
extern int nds32_virtual_to_physical(struct target *target, uint32_t address,
uint32_t *physical);
extern int nds32_read_phys_memory(struct target *target, uint32_t address,
extern int nds32_virtual_to_physical(struct target *target, target_addr_t address,
target_addr_t *physical);
extern int nds32_read_phys_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer);
extern int nds32_write_phys_memory(struct target *target, uint32_t address,
extern int nds32_write_phys_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer);
extern uint32_t nds32_nextpc(struct nds32 *nds32, int current, uint32_t address);
extern int nds32_examine_debug_reason(struct nds32 *nds32);
extern int nds32_step(struct target *target, int current,
uint32_t address, int handle_breakpoints);
target_addr_t address, int handle_breakpoints);
extern int nds32_target_state(struct nds32 *nds32, enum target_state *state);
extern int nds32_halt(struct target *target);
extern int nds32_poll(struct target *target);
extern int nds32_resume(struct target *target, int current,
uint32_t address, int handle_breakpoints, int debug_execution);
target_addr_t address, int handle_breakpoints, int debug_execution);
extern int nds32_assert_reset(struct target *target);
extern int nds32_init(struct nds32 *nds32);
extern int nds32_get_gdb_fileio_info(struct target *target, struct gdb_fileio_info *fileio_info);


+ 2
- 2
src/target/nds32_aice.c View File

@@ -42,8 +42,8 @@ int aice_write_reg_64(struct aice_port_s *aice, uint32_t num, uint64_t val)
return aice->port->api->write_reg_64(aice->coreid, num, val);
}

int aice_read_tlb(struct aice_port_s *aice, uint32_t virtual_address,
uint32_t *physical_address)
int aice_read_tlb(struct aice_port_s *aice, target_addr_t virtual_address,
target_addr_t *physical_address)
{
if (aice->port->api->read_tlb == NULL) {
LOG_WARNING("Not implemented: %s", __func__);


+ 2
- 2
src/target/nds32_aice.h View File

@@ -23,8 +23,8 @@

int aice_read_reg_64(struct aice_port_s *aice, uint32_t num, uint64_t *val);
int aice_write_reg_64(struct aice_port_s *aice, uint32_t num, uint64_t val);
int aice_read_tlb(struct aice_port_s *aice, uint32_t virtual_address,
uint32_t *physical_address);
int aice_read_tlb(struct aice_port_s *aice, target_addr_t virtual_address,
target_addr_t *physical_address);
int aice_cache_ctl(struct aice_port_s *aice, uint32_t subtype, uint32_t address);
int aice_set_retry_times(struct aice_port_s *aice, uint32_t a_retry_times);
int aice_program_edm(struct aice_port_s *aice, char *command_sequence);


+ 4
- 4
src/target/nds32_tlb.c View File

@@ -22,8 +22,8 @@
#include "nds32_aice.h"
#include "nds32_tlb.h"

int nds32_probe_tlb(struct nds32 *nds32, const uint32_t virtual_address,
uint32_t *physical_address)
int nds32_probe_tlb(struct nds32 *nds32, const target_addr_t virtual_address,
target_addr_t *physical_address)
{
struct target *target = nds32->target;
struct aice_port_s *aice = target_to_aice(target);
@@ -38,8 +38,8 @@ struct page_table_walker_info_s page_table_info[PAGE_SIZE_NUM] = {
{0xFF000000, 22, 0x00FFE000, 11, 0x00001FFF, 0xFFFFF000, 0xFFFFE000, 0xFFFFE000},
};

int nds32_walk_page_table(struct nds32 *nds32, const uint32_t virtual_address,
uint32_t *physical_address)
int nds32_walk_page_table(struct nds32 *nds32, const target_addr_t virtual_address,
target_addr_t *physical_address)
{
struct target *target = nds32->target;
uint32_t value_mr1;


+ 4
- 4
src/target/nds32_tlb.h View File

@@ -39,9 +39,9 @@ struct page_table_walker_info_s {
uint32_t ppn_mask;
};

extern int nds32_probe_tlb(struct nds32 *nds32, const uint32_t virtual_address,
uint32_t *physical_address);
extern int nds32_walk_page_table(struct nds32 *nds32, const uint32_t virtual_address,
uint32_t *physical_address);
extern int nds32_probe_tlb(struct nds32 *nds32, const target_addr_t virtual_address,
target_addr_t *physical_address);
extern int nds32_walk_page_table(struct nds32 *nds32, const target_addr_t virtual_address,
target_addr_t *physical_address);

#endif /* OPENOCD_TARGET_NDS32_TLB_H */

+ 13
- 13
src/target/nds32_v2.c View File

@@ -112,7 +112,7 @@ static int nds32_v2_activate_hardware_breakpoint(struct target *target)
/* enable breakpoint (physical address) */
aice_write_debug_reg(aice, NDS_EDM_SR_BPC0 + hbr_index, 0xA);

LOG_DEBUG("Add hardware BP %" PRId32 " at %08" PRIx32, hbr_index,
LOG_DEBUG("Add hardware BP %" PRId32 " at %08" TARGET_PRIxADDR, hbr_index,
bp->address);

hbr_index++;
@@ -139,7 +139,7 @@ static int nds32_v2_deactivate_hardware_breakpoint(struct target *target)
else
return ERROR_FAIL;

LOG_DEBUG("Remove hardware BP %" PRId32 " at %08" PRIx32, hbr_index,
LOG_DEBUG("Remove hardware BP %" PRId32 " at %08" TARGET_PRIxADDR, hbr_index,
bp->address);

hbr_index++;
@@ -184,7 +184,7 @@ static int nds32_v2_activate_hardware_watchpoint(struct target *target)
/* set value */
aice_write_debug_reg(aice, NDS_EDM_SR_BPV0 + wp_num, 0);

LOG_DEBUG("Add hardware watchpoint %" PRId32 " at %08" PRIx32 " mask %08" PRIx32, wp_num,
LOG_DEBUG("Add hardware watchpoint %" PRId32 " at %08" TARGET_PRIxADDR " mask %08" PRIx32, wp_num,
wp->address, wp->mask);

}
@@ -204,7 +204,7 @@ static int nds32_v2_deactivate_hardware_watchpoint(struct target *target)
/* disable watchpoint */
aice_write_debug_reg(aice, NDS_EDM_SR_BPC0 + wp_num, 0x0);

LOG_DEBUG("Remove hardware watchpoint %" PRId32 " at %08" PRIx32 " mask %08" PRIx32,
LOG_DEBUG("Remove hardware watchpoint %" PRId32 " at %08" TARGET_PRIxADDR " mask %08" PRIx32,
wp_num, wp->address, wp->mask);
}

@@ -405,7 +405,7 @@ static int nds32_v2_deassert_reset(struct target *target)
}

static int nds32_v2_checksum_memory(struct target *target,
uint32_t address, uint32_t count, uint32_t *checksum)
target_addr_t address, uint32_t count, uint32_t *checksum)
{
LOG_WARNING("Not implemented: %s", __func__);

@@ -561,8 +561,8 @@ static int nds32_v2_run_algorithm(struct target *target,
struct mem_param *mem_params,
int num_reg_params,
struct reg_param *reg_params,
uint32_t entry_point,
uint32_t exit_point,
target_addr_t entry_point,
target_addr_t exit_point,
int timeout_ms,
void *arch_info)
{
@@ -635,11 +635,11 @@ static int nds32_v2_examine(struct target *target)
return ERROR_OK;
}

static int nds32_v2_translate_address(struct target *target, uint32_t *address)
static int nds32_v2_translate_address(struct target *target, target_addr_t *address)
{
struct nds32 *nds32 = target_to_nds32(target);
struct nds32_memory *memory = &(nds32->memory);
uint32_t physical_address;
target_addr_t physical_address;

/* Following conditions need to do address translation
* 1. BUS mode
@@ -656,7 +656,7 @@ static int nds32_v2_translate_address(struct target *target, uint32_t *address)
return ERROR_OK;
}

static int nds32_v2_read_buffer(struct target *target, uint32_t address,
static int nds32_v2_read_buffer(struct target *target, target_addr_t address,
uint32_t size, uint8_t *buffer)
{
struct nds32 *nds32 = target_to_nds32(target);
@@ -676,7 +676,7 @@ static int nds32_v2_read_buffer(struct target *target, uint32_t address,
return nds32_read_buffer(target, address, size, buffer);
}

static int nds32_v2_write_buffer(struct target *target, uint32_t address,
static int nds32_v2_write_buffer(struct target *target, target_addr_t address,
uint32_t size, const uint8_t *buffer)
{
struct nds32 *nds32 = target_to_nds32(target);
@@ -696,7 +696,7 @@ static int nds32_v2_write_buffer(struct target *target, uint32_t address,
return nds32_write_buffer(target, address, size, buffer);
}

static int nds32_v2_read_memory(struct target *target, uint32_t address,
static int nds32_v2_read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
struct nds32 *nds32 = target_to_nds32(target);
@@ -716,7 +716,7 @@ static int nds32_v2_read_memory(struct target *target, uint32_t address,
return nds32_read_memory(target, address, size, count, buffer);
}

static int nds32_v2_write_memory(struct target *target, uint32_t address,
static int nds32_v2_write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
struct nds32 *nds32 = target_to_nds32(target);


+ 4
- 4
src/target/nds32_v3.c View File

@@ -53,7 +53,7 @@ static int nds32_v3_activate_hardware_breakpoint(struct target *target)
/* enable breakpoint (physical address) */
aice_write_debug_reg(aice, NDS_EDM_SR_BPC0 + hbr_index, 0xA);

LOG_DEBUG("Add hardware BP %" PRId32 " at %08" PRIx32, hbr_index,
LOG_DEBUG("Add hardware BP %" PRId32 " at %08" TARGET_PRIxADDR, hbr_index,
bp->address);
} else {
return ERROR_FAIL;
@@ -81,7 +81,7 @@ static int nds32_v3_deactivate_hardware_breakpoint(struct target *target)
return ERROR_FAIL;
}

LOG_DEBUG("Remove hardware BP %" PRId32 " at %08" PRIx32, hbr_index,
LOG_DEBUG("Remove hardware BP %" PRId32 " at %08" TARGET_PRIxADDR, hbr_index,
bp->address);
}

@@ -128,7 +128,7 @@ static int nds32_v3_activate_hardware_watchpoint(struct target *target)
/* set value */
aice_write_debug_reg(aice, NDS_EDM_SR_BPV0 + wp_num, 0);

LOG_DEBUG("Add hardware watchpoint %" PRId32 " at %08" PRIx32 " mask %08" PRIx32,
LOG_DEBUG("Add hardware watchpoint %" PRId32 " at %08" TARGET_PRIxADDR " mask %08" PRIx32,
wp_num, wp->address, wp->mask);

wp_num++;
@@ -169,7 +169,7 @@ static int nds32_v3_deactivate_hardware_watchpoint(struct target *target)
/* disable watchpoint */
aice_write_debug_reg(aice, NDS_EDM_SR_BPC0 + wp_num, 0x0);

LOG_DEBUG("Remove hardware watchpoint %" PRId32 " at %08" PRIx32
LOG_DEBUG("Remove hardware watchpoint %" PRId32 " at %08" TARGET_PRIxADDR
" mask %08" PRIx32, wp_num,
wp->address, wp->mask);
wp_num++;


+ 11
- 11
src/target/nds32_v3_common.c View File

@@ -368,7 +368,7 @@ int nds32_v3_target_request_data(struct target *target,
}

int nds32_v3_checksum_memory(struct target *target,
uint32_t address, uint32_t count, uint32_t *checksum)
target_addr_t address, uint32_t count, uint32_t *checksum)
{
LOG_WARNING("Not implemented: %s", __func__);

@@ -434,8 +434,8 @@ int nds32_v3_run_algorithm(struct target *target,
struct mem_param *mem_params,
int num_reg_params,
struct reg_param *reg_params,
uint32_t entry_point,
uint32_t exit_point,
target_addr_t entry_point,
target_addr_t exit_point,
int timeout_ms,
void *arch_info)
{
@@ -444,7 +444,7 @@ int nds32_v3_run_algorithm(struct target *target,
return ERROR_FAIL;
}

int nds32_v3_read_buffer(struct target *target, uint32_t address,
int nds32_v3_read_buffer(struct target *target, target_addr_t address,
uint32_t size, uint8_t *buffer)
{
struct nds32 *nds32 = target_to_nds32(target);
@@ -456,7 +456,7 @@ int nds32_v3_read_buffer(struct target *target, uint32_t address,
return ERROR_TARGET_NOT_HALTED;
}

uint32_t physical_address;
target_addr_t physical_address;
/* BUG: If access range crosses multiple pages, the translation will not correct
* for second page or so. */

@@ -502,7 +502,7 @@ int nds32_v3_read_buffer(struct target *target, uint32_t address,
return result;
}

int nds32_v3_write_buffer(struct target *target, uint32_t address,
int nds32_v3_write_buffer(struct target *target, target_addr_t address,
uint32_t size, const uint8_t *buffer)
{
struct nds32 *nds32 = target_to_nds32(target);
@@ -514,7 +514,7 @@ int nds32_v3_write_buffer(struct target *target, uint32_t address,
return ERROR_TARGET_NOT_HALTED;
}

uint32_t physical_address;
target_addr_t physical_address;
/* BUG: If access range crosses multiple pages, the translation will not correct
* for second page or so. */

@@ -564,7 +564,7 @@ int nds32_v3_write_buffer(struct target *target, uint32_t address,
return nds32_write_buffer(target, address, size, buffer);
}

int nds32_v3_read_memory(struct target *target, uint32_t address,
int nds32_v3_read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
struct nds32 *nds32 = target_to_nds32(target);
@@ -576,7 +576,7 @@ int nds32_v3_read_memory(struct target *target, uint32_t address,
return ERROR_TARGET_NOT_HALTED;
}

uint32_t physical_address;
target_addr_t physical_address;
/* BUG: If access range crosses multiple pages, the translation will not correct
* for second page or so. */

@@ -622,7 +622,7 @@ int nds32_v3_read_memory(struct target *target, uint32_t address,
return result;
}

int nds32_v3_write_memory(struct target *target, uint32_t address,
int nds32_v3_write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
struct nds32 *nds32 = target_to_nds32(target);
@@ -634,7 +634,7 @@ int nds32_v3_write_memory(struct target *target, uint32_t address,
return ERROR_TARGET_NOT_HALTED;
}

uint32_t physical_address;
target_addr_t physical_address;
/* BUG: If access range crosses multiple pages, the translation will not correct
* for second page or so. */



+ 7
- 7
src/target/nds32_v3_common.h View File

@@ -34,7 +34,7 @@ void nds32_v3_common_register_callback(struct nds32_v3_common_callback *callback
int nds32_v3_target_request_data(struct target *target,
uint32_t size, uint8_t *buffer);
int nds32_v3_checksum_memory(struct target *target,
uint32_t address, uint32_t count, uint32_t *checksum);
target_addr_t address, uint32_t count, uint32_t *checksum);
int nds32_v3_hit_watchpoint(struct target *target,
struct watchpoint **hit_watchpoint);
int nds32_v3_target_create_common(struct target *target, struct nds32 *nds32);
@@ -43,17 +43,17 @@ int nds32_v3_run_algorithm(struct target *target,
struct mem_param *mem_params,
int num_reg_params,
struct reg_param *reg_params,
uint32_t entry_point,
uint32_t exit_point,
target_addr_t entry_point,
target_addr_t exit_point,
int timeout_ms,
void *arch_info);
int nds32_v3_read_buffer(struct target *target, uint32_t address,
int nds32_v3_read_buffer(struct target *target, target_addr_t address,
uint32_t size, uint8_t *buffer);
int nds32_v3_write_buffer(struct target *target, uint32_t address,
int nds32_v3_write_buffer(struct target *target, target_addr_t address,
uint32_t size, const uint8_t *buffer);
int nds32_v3_read_memory(struct target *target, uint32_t address,
int nds32_v3_read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer);
int nds32_v3_write_memory(struct target *target, uint32_t address,
int nds32_v3_write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer);
int nds32_v3_init_target(struct command_context *cmd_ctx,
struct target *target);


+ 4
- 4
src/target/nds32_v3m.c View File

@@ -50,7 +50,7 @@ static int nds32_v3m_activate_hardware_breakpoint(struct target *target)
/* enable breakpoint (physical address) */
aice_write_debug_reg(aice, NDS_EDM_SR_BPC0 + brp_num, 0xA);

LOG_DEBUG("Add hardware BP %u at %08" PRIx32, brp_num,
LOG_DEBUG("Add hardware BP %u at %08" TARGET_PRIxADDR, brp_num,
bp->address);

brp_num--;
@@ -78,7 +78,7 @@ static int nds32_v3m_deactivate_hardware_breakpoint(struct target *target)
else
return ERROR_FAIL;

LOG_DEBUG("Remove hardware BP %u at %08" PRIx32, brp_num,
LOG_DEBUG("Remove hardware BP %u at %08" TARGET_PRIxADDR, brp_num,
bp->address);

brp_num--;
@@ -125,7 +125,7 @@ static int nds32_v3m_activate_hardware_watchpoint(struct target *target)
/* enable watchpoint */
aice_write_debug_reg(aice, NDS_EDM_SR_BPC0 + wp_num, wp_config);

LOG_DEBUG("Add hardware watchpoint %" PRId32 " at %08" PRIx32
LOG_DEBUG("Add hardware watchpoint %" PRId32 " at %08" TARGET_PRIxADDR
" mask %08" PRIx32, wp_num, wp->address, wp->mask);

wp_num++;
@@ -166,7 +166,7 @@ static int nds32_v3m_deactivate_hardware_watchpoint(struct target *target)
/* disable watchpoint */
aice_write_debug_reg(aice, NDS_EDM_SR_BPC0 + wp_num, 0x0);

LOG_DEBUG("Remove hardware watchpoint %" PRId32 " at %08" PRIx32
LOG_DEBUG("Remove hardware watchpoint %" PRId32 " at %08" TARGET_PRIxADDR
" mask %08" PRIx32, wp_num, wp->address, wp->mask);
wp_num++;
} else if (nds32_v3m->nds32.global_stop) {


+ 18
- 15
src/target/openrisc/or1k.c View File

@@ -861,7 +861,7 @@ static int or1k_resume_or_step(struct target *target, int current,
/* Single step past breakpoint at current address */
breakpoint = breakpoint_find(target, resume_pc);
if (breakpoint) {
LOG_DEBUG("Unset breakpoint at 0x%08" PRIx32, breakpoint->address);
LOG_DEBUG("Unset breakpoint at 0x%08" TARGET_PRIxADDR, breakpoint->address);
retval = or1k_remove_breakpoint(target, breakpoint);
if (retval != ERROR_OK)
return retval;
@@ -897,7 +897,8 @@ static int or1k_resume_or_step(struct target *target, int current,
}

static int or1k_resume(struct target *target, int current,
uint32_t address, int handle_breakpoints, int debug_execution)
target_addr_t address, int handle_breakpoints,
int debug_execution)
{
return or1k_resume_or_step(target, current, address,
handle_breakpoints,
@@ -906,7 +907,7 @@ static int or1k_resume(struct target *target, int current,
}

static int or1k_step(struct target *target, int current,
uint32_t address, int handle_breakpoints)
target_addr_t address, int handle_breakpoints)
{
return or1k_resume_or_step(target, current, address,
handle_breakpoints,
@@ -922,7 +923,7 @@ static int or1k_add_breakpoint(struct target *target,
struct or1k_du *du_core = or1k_to_du(or1k);
uint8_t data;

LOG_DEBUG("Adding breakpoint: addr 0x%08" PRIx32 ", len %d, type %d, set: %d, id: %" PRId32,
LOG_DEBUG("Adding breakpoint: addr 0x%08" TARGET_PRIxADDR ", len %d, type %d, set: %d, id: %" PRId32,
breakpoint->address, breakpoint->length, breakpoint->type,
breakpoint->set, breakpoint->unique_id);

@@ -937,7 +938,7 @@ static int or1k_add_breakpoint(struct target *target,
1,
&data);
if (retval != ERROR_OK) {
LOG_ERROR("Error while reading the instruction at 0x%08" PRIx32,
LOG_ERROR("Error while reading the instruction at 0x%08" TARGET_PRIxADDR,
breakpoint->address);
return retval;
}
@@ -958,14 +959,15 @@ static int or1k_add_breakpoint(struct target *target,
or1k_trap_insn);

if (retval != ERROR_OK) {
LOG_ERROR("Error while writing OR1K_TRAP_INSTR at 0x%08" PRIx32,
LOG_ERROR("Error while writing OR1K_TRAP_INSTR at 0x%08" TARGET_PRIxADDR,
breakpoint->address);
return retval;
}

/* invalidate instruction cache */
uint32_t addr = breakpoint->address;
retval = du_core->or1k_jtag_write_cpu(&or1k->jtag,
OR1K_ICBIR_CPU_REG_ADD, 1, &breakpoint->address);
OR1K_ICBIR_CPU_REG_ADD, 1, &addr);
if (retval != ERROR_OK) {
LOG_ERROR("Error while invalidating the ICACHE");
return retval;
@@ -980,7 +982,7 @@ static int or1k_remove_breakpoint(struct target *target,
struct or1k_common *or1k = target_to_or1k(target);
struct or1k_du *du_core = or1k_to_du(or1k);

LOG_DEBUG("Removing breakpoint: addr 0x%08" PRIx32 ", len %d, type %d, set: %d, id: %" PRId32,
LOG_DEBUG("Removing breakpoint: addr 0x%08" TARGET_PRIxADDR ", len %d, type %d, set: %d, id: %" PRId32,
breakpoint->address, breakpoint->length, breakpoint->type,
breakpoint->set, breakpoint->unique_id);

@@ -996,14 +998,15 @@ static int or1k_remove_breakpoint(struct target *target,
breakpoint->orig_instr);

if (retval != ERROR_OK) {
LOG_ERROR("Error while writing back the instruction at 0x%08" PRIx32,
LOG_ERROR("Error while writing back the instruction at 0x%08" TARGET_PRIxADDR,
breakpoint->address);
return retval;
}

/* invalidate instruction cache */
uint32_t addr = breakpoint->address;
retval = du_core->or1k_jtag_write_cpu(&or1k->jtag,
OR1K_ICBIR_CPU_REG_ADD, 1, &breakpoint->address);
OR1K_ICBIR_CPU_REG_ADD, 1, &addr);
if (retval != ERROR_OK) {
LOG_ERROR("Error while invalidating the ICACHE");
return retval;
@@ -1026,13 +1029,13 @@ static int or1k_remove_watchpoint(struct target *target,
return ERROR_OK;
}

static int or1k_read_memory(struct target *target, uint32_t address,
static int or1k_read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
struct or1k_common *or1k = target_to_or1k(target);
struct or1k_du *du_core = or1k_to_du(or1k);

LOG_DEBUG("Read memory at 0x%08" PRIx32 ", size: %" PRIu32 ", count: 0x%08" PRIx32, address, size, count);
LOG_DEBUG("Read memory at 0x%08" TARGET_PRIxADDR ", size: %" PRIu32 ", count: 0x%08" PRIx32, address, size, count);

if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
@@ -1053,13 +1056,13 @@ static int or1k_read_memory(struct target *target, uint32_t address,
return du_core->or1k_jtag_read_memory(&or1k->jtag, address, size, count, buffer);
}

static int or1k_write_memory(struct target *target, uint32_t address,
static int or1k_write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
struct or1k_common *or1k = target_to_or1k(target);
struct or1k_du *du_core = or1k_to_du(or1k);

LOG_DEBUG("Write memory at 0x%08" PRIx32 ", size: %" PRIu32 ", count: 0x%08" PRIx32, address, size, count);
LOG_DEBUG("Write memory at 0x%08" TARGET_PRIxADDR ", size: %" PRIu32 ", count: 0x%08" PRIx32, address, size, count);

if (target->state != TARGET_HALTED) {
LOG_WARNING("Target not halted");
@@ -1203,7 +1206,7 @@ int or1k_get_gdb_fileio_info(struct target *target, struct gdb_fileio_info *file
return ERROR_FAIL;
}

static int or1k_checksum_memory(struct target *target, uint32_t address,
static int or1k_checksum_memory(struct target *target, target_addr_t address,
uint32_t count, uint32_t *checksum) {

return ERROR_FAIL;


+ 210
- 99
src/target/target.c View File

@@ -58,9 +58,9 @@
/* default halt wait timeout (ms) */
#define DEFAULT_HALT_TIMEOUT 5000

static int target_read_buffer_default(struct target *target, uint32_t address,
static int target_read_buffer_default(struct target *target, target_addr_t address,
uint32_t count, uint8_t *buffer);
static int target_write_buffer_default(struct target *target, uint32_t address,
static int target_write_buffer_default(struct target *target, target_addr_t address,
uint32_t count, const uint8_t *buffer);
static int target_array2mem(Jim_Interp *interp, struct target *target,
int argc, Jim_Obj * const *argv);
@@ -597,7 +597,8 @@ int target_halt(struct target *target)
* hand the infrastructure for running such helpers might use this
* procedure but rely on hardware breakpoint to detect termination.)
*/
int target_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
int target_resume(struct target *target, int current, target_addr_t address,
int handle_breakpoints, int debug_execution)
{
int retval;

@@ -668,7 +669,7 @@ static int target_process_reset(struct command_context *cmd_ctx, enum target_res
}

static int identity_virt2phys(struct target *target,
uint32_t virtual, uint32_t *physical)
target_addr_t virtual, target_addr_t *physical)
{
*physical = virtual;
return ERROR_OK;
@@ -1034,7 +1035,7 @@ int target_run_flash_async_algorithm(struct target *target,
}

int target_read_memory(struct target *target,
uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
if (!target_was_examined(target)) {
LOG_ERROR("Target not examined yet");
@@ -1048,7 +1049,7 @@ int target_read_memory(struct target *target,
}

int target_read_phys_memory(struct target *target,
uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
if (!target_was_examined(target)) {
LOG_ERROR("Target not examined yet");
@@ -1062,7 +1063,7 @@ int target_read_phys_memory(struct target *target,
}

int target_write_memory(struct target *target,
uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
{
if (!target_was_examined(target)) {
LOG_ERROR("Target not examined yet");
@@ -1076,7 +1077,7 @@ int target_write_memory(struct target *target,
}

int target_write_phys_memory(struct target *target,
uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
{
if (!target_was_examined(target)) {
LOG_ERROR("Target not examined yet");
@@ -1164,7 +1165,7 @@ int target_get_gdb_reg_list(struct target *target,
return target->type->get_gdb_reg_list(target, reg_list, reg_list_size, reg_class);
}
int target_step(struct target *target,
int current, uint32_t address, int handle_breakpoints)
int current, target_addr_t address, int handle_breakpoints)
{
return target->type->step(target, current, address, handle_breakpoints);
}
@@ -1635,7 +1636,7 @@ static void print_wa_layout(struct target *target)
struct working_area *c = target->working_areas;

while (c) {
LOG_DEBUG("%c%c 0x%08"PRIx32"-0x%08"PRIx32" (%"PRIu32" bytes)",
LOG_DEBUG("%c%c " TARGET_ADDR_FMT "-" TARGET_ADDR_FMT " (%" PRIu32 " bytes)",
c->backup ? 'b' : ' ', c->free ? ' ' : '*',
c->address, c->address + c->size - 1, c->size);
c = c->next;
@@ -1720,7 +1721,7 @@ int target_alloc_working_area_try(struct target *target, uint32_t size, struct w
if (!enabled) {
if (target->working_area_phys_spec) {
LOG_DEBUG("MMU disabled, using physical "
"address for working memory 0x%08"PRIx32,
"address for working memory " TARGET_ADDR_FMT,
target->working_area_phys);
target->working_area = target->working_area_phys;
} else {
@@ -1731,7 +1732,7 @@ int target_alloc_working_area_try(struct target *target, uint32_t size, struct w
} else {
if (target->working_area_virt_spec) {
LOG_DEBUG("MMU enabled, using virtual "
"address for working memory 0x%08"PRIx32,
"address for working memory " TARGET_ADDR_FMT,
target->working_area_virt);
target->working_area = target->working_area_virt;
} else {
@@ -1774,7 +1775,8 @@ int target_alloc_working_area_try(struct target *target, uint32_t size, struct w
/* Split the working area into the requested size */
target_split_working_area(c, size);

LOG_DEBUG("allocated new working area of %"PRIu32" bytes at address 0x%08"PRIx32, size, c->address);
LOG_DEBUG("allocated new working area of %" PRIu32 " bytes at address " TARGET_ADDR_FMT,
size, c->address);

if (target->backup_working_area) {
if (c->backup == NULL) {
@@ -1818,7 +1820,7 @@ static int target_restore_working_area(struct target *target, struct working_are
if (target->backup_working_area && area->backup != NULL) {
retval = target_write_memory(target, area->address, 4, area->size / 4, area->backup);
if (retval != ERROR_OK)
LOG_ERROR("failed to restore %"PRIu32" bytes of working area at address 0x%08"PRIx32,
LOG_ERROR("failed to restore %" PRIu32 " bytes of working area at address " TARGET_ADDR_FMT,
area->size, area->address);
}

@@ -1842,7 +1844,7 @@ static int target_free_working_area_restore(struct target *target, struct workin

area->free = true;

LOG_DEBUG("freed %"PRIu32" bytes of working area at address 0x%08"PRIx32,
LOG_DEBUG("freed %" PRIu32 " bytes of working area at address " TARGET_ADDR_FMT,
area->size, area->address);

/* mark user pointer invalid */
@@ -2024,9 +2026,9 @@ static int target_profiling_default(struct target *target, uint32_t *samples,
* mode respectively, otherwise data is handled as quickly as
* possible
*/
int target_write_buffer(struct target *target, uint32_t address, uint32_t size, const uint8_t *buffer)
int target_write_buffer(struct target *target, target_addr_t address, uint32_t size, const uint8_t *buffer)
{
LOG_DEBUG("writing buffer of %" PRIi32 " byte at 0x%8.8" PRIx32,
LOG_DEBUG("writing buffer of %" PRIi32 " byte at " TARGET_ADDR_FMT,
size, address);

if (!target_was_examined(target)) {
@@ -2039,7 +2041,7 @@ int target_write_buffer(struct target *target, uint32_t address, uint32_t size,

if ((address + size - 1) < address) {
/* GDB can request this when e.g. PC is 0xfffffffc */
LOG_ERROR("address + size wrapped (0x%08" PRIx32 ", 0x%08" PRIx32 ")",
LOG_ERROR("address + size wrapped (" TARGET_ADDR_FMT ", 0x%08" PRIx32 ")",
address,
size);
return ERROR_FAIL;
@@ -2048,7 +2050,8 @@ int target_write_buffer(struct target *target, uint32_t address, uint32_t size,
return target->type->write_buffer(target, address, size, buffer);
}

static int target_write_buffer_default(struct target *target, uint32_t address, uint32_t count, const uint8_t *buffer)
static int target_write_buffer_default(struct target *target,
target_addr_t address, uint32_t count, const uint8_t *buffer)
{
uint32_t size;

@@ -2085,9 +2088,9 @@ static int target_write_buffer_default(struct target *target, uint32_t address,
* mode respectively, otherwise data is handled as quickly as
* possible
*/
int target_read_buffer(struct target *target, uint32_t address, uint32_t size, uint8_t *buffer)
int target_read_buffer(struct target *target, target_addr_t address, uint32_t size, uint8_t *buffer)
{
LOG_DEBUG("reading buffer of %" PRIi32 " byte at 0x%8.8" PRIx32,
LOG_DEBUG("reading buffer of %" PRIi32 " byte at " TARGET_ADDR_FMT,
size, address);

if (!target_was_examined(target)) {
@@ -2100,7 +2103,7 @@ int target_read_buffer(struct target *target, uint32_t address, uint32_t size, u

if ((address + size - 1) < address) {
/* GDB can request this when e.g. PC is 0xfffffffc */
LOG_ERROR("address + size wrapped (0x%08" PRIx32 ", 0x%08" PRIx32 ")",
LOG_ERROR("address + size wrapped (" TARGET_ADDR_FMT ", 0x%08" PRIx32 ")",
address,
size);
return ERROR_FAIL;
@@ -2109,7 +2112,7 @@ int target_read_buffer(struct target *target, uint32_t address, uint32_t size, u
return target->type->read_buffer(target, address, size, buffer);
}

static int target_read_buffer_default(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer)
static int target_read_buffer_default(struct target *target, target_addr_t address, uint32_t count, uint8_t *buffer)
{
uint32_t size;

@@ -2142,7 +2145,7 @@ static int target_read_buffer_default(struct target *target, uint32_t address, u
return ERROR_OK;
}

int target_checksum_memory(struct target *target, uint32_t address, uint32_t size, uint32_t* crc)
int target_checksum_memory(struct target *target, target_addr_t address, uint32_t size, uint32_t* crc)
{
uint8_t *buffer;
int retval;
@@ -2182,7 +2185,7 @@ int target_checksum_memory(struct target *target, uint32_t address, uint32_t siz
return retval;
}

int target_blank_check_memory(struct target *target, uint32_t address, uint32_t size, uint32_t* blank,
int target_blank_check_memory(struct target *target, target_addr_t address, uint32_t size, uint32_t* blank,
uint8_t erased_value)
{
int retval;
@@ -2199,7 +2202,7 @@ int target_blank_check_memory(struct target *target, uint32_t address, uint32_t
return retval;
}

int target_read_u64(struct target *target, uint64_t address, uint64_t *value)
int target_read_u64(struct target *target, target_addr_t address, uint64_t *value)
{
uint8_t value_buf[8];
if (!target_was_examined(target)) {
@@ -2211,19 +2214,19 @@ int target_read_u64(struct target *target, uint64_t address, uint64_t *value)

if (retval == ERROR_OK) {
*value = target_buffer_get_u64(target, value_buf);
LOG_DEBUG("address: 0x%" PRIx64 ", value: 0x%16.16" PRIx64 "",
LOG_DEBUG("address: " TARGET_ADDR_FMT ", value: 0x%16.16" PRIx64 "",
address,
*value);
} else {
*value = 0x0;
LOG_DEBUG("address: 0x%" PRIx64 " failed",
LOG_DEBUG("address: " TARGET_ADDR_FMT " failed",
address);
}

return retval;
}

int target_read_u32(struct target *target, uint32_t address, uint32_t *value)
int target_read_u32(struct target *target, target_addr_t address, uint32_t *value)
{
uint8_t value_buf[4];
if (!target_was_examined(target)) {
@@ -2235,19 +2238,19 @@ int target_read_u32(struct target *target, uint32_t address, uint32_t *value)

if (retval == ERROR_OK) {
*value = target_buffer_get_u32(target, value_buf);
LOG_DEBUG("address: 0x%8.8" PRIx32 ", value: 0x%8.8" PRIx32 "",
LOG_DEBUG("address: " TARGET_ADDR_FMT ", value: 0x%8.8" PRIx32 "",
address,
*value);
} else {
*value = 0x0;
LOG_DEBUG("address: 0x%8.8" PRIx32 " failed",
LOG_DEBUG("address: " TARGET_ADDR_FMT " failed",
address);
}

return retval;
}

int target_read_u16(struct target *target, uint32_t address, uint16_t *value)
int target_read_u16(struct target *target, target_addr_t address, uint16_t *value)
{
uint8_t value_buf[2];
if (!target_was_examined(target)) {
@@ -2259,19 +2262,19 @@ int target_read_u16(struct target *target, uint32_t address, uint16_t *value)

if (retval == ERROR_OK) {
*value = target_buffer_get_u16(target, value_buf);
LOG_DEBUG("address: 0x%8.8" PRIx32 ", value: 0x%4.4" PRIx16,
LOG_DEBUG("address: " TARGET_ADDR_FMT ", value: 0x%4.4" PRIx16,
address,
*value);
} else {
*value = 0x0;
LOG_DEBUG("address: 0x%8.8" PRIx32 " failed",
LOG_DEBUG("address: " TARGET_ADDR_FMT " failed",
address);
}

return retval;
}

int target_read_u8(struct target *target, uint32_t address, uint8_t *value)
int target_read_u8(struct target *target, target_addr_t address, uint8_t *value)
{
if (!target_was_examined(target)) {
LOG_ERROR("Target not examined yet");
@@ -2281,19 +2284,19 @@ int target_read_u8(struct target *target, uint32_t address, uint8_t *value)
int retval = target_read_memory(target, address, 1, 1, value);

if (retval == ERROR_OK) {
LOG_DEBUG("address: 0x%8.8" PRIx32 ", value: 0x%2.2" PRIx8,
LOG_DEBUG("address: " TARGET_ADDR_FMT ", value: 0x%2.2" PRIx8,
address,
*value);
} else {
*value = 0x0;
LOG_DEBUG("address: 0x%8.8" PRIx32 " failed",
LOG_DEBUG("address: " TARGET_ADDR_FMT " failed",
address);
}

return retval;
}

int target_write_u64(struct target *target, uint64_t address, uint64_t value)
int target_write_u64(struct target *target, target_addr_t address, uint64_t value)
{
int retval;
uint8_t value_buf[8];
@@ -2302,7 +2305,7 @@ int target_write_u64(struct target *target, uint64_t address, uint64_t value)
return ERROR_FAIL;
}

LOG_DEBUG("address: 0x%" PRIx64 ", value: 0x%16.16" PRIx64 "",
LOG_DEBUG("address: " TARGET_ADDR_FMT ", value: 0x%16.16" PRIx64 "",
address,
value);

@@ -2314,7 +2317,7 @@ int target_write_u64(struct target *target, uint64_t address, uint64_t value)
return retval;
}

int target_write_u32(struct target *target, uint32_t address, uint32_t value)
int target_write_u32(struct target *target, target_addr_t address, uint32_t value)
{
int retval;
uint8_t value_buf[4];
@@ -2323,7 +2326,7 @@ int target_write_u32(struct target *target, uint32_t address, uint32_t value)
return ERROR_FAIL;
}

LOG_DEBUG("address: 0x%8.8" PRIx32 ", value: 0x%8.8" PRIx32 "",
LOG_DEBUG("address: " TARGET_ADDR_FMT ", value: 0x%8.8" PRIx32 "",
address,
value);

@@ -2335,7 +2338,7 @@ int target_write_u32(struct target *target, uint32_t address, uint32_t value)
return retval;
}

int target_write_u16(struct target *target, uint32_t address, uint16_t value)
int target_write_u16(struct target *target, target_addr_t address, uint16_t value)
{
int retval;
uint8_t value_buf[2];
@@ -2344,7 +2347,7 @@ int target_write_u16(struct target *target, uint32_t address, uint16_t value)
return ERROR_FAIL;
}

LOG_DEBUG("address: 0x%8.8" PRIx32 ", value: 0x%8.8" PRIx16,
LOG_DEBUG("address: " TARGET_ADDR_FMT ", value: 0x%8.8" PRIx16,
address,
value);

@@ -2356,7 +2359,7 @@ int target_write_u16(struct target *target, uint32_t address, uint16_t value)
return retval;
}

int target_write_u8(struct target *target, uint32_t address, uint8_t value)
int target_write_u8(struct target *target, target_addr_t address, uint8_t value)
{
int retval;
if (!target_was_examined(target)) {
@@ -2364,7 +2367,7 @@ int target_write_u8(struct target *target, uint32_t address, uint8_t value)
return ERROR_FAIL;
}

LOG_DEBUG("address: 0x%8.8" PRIx32 ", value: 0x%2.2" PRIx8,
LOG_DEBUG("address: " TARGET_ADDR_FMT ", value: 0x%2.2" PRIx8,
address, value);

retval = target_write_memory(target, address, 1, 1, &value);
@@ -2374,6 +2377,87 @@ int target_write_u8(struct target *target, uint32_t address, uint8_t value)
return retval;
}

int target_write_phys_u64(struct target *target, target_addr_t address, uint64_t value)
{
int retval;
uint8_t value_buf[8];
if (!target_was_examined(target)) {
LOG_ERROR("Target not examined yet");
return ERROR_FAIL;
}

LOG_DEBUG("address: " TARGET_ADDR_FMT ", value: 0x%16.16" PRIx64 "",
address,
value);

target_buffer_set_u64(target, value_buf, value);
retval = target_write_phys_memory(target, address, 8, 1, value_buf);
if (retval != ERROR_OK)
LOG_DEBUG("failed: %i", retval);

return retval;
}

int target_write_phys_u32(struct target *target, target_addr_t address, uint32_t value)
{
int retval;
uint8_t value_buf[4];
if (!target_was_examined(target)) {
LOG_ERROR("Target not examined yet");
return ERROR_FAIL;
}

LOG_DEBUG("address: " TARGET_ADDR_FMT ", value: 0x%8.8" PRIx32 "",
address,
value);

target_buffer_set_u32(target, value_buf, value);
retval = target_write_phys_memory(target, address, 4, 1, value_buf);
if (retval != ERROR_OK)
LOG_DEBUG("failed: %i", retval);

return retval;
}

int target_write_phys_u16(struct target *target, target_addr_t address, uint16_t value)
{
int retval;
uint8_t value_buf[2];
if (!target_was_examined(target)) {
LOG_ERROR("Target not examined yet");
return ERROR_FAIL;
}

LOG_DEBUG("address: " TARGET_ADDR_FMT ", value: 0x%8.8" PRIx16,
address,
value);

target_buffer_set_u16(target, value_buf, value);
retval = target_write_phys_memory(target, address, 2, 1, value_buf);
if (retval != ERROR_OK)
LOG_DEBUG("failed: %i", retval);

return retval;
}

int target_write_phys_u8(struct target *target, target_addr_t address, uint8_t value)
{
int retval;
if (!target_was_examined(target)) {
LOG_ERROR("Target not examined yet");
return ERROR_FAIL;
}

LOG_DEBUG("address: " TARGET_ADDR_FMT ", value: 0x%2.2" PRIx8,
address, value);

retval = target_write_phys_memory(target, address, 1, 1, &value);
if (retval != ERROR_OK)
LOG_DEBUG("failed: %i", retval);

return retval;
}

static int find_target(struct command_context *cmd_ctx, const char *name)
{
struct target *target = get_target(name);
@@ -2877,9 +2961,9 @@ COMMAND_HANDLER(handle_resume_command)
/* with no CMD_ARGV, resume from current pc, addr = 0,
* with one arguments, addr = CMD_ARGV[0],
* handle breakpoints, not debugging */
uint32_t addr = 0;
target_addr_t addr = 0;
if (CMD_ARGC == 1) {
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], addr);
COMMAND_PARSE_ADDRESS(CMD_ARGV[0], addr);
current = 0;
}

@@ -2896,10 +2980,10 @@ COMMAND_HANDLER(handle_step_command)
/* with no CMD_ARGV, step from current pc, addr = 0,
* with one argument addr = CMD_ARGV[0],
* handle breakpoints, debugging */
uint32_t addr = 0;
target_addr_t addr = 0;
int current_pc = 1;
if (CMD_ARGC == 1) {
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], addr);
COMMAND_PARSE_ADDRESS(CMD_ARGV[0], addr);
current_pc = 0;
}

@@ -2909,7 +2993,7 @@ COMMAND_HANDLER(handle_step_command)
}

static void handle_md_output(struct command_context *cmd_ctx,
struct target *target, uint32_t address, unsigned size,
struct target *target, target_addr_t address, unsigned size,
unsigned count, const uint8_t *buffer)
{
const unsigned line_bytecnt = 32;
@@ -2920,6 +3004,9 @@ static void handle_md_output(struct command_context *cmd_ctx,

const char *value_fmt;
switch (size) {
case 8:
value_fmt = "%16.16llx ";
break;
case 4:
value_fmt = "%8.8x ";
break;
@@ -2939,13 +3026,16 @@ static void handle_md_output(struct command_context *cmd_ctx,
if (i % line_modulo == 0) {
output_len += snprintf(output + output_len,
sizeof(output) - output_len,
"0x%8.8x: ",
(unsigned)(address + (i*size)));
TARGET_ADDR_FMT ": ",
(address + (i * size)));
}

uint32_t value = 0;
uint64_t value = 0;
const uint8_t *value_ptr = buffer + i * size;
switch (size) {
case 8:
value = target_buffer_get_u64(target, value_ptr);
break;
case 4:
value = target_buffer_get_u32(target, value_ptr);
break;
@@ -2973,6 +3063,9 @@ COMMAND_HANDLER(handle_md_command)

unsigned size = 0;
switch (CMD_NAME[2]) {
case 'd':
size = 8;
break;
case 'w':
size = 4;
break;
@@ -2988,7 +3081,7 @@ COMMAND_HANDLER(handle_md_command)

bool physical = strcmp(CMD_ARGV[0], "phys") == 0;
int (*fn)(struct target *target,
uint32_t address, uint32_t size_value, uint32_t count, uint8_t *buffer);
target_addr_t address, uint32_t size_value, uint32_t count, uint8_t *buffer);
if (physical) {
CMD_ARGC--;
CMD_ARGV++;
@@ -2998,8 +3091,8 @@ COMMAND_HANDLER(handle_md_command)
if ((CMD_ARGC < 1) || (CMD_ARGC > 2))
return ERROR_COMMAND_SYNTAX_ERROR;

uint32_t address;
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
target_addr_t address;
COMMAND_PARSE_ADDRESS(CMD_ARGV[0], address);

unsigned count = 1;
if (CMD_ARGC == 2)
@@ -3018,14 +3111,14 @@ COMMAND_HANDLER(handle_md_command)
}

typedef int (*target_write_fn)(struct target *target,
uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer);
target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer);

static int target_fill_mem(struct target *target,
uint32_t address,
target_addr_t address,
target_write_fn fn,
unsigned data_size,
/* value */
uint32_t b,
uint64_t b,
/* count */
unsigned c)
{
@@ -3040,6 +3133,9 @@ static int target_fill_mem(struct target *target,

for (unsigned i = 0; i < chunk_size; i++) {
switch (data_size) {
case 8:
target_buffer_set_u64(target, target_buf + i * data_size, b);
break;
case 4:
target_buffer_set_u32(target, target_buf + i * data_size, b);
break;
@@ -3088,11 +3184,11 @@ COMMAND_HANDLER(handle_mw_command)
if ((CMD_ARGC < 2) || (CMD_ARGC > 3))
return ERROR_COMMAND_SYNTAX_ERROR;

uint32_t address;
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
target_addr_t address;
COMMAND_PARSE_ADDRESS(CMD_ARGV[0], address);

uint32_t value;
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
target_addr_t value;
COMMAND_PARSE_ADDRESS(CMD_ARGV[1], value);

unsigned count = 1;
if (CMD_ARGC == 3)
@@ -3101,6 +3197,9 @@ COMMAND_HANDLER(handle_mw_command)
struct target *target = get_current_target(CMD_CTX);
unsigned wordsize;
switch (CMD_NAME[2]) {
case 'd':
wordsize = 8;
break;
case 'w':
wordsize = 4;
break;
@@ -3118,7 +3217,7 @@ COMMAND_HANDLER(handle_mw_command)
}

static COMMAND_HELPER(parse_load_image_command_CMD_ARGV, struct image *image,
uint32_t *min_address, uint32_t *max_address)
target_addr_t *min_address, target_addr_t *max_address)
{
if (CMD_ARGC < 1 || CMD_ARGC > 5)
return ERROR_COMMAND_SYNTAX_ERROR;
@@ -3126,8 +3225,8 @@ static COMMAND_HELPER(parse_load_image_command_CMD_ARGV, struct image *image,
/* a base address isn't always necessary,
* default to 0x0 (i.e. don't relocate) */
if (CMD_ARGC >= 2) {
uint32_t addr;
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], addr);
target_addr_t addr;
COMMAND_PARSE_ADDRESS(CMD_ARGV[1], addr);
image->base_address = addr;
image->base_address_set = 1;
} else
@@ -3136,9 +3235,9 @@ static COMMAND_HELPER(parse_load_image_command_CMD_ARGV, struct image *image,
image->start_address_set = 0;

if (CMD_ARGC >= 4)
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[3], *min_address);
COMMAND_PARSE_ADDRESS(CMD_ARGV[3], *min_address);
if (CMD_ARGC == 5) {
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[4], *max_address);
COMMAND_PARSE_ADDRESS(CMD_ARGV[4], *max_address);
/* use size (given) to find max (required) */
*max_address += *min_address;
}
@@ -3154,8 +3253,8 @@ COMMAND_HANDLER(handle_load_image_command)
uint8_t *buffer;
size_t buf_cnt;
uint32_t image_size;
uint32_t min_address = 0;
uint32_t max_address = 0xffffffff;
target_addr_t min_address = 0;
target_addr_t max_address = -1;
int i;
struct image image;

@@ -3214,7 +3313,7 @@ COMMAND_HANDLER(handle_load_image_command)
break;
}
image_size += length;
command_print(CMD_CTX, "%u bytes written at address 0x%8.8" PRIx32 "",
command_print(CMD_CTX, "%u bytes written at address " TARGET_ADDR_FMT "",
(unsigned int)length,
image.sections[i].base_address + offset);
}
@@ -3239,15 +3338,15 @@ COMMAND_HANDLER(handle_dump_image_command)
struct fileio *fileio;
uint8_t *buffer;
int retval, retvaltemp;
uint32_t address, size;
target_addr_t address, size;
struct duration bench;
struct target *target = get_current_target(CMD_CTX);

if (CMD_ARGC != 3)
return ERROR_COMMAND_SYNTAX_ERROR;

COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], address);
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], size);
COMMAND_PARSE_ADDRESS(CMD_ARGV[1], address);
COMMAND_PARSE_ADDRESS(CMD_ARGV[2], size);

uint32_t buf_size = (size > 4096) ? 4096 : size;
buffer = malloc(buf_size);
@@ -3328,8 +3427,8 @@ static COMMAND_HELPER(handle_verify_image_command_internal, enum verify_mode ver
duration_start(&bench);

if (CMD_ARGC >= 2) {
uint32_t addr;
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], addr);
target_addr_t addr;
COMMAND_PARSE_ADDRESS(CMD_ARGV[1], addr);
image.base_address = addr;
image.base_address_set = 1;
} else {
@@ -3419,7 +3518,7 @@ static COMMAND_HELPER(handle_verify_image_command_internal, enum verify_mode ver
free(data);
}
} else {
command_print(CMD_CTX, "address 0x%08" PRIx32 " length 0x%08zx",
command_print(CMD_CTX, "address " TARGET_ADDR_FMT " length 0x%08zx",
image.sections[i].base_address,
buf_cnt);
}
@@ -3466,7 +3565,7 @@ static int handle_bp_command_list(struct command_context *cmd_ctx)
if (breakpoint->type == BKPT_SOFT) {
char *buf = buf_to_str(breakpoint->orig_instr,
breakpoint->length, 16);
command_print(cmd_ctx, "IVA breakpoint: 0x%8.8" PRIx32 ", 0x%x, %i, 0x%s",
command_print(cmd_ctx, "IVA breakpoint: " TARGET_ADDR_FMT ", 0x%x, %i, 0x%s",
breakpoint->address,
breakpoint->length,
breakpoint->set, buf);
@@ -3477,13 +3576,13 @@ static int handle_bp_command_list(struct command_context *cmd_ctx)
breakpoint->asid,
breakpoint->length, breakpoint->set);
else if ((breakpoint->address != 0) && (breakpoint->asid != 0)) {
command_print(cmd_ctx, "Hybrid breakpoint(IVA): 0x%8.8" PRIx32 ", 0x%x, %i",
command_print(cmd_ctx, "Hybrid breakpoint(IVA): " TARGET_ADDR_FMT ", 0x%x, %i",
breakpoint->address,
breakpoint->length, breakpoint->set);
command_print(cmd_ctx, "\t|--->linked with ContextID: 0x%8.8" PRIx32,
breakpoint->asid);
} else
command_print(cmd_ctx, "Breakpoint(IVA): 0x%8.8" PRIx32 ", 0x%x, %i",
command_print(cmd_ctx, "Breakpoint(IVA): " TARGET_ADDR_FMT ", 0x%x, %i",
breakpoint->address,
breakpoint->length, breakpoint->set);
}
@@ -3494,7 +3593,7 @@ static int handle_bp_command_list(struct command_context *cmd_ctx)
}

static int handle_bp_command_set(struct command_context *cmd_ctx,
uint32_t addr, uint32_t asid, uint32_t length, int hw)
target_addr_t addr, uint32_t asid, uint32_t length, int hw)
{
struct target *target = get_current_target(cmd_ctx);
int retval;
@@ -3502,7 +3601,7 @@ static int handle_bp_command_set(struct command_context *cmd_ctx,
if (asid == 0) {
retval = breakpoint_add(target, addr, length, hw);
if (ERROR_OK == retval)
command_print(cmd_ctx, "breakpoint set at 0x%8.8" PRIx32 "", addr);
command_print(cmd_ctx, "breakpoint set at " TARGET_ADDR_FMT "", addr);
else {
LOG_ERROR("Failure setting breakpoint, the same address(IVA) is already used");
return retval;
@@ -3537,7 +3636,7 @@ static int handle_bp_command_set(struct command_context *cmd_ctx,

COMMAND_HANDLER(handle_bp_command)
{
uint32_t addr;
target_addr_t addr;
uint32_t asid;
uint32_t length;
int hw = BKPT_SOFT;
@@ -3548,17 +3647,15 @@ COMMAND_HANDLER(handle_bp_command)

case 2:
asid = 0;
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], addr);
COMMAND_PARSE_ADDRESS(CMD_ARGV[0], addr);
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], length);
return handle_bp_command_set(CMD_CTX, addr, asid, length, hw);

case 3:
if (strcmp(CMD_ARGV[2], "hw") == 0) {
hw = BKPT_HARD;
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], addr);

COMMAND_PARSE_ADDRESS(CMD_ARGV[0], addr);
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], length);

asid = 0;
return handle_bp_command_set(CMD_CTX, addr, asid, length, hw);
} else if (strcmp(CMD_ARGV[2], "hw_ctx") == 0) {
@@ -3571,7 +3668,7 @@ COMMAND_HANDLER(handle_bp_command)

case 4:
hw = BKPT_HARD;
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], addr);
COMMAND_PARSE_ADDRESS(CMD_ARGV[0], addr);
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], asid);
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], length);
return handle_bp_command_set(CMD_CTX, addr, asid, length, hw);
@@ -3586,8 +3683,8 @@ COMMAND_HANDLER(handle_rbp_command)
if (CMD_ARGC != 1)
return ERROR_COMMAND_SYNTAX_ERROR;

uint32_t addr;
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], addr);
target_addr_t addr;
COMMAND_PARSE_ADDRESS(CMD_ARGV[0], addr);

struct target *target = get_current_target(CMD_CTX);
breakpoint_remove(target, addr);
@@ -3603,7 +3700,7 @@ COMMAND_HANDLER(handle_wp_command)
struct watchpoint *watchpoint = target->watchpoints;

while (watchpoint) {
command_print(CMD_CTX, "address: 0x%8.8" PRIx32
command_print(CMD_CTX, "address: " TARGET_ADDR_FMT
", len: 0x%8.8" PRIx32
", r/w/a: %i, value: 0x%8.8" PRIx32
", mask: 0x%8.8" PRIx32,
@@ -3688,14 +3785,14 @@ COMMAND_HANDLER(handle_virt2phys_command)
if (CMD_ARGC != 1)
return ERROR_COMMAND_SYNTAX_ERROR;

uint32_t va;
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], va);
uint32_t pa;
target_addr_t va;
COMMAND_PARSE_ADDRESS(CMD_ARGV[0], va);
target_addr_t pa;

struct target *target = get_current_target(CMD_CTX);
int retval = target->type->virt2phys(target, va, &pa);
if (retval == ERROR_OK)
command_print(CMD_CTX, "Physical address 0x%08" PRIx32 "", pa);
command_print(CMD_CTX, "Physical address " TARGET_ADDR_FMT "", pa);

return retval;
}
@@ -4771,7 +4868,7 @@ static int jim_target_md(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
}

int (*fn)(struct target *target,
uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer);
fn = target_read_memory;

int e;
@@ -5643,7 +5740,7 @@ static const struct command_registration target_subcommand_handlers[] = {
};

struct FastLoad {
uint32_t address;
target_addr_t address;
uint8_t *data;
int length;

@@ -5670,8 +5767,8 @@ COMMAND_HANDLER(handle_fast_load_image_command)
uint8_t *buffer;
size_t buf_cnt;
uint32_t image_size;
uint32_t min_address = 0;
uint32_t max_address = 0xffffffff;
target_addr_t min_address = 0;
target_addr_t max_address = -1;
int i;

struct image image;
@@ -6141,6 +6238,13 @@ static const struct command_registration target_exec_command_handlers[] = {
.help = "step one instruction from current PC or address",
.usage = "[address]",
},
{
.name = "mdd",
.handler = handle_md_command,
.mode = COMMAND_EXEC,
.help = "display memory words",
.usage = "['phys'] address [count]",
},
{
.name = "mdw",
.handler = handle_md_command,
@@ -6162,6 +6266,13 @@ static const struct command_registration target_exec_command_handlers[] = {
.help = "display memory bytes",
.usage = "['phys'] address [count]",
},
{
.name = "mwd",
.handler = handle_mw_command,
.mode = COMMAND_EXEC,
.help = "write memory word",
.usage = "['phys'] address value [count]",
},
{
.name = "mww",
.handler = handle_mw_command,


+ 26
- 21
src/target/target.h View File

@@ -93,7 +93,7 @@ enum target_endianness {
};

struct working_area {
uint32_t address;
target_addr_t address;
uint32_t size;
bool free;
uint8_t *backup;
@@ -156,9 +156,9 @@ struct target {
uint32_t working_area; /* working area (initialised RAM). Evaluated
* upon first allocation from virtual/physical address. */
bool working_area_virt_spec; /* virtual address specified? */
uint32_t working_area_virt; /* virtual address */
target_addr_t working_area_virt; /* virtual address */
bool working_area_phys_spec; /* physical address specified? */
uint32_t working_area_phys; /* physical address */
target_addr_t working_area_phys; /* physical address */
uint32_t working_area_size; /* size in bytes */
uint32_t backup_working_area; /* whether the content of the working area has to be preserved */
struct working_area *working_areas;/* list of allocated working areas */
@@ -353,7 +353,7 @@ int target_unregister_trace_callback(
* yet it is possible to detect error conditions.
*/
int target_poll(struct target *target);
int target_resume(struct target *target, int current, uint32_t address,
int target_resume(struct target *target, int current, target_addr_t address,
int handle_breakpoints, int debug_execution);
int target_halt(struct target *target);
int target_call_event_callbacks(struct target *target, enum target_event event);
@@ -474,7 +474,7 @@ int target_get_gdb_reg_list(struct target *target,
* This routine is a wrapper for target->type->step.
*/
int target_step(struct target *target,
int current, uint32_t address, int handle_breakpoints);
int current, target_addr_t address, int handle_breakpoints);
/**
* Run an algorithm on the @a target given.
*
@@ -527,9 +527,9 @@ int target_run_flash_async_algorithm(struct target *target,
* This routine is a wrapper for target->type->read_memory.
*/
int target_read_memory(struct target *target,
uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer);
int target_read_phys_memory(struct target *target,
uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer);
/**
* Write @a count items of @a size bytes to the memory of @a target at
* the @a address given. @a address must be aligned to @a size
@@ -548,9 +548,9 @@ int target_read_phys_memory(struct target *target,
* This routine is wrapper for target->type->write_memory.
*/
int target_write_memory(struct target *target,
uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer);
target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer);
int target_write_phys_memory(struct target *target,
uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer);
target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer);

/*
* Write to target memory using the virtual address.
@@ -577,13 +577,13 @@ int target_write_phys_memory(struct target *target,
* peripheral registers which do not support byte operations.
*/
int target_write_buffer(struct target *target,
uint32_t address, uint32_t size, const uint8_t *buffer);
target_addr_t address, uint32_t size, const uint8_t *buffer);
int target_read_buffer(struct target *target,
uint32_t address, uint32_t size, uint8_t *buffer);
target_addr_t address, uint32_t size, uint8_t *buffer);
int target_checksum_memory(struct target *target,
uint32_t address, uint32_t size, uint32_t *crc);
target_addr_t address, uint32_t size, uint32_t *crc);
int target_blank_check_memory(struct target *target,
uint32_t address, uint32_t size, uint32_t *blank, uint8_t erased_value);
target_addr_t address, uint32_t size, uint32_t *blank, uint8_t erased_value);
int target_wait_state(struct target *target, enum target_state state, int ms);

/**
@@ -659,14 +659,19 @@ void target_buffer_set_u64_array(struct target *target, uint8_t *buffer, uint32_
void target_buffer_set_u32_array(struct target *target, uint8_t *buffer, uint32_t count, const uint32_t *srcbuf);
void target_buffer_set_u16_array(struct target *target, uint8_t *buffer, uint32_t count, const uint16_t *srcbuf);

int target_read_u64(struct target *target, uint64_t address, uint64_t *value);
int target_read_u32(struct target *target, uint32_t address, uint32_t *value);
int target_read_u16(struct target *target, uint32_t address, uint16_t *value);
int target_read_u8(struct target *target, uint32_t address, uint8_t *value);
int target_write_u64(struct target *target, uint64_t address, uint64_t value);
int target_write_u32(struct target *target, uint32_t address, uint32_t value);
int target_write_u16(struct target *target, uint32_t address, uint16_t value);
int target_write_u8(struct target *target, uint32_t address, uint8_t value);
int target_read_u64(struct target *target, target_addr_t address, uint64_t *value);
int target_read_u32(struct target *target, target_addr_t address, uint32_t *value);
int target_read_u16(struct target *target, target_addr_t address, uint16_t *value);
int target_read_u8(struct target *target, target_addr_t address, uint8_t *value);
int target_write_u64(struct target *target, target_addr_t address, uint64_t value);
int target_write_u32(struct target *target, target_addr_t address, uint32_t value);
int target_write_u16(struct target *target, target_addr_t address, uint16_t value);
int target_write_u8(struct target *target, target_addr_t address, uint8_t value);

int target_write_phys_u64(struct target *target, target_addr_t address, uint64_t value);
int target_write_phys_u32(struct target *target, target_addr_t address, uint32_t value);
int target_write_phys_u16(struct target *target, target_addr_t address, uint16_t value);
int target_write_phys_u8(struct target *target, target_addr_t address, uint8_t value);

/* Issues USER() statements with target state information */
int target_arch_state(struct target *target);


+ 16
- 17
src/target/target_type.h View File

@@ -53,11 +53,10 @@ struct target_type {

/* halt will log a warning, but return ERROR_OK if the target is already halted. */
int (*halt)(struct target *target);
int (*resume)(struct target *target, int current, uint32_t address,
int (*resume)(struct target *target, int current, target_addr_t address,
int handle_breakpoints, int debug_execution);
int (*step)(struct target *target, int current, uint32_t address,
int (*step)(struct target *target, int current, target_addr_t address,
int handle_breakpoints);

/* target reset control. assert reset can be invoked when OpenOCD and
* the target is out of sync.
*
@@ -111,26 +110,26 @@ struct target_type {
* Target memory read callback. Do @b not call this function
* directly, use target_read_memory() instead.
*/
int (*read_memory)(struct target *target, uint32_t address,
int (*read_memory)(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer);
/**
* Target memory write callback. Do @b not call this function
* directly, use target_write_memory() instead.
*/
int (*write_memory)(struct target *target, uint32_t address,
int (*write_memory)(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer);

/* Default implementation will do some fancy alignment to improve performance, target can override */
int (*read_buffer)(struct target *target, uint32_t address,
int (*read_buffer)(struct target *target, target_addr_t address,
uint32_t size, uint8_t *buffer);

/* Default implementation will do some fancy alignment to improve performance, target can override */
int (*write_buffer)(struct target *target, uint32_t address,
int (*write_buffer)(struct target *target, target_addr_t address,
uint32_t size, const uint8_t *buffer);

int (*checksum_memory)(struct target *target, uint32_t address,
int (*checksum_memory)(struct target *target, target_addr_t address,
uint32_t count, uint32_t *checksum);
int (*blank_check_memory)(struct target *target, uint32_t address,
int (*blank_check_memory)(struct target *target, target_addr_t address,
uint32_t count, uint32_t *blank, uint8_t erased_value);

/*
@@ -175,15 +174,15 @@ struct target_type {
*/
int (*run_algorithm)(struct target *target, int num_mem_params,
struct mem_param *mem_params, int num_reg_params,
struct reg_param *reg_param, uint32_t entry_point,
uint32_t exit_point, int timeout_ms, void *arch_info);
struct reg_param *reg_param, target_addr_t entry_point,
target_addr_t exit_point, int timeout_ms, void *arch_info);
int (*start_algorithm)(struct target *target, int num_mem_params,
struct mem_param *mem_params, int num_reg_params,
struct reg_param *reg_param, uint32_t entry_point,
uint32_t exit_point, void *arch_info);
struct reg_param *reg_param, target_addr_t entry_point,
target_addr_t exit_point, void *arch_info);
int (*wait_algorithm)(struct target *target, int num_mem_params,
struct mem_param *mem_params, int num_reg_params,
struct reg_param *reg_param, uint32_t exit_point,
struct reg_param *reg_param, target_addr_t exit_point,
int timeout_ms, void *arch_info);

const struct command_registration *commands;
@@ -233,7 +232,7 @@ struct target_type {
/* translate from virtual to physical address. Default implementation is successful
* no-op(i.e. virtual==physical).
*/
int (*virt2phys)(struct target *target, uint32_t address, uint32_t *physical);
int (*virt2phys)(struct target *target, target_addr_t address, target_addr_t *physical);

/* read directly from physical memory. caches are bypassed and untouched.
*
@@ -243,13 +242,13 @@ struct target_type {
*
* Default implementation is to call read_memory.
*/
int (*read_phys_memory)(struct target *target, uint32_t phys_address,
int (*read_phys_memory)(struct target *target, target_addr_t phys_address,
uint32_t size, uint32_t count, uint8_t *buffer);

/*
* same as read_phys_memory, except that it writes...
*/
int (*write_phys_memory)(struct target *target, uint32_t phys_address,
int (*write_phys_memory)(struct target *target, target_addr_t phys_address,
uint32_t size, uint32_t count, const uint8_t *buffer);

int (*mmu)(struct target *target, int *enabled);


+ 44
- 41
src/target/x86_32_common.c View File

@@ -48,8 +48,8 @@ static int read_mem(struct target *t, uint32_t size,
uint32_t addr, uint8_t *buf);
static int write_mem(struct target *t, uint32_t size,
uint32_t addr, const uint8_t *buf);
static int calcaddr_physfromlin(struct target *t, uint32_t addr,
uint32_t *physaddr);
static int calcaddr_physfromlin(struct target *t, target_addr_t addr,
target_addr_t *physaddr);
static int read_phys_mem(struct target *t, uint32_t phys_address,
uint32_t size, uint32_t count, uint8_t *buffer);
static int write_phys_mem(struct target *t, uint32_t phys_address,
@@ -113,7 +113,7 @@ int x86_32_common_mmu(struct target *t, int *enabled)
return ERROR_OK;
}

int x86_32_common_virt2phys(struct target *t, uint32_t address, uint32_t *physical)
int x86_32_common_virt2phys(struct target *t, target_addr_t address, target_addr_t *physical)
{
struct x86_32_common *x86_32 = target_to_x86_32(t);

@@ -135,7 +135,7 @@ int x86_32_common_virt2phys(struct target *t, uint32_t address, uint32_t *physic
} else {
/* target halted in protected mode */
if (calcaddr_physfromlin(t, address, physical) != ERROR_OK) {
LOG_ERROR("%s failed to calculate physical address from 0x%08" PRIx32,
LOG_ERROR("%s failed to calculate physical address from " TARGET_ADDR_FMT,
__func__, address);
return ERROR_FAIL;
}
@@ -143,7 +143,7 @@ int x86_32_common_virt2phys(struct target *t, uint32_t address, uint32_t *physic
return ERROR_OK;
}

int x86_32_common_read_phys_mem(struct target *t, uint32_t phys_address,
int x86_32_common_read_phys_mem(struct target *t, target_addr_t phys_address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
struct x86_32_common *x86_32 = target_to_x86_32(t);
@@ -226,7 +226,7 @@ static int read_phys_mem(struct target *t, uint32_t phys_address,
return retval;
}

int x86_32_common_write_phys_mem(struct target *t, uint32_t phys_address,
int x86_32_common_write_phys_mem(struct target *t, target_addr_t phys_address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
struct x86_32_common *x86_32 = target_to_x86_32(t);
@@ -235,7 +235,7 @@ int x86_32_common_write_phys_mem(struct target *t, uint32_t phys_address,

check_not_halted(t);
if (!count || !buffer || !phys_address) {
LOG_ERROR("%s invalid params count=0x%" PRIx32 ", buf=%p, addr=0x%08" PRIx32,
LOG_ERROR("%s invalid params count=0x%" PRIx32 ", buf=%p, addr=" TARGET_ADDR_FMT,
__func__, count, buffer, phys_address);
return ERROR_COMMAND_ARGUMENT_INVALID;
}
@@ -444,7 +444,7 @@ static int write_mem(struct target *t, uint32_t size,
return retval;
}

int calcaddr_physfromlin(struct target *t, uint32_t addr, uint32_t *physaddr)
int calcaddr_physfromlin(struct target *t, target_addr_t addr, target_addr_t *physaddr)
{
uint8_t entry_buffer[8];

@@ -568,16 +568,16 @@ int calcaddr_physfromlin(struct target *t, uint32_t addr, uint32_t *physaddr)
return ERROR_OK;
}

int x86_32_common_read_memory(struct target *t, uint32_t addr,
int x86_32_common_read_memory(struct target *t, target_addr_t addr,
uint32_t size, uint32_t count, uint8_t *buf)
{
int retval = ERROR_OK;
struct x86_32_common *x86_32 = target_to_x86_32(t);
LOG_DEBUG("addr=0x%08" PRIx32 ", size=%" PRIu32 ", count=0x%" PRIx32 ", buf=%p",
LOG_DEBUG("addr=" TARGET_ADDR_FMT ", size=%" PRIu32 ", count=0x%" PRIx32 ", buf=%p",
addr, size, count, buf);
check_not_halted(t);
if (!count || !buf || !addr) {
LOG_ERROR("%s invalid params count=0x%" PRIx32 ", buf=%p, addr=0x%08" PRIx32,
LOG_ERROR("%s invalid params count=0x%" PRIx32 ", buf=%p, addr=" TARGET_ADDR_FMT,
__func__, count, buf, addr);
return ERROR_COMMAND_ARGUMENT_INVALID;
}
@@ -591,9 +591,10 @@ int x86_32_common_read_memory(struct target *t, uint32_t addr,
LOG_ERROR("%s could not disable paging", __func__);
return retval;
}
uint32_t physaddr = 0;
target_addr_t physaddr = 0;
if (calcaddr_physfromlin(t, addr, &physaddr) != ERROR_OK) {
LOG_ERROR("%s failed to calculate physical address from 0x%08" PRIx32, __func__, addr);
LOG_ERROR("%s failed to calculate physical address from " TARGET_ADDR_FMT,
__func__, addr);
retval = ERROR_FAIL;
}
/* TODO: !!! Watch out for page boundaries
@@ -603,7 +604,8 @@ int x86_32_common_read_memory(struct target *t, uint32_t addr,

if (retval == ERROR_OK
&& x86_32_common_read_phys_mem(t, physaddr, size, count, buf) != ERROR_OK) {
LOG_ERROR("%s failed to read memory from physical address 0x%08" PRIx32, __func__, physaddr);
LOG_ERROR("%s failed to read memory from physical address " TARGET_ADDR_FMT,
__func__, physaddr);
retval = ERROR_FAIL;
}
/* restore PG bit if it was cleared prior (regardless of retval) */
@@ -615,7 +617,8 @@ int x86_32_common_read_memory(struct target *t, uint32_t addr,
} else {
/* paging is off - linear address is physical address */
if (x86_32_common_read_phys_mem(t, addr, size, count, buf) != ERROR_OK) {
LOG_ERROR("%s failed to read memory from address 0%08" PRIx32, __func__, addr);
LOG_ERROR("%s failed to read memory from address " TARGET_ADDR_FMT,
__func__, addr);
retval = ERROR_FAIL;
}
}
@@ -623,16 +626,16 @@ int x86_32_common_read_memory(struct target *t, uint32_t addr,
return retval;
}

int x86_32_common_write_memory(struct target *t, uint32_t addr,
int x86_32_common_write_memory(struct target *t, target_addr_t addr,
uint32_t size, uint32_t count, const uint8_t *buf)
{
int retval = ERROR_OK;
struct x86_32_common *x86_32 = target_to_x86_32(t);
LOG_DEBUG("addr=0x%08" PRIx32 ", size=%" PRIu32 ", count=0x%" PRIx32 ", buf=%p",
LOG_DEBUG("addr=" TARGET_ADDR_FMT ", size=%" PRIu32 ", count=0x%" PRIx32 ", buf=%p",
addr, size, count, buf);
check_not_halted(t);
if (!count || !buf || !addr) {
LOG_ERROR("%s invalid params count=0x%" PRIx32 ", buf=%p, addr=0x%08" PRIx32,
LOG_ERROR("%s invalid params count=0x%" PRIx32 ", buf=%p, addr=" TARGET_ADDR_FMT,
__func__, count, buf, addr);
return ERROR_COMMAND_ARGUMENT_INVALID;
}
@@ -645,9 +648,9 @@ int x86_32_common_write_memory(struct target *t, uint32_t addr,
LOG_ERROR("%s could not disable paging", __func__);
return retval;
}
uint32_t physaddr = 0;
target_addr_t physaddr = 0;
if (calcaddr_physfromlin(t, addr, &physaddr) != ERROR_OK) {
LOG_ERROR("%s failed to calculate physical address from 0x%08" PRIx32,
LOG_ERROR("%s failed to calculate physical address from " TARGET_ADDR_FMT,
__func__, addr);
retval = ERROR_FAIL;
}
@@ -657,7 +660,7 @@ int x86_32_common_write_memory(struct target *t, uint32_t addr,
*/
if (retval == ERROR_OK
&& x86_32_common_write_phys_mem(t, physaddr, size, count, buf) != ERROR_OK) {
LOG_ERROR("%s failed to write memory to physical address 0x%08" PRIx32,
LOG_ERROR("%s failed to write memory to physical address " TARGET_ADDR_FMT,
__func__, physaddr);
retval = ERROR_FAIL;
}
@@ -671,7 +674,7 @@ int x86_32_common_write_memory(struct target *t, uint32_t addr,

/* paging is off - linear address is physical address */
if (x86_32_common_write_phys_mem(t, addr, size, count, buf) != ERROR_OK) {
LOG_ERROR("%s failed to write memory to address 0x%08" PRIx32,
LOG_ERROR("%s failed to write memory to address " TARGET_ADDR_FMT,
__func__, addr);
retval = ERROR_FAIL;
}
@@ -852,7 +855,7 @@ int x86_32_common_remove_watchpoint(struct target *t, struct watchpoint *wp)

int x86_32_common_add_breakpoint(struct target *t, struct breakpoint *bp)
{
LOG_DEBUG("type=%d, addr=0x%08" PRIx32, bp->type, bp->address);
LOG_DEBUG("type=%d, addr=" TARGET_ADDR_FMT, bp->type, bp->address);
if (check_not_halted(t))
return ERROR_TARGET_NOT_HALTED;
/* set_breakpoint() will return ERROR_TARGET_RESOURCE_NOT_AVAILABLE if all
@@ -863,7 +866,7 @@ int x86_32_common_add_breakpoint(struct target *t, struct breakpoint *bp)

int x86_32_common_remove_breakpoint(struct target *t, struct breakpoint *bp)
{
LOG_DEBUG("type=%d, addr=0x%08" PRIx32, bp->type, bp->address);
LOG_DEBUG("type=%d, addr=" TARGET_ADDR_FMT, bp->type, bp->address);
if (check_not_halted(t))
return ERROR_TARGET_NOT_HALTED;
if (bp->set)
@@ -1003,7 +1006,7 @@ static int unset_hwbp(struct target *t, struct breakpoint *bp)
debug_reg_list[hwbp_num].used = 0;
debug_reg_list[hwbp_num].bp_value = 0;

LOG_USER("%s hardware breakpoint %" PRIu32 " removed from 0x%08" PRIx32 " (hwreg=%d)",
LOG_USER("%s hardware breakpoint %" PRIu32 " removed from " TARGET_ADDR_FMT " (hwreg=%d)",
__func__, bp->unique_id, bp->address, hwbp_num);
return ERROR_OK;
}
@@ -1012,7 +1015,7 @@ static int set_swbp(struct target *t, struct breakpoint *bp)
{
struct x86_32_common *x86_32 = target_to_x86_32(t);
LOG_DEBUG("id %" PRIx32, bp->unique_id);
uint32_t physaddr;
target_addr_t physaddr;
uint8_t opcode = SW_BP_OPCODE;
uint8_t readback;

@@ -1032,7 +1035,7 @@ static int set_swbp(struct target *t, struct breakpoint *bp)
return ERROR_FAIL;

if (readback != SW_BP_OPCODE) {
LOG_ERROR("%s software breakpoint error at 0x%08" PRIx32 ", check memory",
LOG_ERROR("%s software breakpoint error at " TARGET_ADDR_FMT ", check memory",
__func__, bp->address);
LOG_ERROR("%s readback=0x%02" PRIx8 " orig=0x%02" PRIx8 "",
__func__, readback, *bp->orig_instr);
@@ -1059,7 +1062,7 @@ static int set_swbp(struct target *t, struct breakpoint *bp)
addto = addto->next;
addto->next = new_patch;
}
LOG_USER("%s software breakpoint %" PRIu32 " set at 0x%08" PRIx32,
LOG_USER("%s software breakpoint %" PRIu32 " set at " TARGET_ADDR_FMT,
__func__, bp->unique_id, bp->address);
return ERROR_OK;
}
@@ -1068,7 +1071,7 @@ static int unset_swbp(struct target *t, struct breakpoint *bp)
{
struct x86_32_common *x86_32 = target_to_x86_32(t);
LOG_DEBUG("id %" PRIx32, bp->unique_id);
uint32_t physaddr;
target_addr_t physaddr;
uint8_t current_instr;

/* check that user program has not modified breakpoint instruction */
@@ -1081,7 +1084,7 @@ static int unset_swbp(struct target *t, struct breakpoint *bp)
if (write_phys_mem(t, physaddr, 1, 1, bp->orig_instr))
return ERROR_FAIL;
} else {
LOG_ERROR("%s software breakpoint remove error at 0x%08" PRIx32 ", check memory",
LOG_ERROR("%s software breakpoint remove error at " TARGET_ADDR_FMT ", check memory",
__func__, bp->address);
LOG_ERROR("%s current=0x%02" PRIx8 " orig=0x%02" PRIx8 "",
__func__, current_instr, *bp->orig_instr);
@@ -1107,7 +1110,7 @@ static int unset_swbp(struct target *t, struct breakpoint *bp)
}
}

LOG_USER("%s software breakpoint %" PRIu32 " removed from 0x%08" PRIx32,
LOG_USER("%s software breakpoint %" PRIu32 " removed from " TARGET_ADDR_FMT,
__func__, bp->unique_id, bp->address);
return ERROR_OK;
}
@@ -1116,7 +1119,7 @@ static int set_breakpoint(struct target *t, struct breakpoint *bp)
{
int error = ERROR_OK;
struct x86_32_common *x86_32 = target_to_x86_32(t);
LOG_DEBUG("type=%d, addr=0x%08" PRIx32, bp->type, bp->address);
LOG_DEBUG("type=%d, addr=" TARGET_ADDR_FMT, bp->type, bp->address);
if (bp->set) {
LOG_ERROR("breakpoint already set");
return error;
@@ -1124,7 +1127,7 @@ static int set_breakpoint(struct target *t, struct breakpoint *bp)
if (bp->type == BKPT_HARD) {
error = set_hwbp(t, bp);
if (error != ERROR_OK) {
LOG_ERROR("%s error setting hardware breakpoint at 0x%08" PRIx32,
LOG_ERROR("%s error setting hardware breakpoint at " TARGET_ADDR_FMT,
__func__, bp->address);
return error;
}
@@ -1132,7 +1135,7 @@ static int set_breakpoint(struct target *t, struct breakpoint *bp)
if (x86_32->sw_bpts_supported(t)) {
error = set_swbp(t, bp);
if (error != ERROR_OK) {
LOG_ERROR("%s error setting software breakpoint at 0x%08" PRIx32,
LOG_ERROR("%s error setting software breakpoint at " TARGET_ADDR_FMT,
__func__, bp->address);
return error;
}
@@ -1147,7 +1150,7 @@ static int set_breakpoint(struct target *t, struct breakpoint *bp)

static int unset_breakpoint(struct target *t, struct breakpoint *bp)
{
LOG_DEBUG("type=%d, addr=0x%08" PRIx32, bp->type, bp->address);
LOG_DEBUG("type=%d, addr=" TARGET_ADDR_FMT, bp->type, bp->address);
if (!bp->set) {
LOG_WARNING("breakpoint not set");
return ERROR_OK;
@@ -1155,13 +1158,13 @@ static int unset_breakpoint(struct target *t, struct breakpoint *bp)

if (bp->type == BKPT_HARD) {
if (unset_hwbp(t, bp) != ERROR_OK) {
LOG_ERROR("%s error removing hardware breakpoint at 0x%08" PRIx32,
LOG_ERROR("%s error removing hardware breakpoint at " TARGET_ADDR_FMT,
__func__, bp->address);
return ERROR_FAIL;
}
} else {
if (unset_swbp(t, bp) != ERROR_OK) {
LOG_ERROR("%s error removing software breakpoint at 0x%08" PRIx32,
LOG_ERROR("%s error removing software breakpoint at " TARGET_ADDR_FMT,
__func__, bp->address);
return ERROR_FAIL;
}
@@ -1175,7 +1178,7 @@ static int set_watchpoint(struct target *t, struct watchpoint *wp)
struct x86_32_common *x86_32 = target_to_x86_32(t);
struct x86_32_dbg_reg *debug_reg_list = x86_32->hw_break_list;
int wp_num = 0;
LOG_DEBUG("type=%d, addr=0x%08" PRIx32, wp->rw, wp->address);
LOG_DEBUG("type=%d, addr=" TARGET_ADDR_FMT, wp->rw, wp->address);

if (wp->set) {
LOG_ERROR("%s watchpoint already set", __func__);
@@ -1220,7 +1223,7 @@ static int set_watchpoint(struct target *t, struct watchpoint *wp)
wp->set = wp_num + 1;
debug_reg_list[wp_num].used = 1;
debug_reg_list[wp_num].bp_value = wp->address;
LOG_USER("'%s' watchpoint %d set at 0x%08" PRIx32 " with length %" PRIu32 " (hwreg=%d)",
LOG_USER("'%s' watchpoint %d set at " TARGET_ADDR_FMT " with length %" PRIu32 " (hwreg=%d)",
wp->rw == WPT_READ ? "read" : wp->rw == WPT_WRITE ?
"write" : wp->rw == WPT_ACCESS ? "access" : "?",
wp->unique_id, wp->address, wp->length, wp_num);
@@ -1231,7 +1234,7 @@ static int unset_watchpoint(struct target *t, struct watchpoint *wp)
{
struct x86_32_common *x86_32 = target_to_x86_32(t);
struct x86_32_dbg_reg *debug_reg_list = x86_32->hw_break_list;
LOG_DEBUG("type=%d, addr=0x%08" PRIx32, wp->rw, wp->address);
LOG_DEBUG("type=%d, addr=" TARGET_ADDR_FMT, wp->rw, wp->address);
if (!wp->set) {
LOG_WARNING("watchpoint not set");
return ERROR_OK;
@@ -1249,7 +1252,7 @@ static int unset_watchpoint(struct target *t, struct watchpoint *wp)
debug_reg_list[wp_num].bp_value = 0;
wp->set = 0;

LOG_USER("'%s' watchpoint %d removed from 0x%08" PRIx32 " with length %" PRIu32 " (hwreg=%d)",
LOG_USER("'%s' watchpoint %d removed from " TARGET_ADDR_FMT " with length %" PRIu32 " (hwreg=%d)",
wp->rw == WPT_READ ? "read" : wp->rw == WPT_WRITE ?
"write" : wp->rw == WPT_ACCESS ? "access" : "?",
wp->unique_id, wp->address, wp->length, wp_num);


+ 5
- 5
src/target/x86_32_common.h View File

@@ -309,14 +309,14 @@ int x86_32_get_gdb_reg_list(struct target *t,
int x86_32_common_init_arch_info(struct target *target,
struct x86_32_common *x86_32);
int x86_32_common_mmu(struct target *t, int *enabled);
int x86_32_common_virt2phys(struct target *t, uint32_t address, uint32_t *physical);
int x86_32_common_read_phys_mem(struct target *t, uint32_t phys_address,
int x86_32_common_virt2phys(struct target *t, target_addr_t address, target_addr_t *physical);
int x86_32_common_read_phys_mem(struct target *t, target_addr_t phys_address,
uint32_t size, uint32_t count, uint8_t *buffer);
int x86_32_common_write_phys_mem(struct target *t, uint32_t phys_address,
int x86_32_common_write_phys_mem(struct target *t, target_addr_t phys_address,
uint32_t size, uint32_t count, const uint8_t *buffer);
int x86_32_common_read_memory(struct target *t, uint32_t addr,
int x86_32_common_read_memory(struct target *t, target_addr_t addr,
uint32_t size, uint32_t count, uint8_t *buf);
int x86_32_common_write_memory(struct target *t, uint32_t addr,
int x86_32_common_write_memory(struct target *t, target_addr_t addr,
uint32_t size, uint32_t count, const uint8_t *buf);
int x86_32_common_read_io(struct target *t, uint32_t addr,
uint32_t size, uint8_t *buf);


+ 14
- 12
src/target/xscale.c View File

@@ -59,7 +59,7 @@

/* forward declarations */
static int xscale_resume(struct target *, int current,
uint32_t address, int handle_breakpoints, int debug_execution);
target_addr_t address, int handle_breakpoints, int debug_execution);
static int xscale_debug_entry(struct target *);
static int xscale_restore_banked(struct target *);
static int xscale_get_reg(struct reg *reg);
@@ -1120,7 +1120,7 @@ static void xscale_free_trace_data(struct xscale_common *xscale)
}

static int xscale_resume(struct target *target, int current,
uint32_t address, int handle_breakpoints, int debug_execution)
target_addr_t address, int handle_breakpoints, int debug_execution)
{
struct xscale_common *xscale = target_to_xscale(target);
struct arm *arm = &xscale->arm;
@@ -1165,7 +1165,8 @@ static int xscale_resume(struct target *target, int current,
enum trace_mode saved_trace_mode;

/* there's a breakpoint at the current PC, we have to step over it */
LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 "", breakpoint->address);
LOG_DEBUG("unset breakpoint at " TARGET_ADDR_FMT "",
breakpoint->address);
xscale_unset_breakpoint(target, breakpoint);

/* calculate PC of next instruction */
@@ -1222,7 +1223,8 @@ static int xscale_resume(struct target *target, int current,
LOG_DEBUG("disable single-step");
xscale_disable_single_step(target);

LOG_DEBUG("set breakpoint at 0x%8.8" PRIx32 "", breakpoint->address);
LOG_DEBUG("set breakpoint at " TARGET_ADDR_FMT "",
breakpoint->address);
xscale_set_breakpoint(target, breakpoint);
}
}
@@ -1384,7 +1386,7 @@ static int xscale_step_inner(struct target *target, int current,
}

static int xscale_step(struct target *target, int current,
uint32_t address, int handle_breakpoints)
target_addr_t address, int handle_breakpoints)
{
struct arm *arm = target_to_arm(target);
struct breakpoint *breakpoint = NULL;
@@ -1778,7 +1780,7 @@ dirty:
return ERROR_OK;
}

static int xscale_read_memory(struct target *target, uint32_t address,
static int xscale_read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
struct xscale_common *xscale = target_to_xscale(target);
@@ -1786,7 +1788,7 @@ static int xscale_read_memory(struct target *target, uint32_t address,
uint32_t i;
int retval;

LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32,
LOG_DEBUG("address: " TARGET_ADDR_FMT ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32,
address,
size,
count);
@@ -1864,7 +1866,7 @@ static int xscale_read_memory(struct target *target, uint32_t address,
return ERROR_OK;
}

static int xscale_read_phys_memory(struct target *target, uint32_t address,
static int xscale_read_phys_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
struct xscale_common *xscale = target_to_xscale(target);
@@ -1879,13 +1881,13 @@ static int xscale_read_phys_memory(struct target *target, uint32_t address,
return ERROR_FAIL;
}

static int xscale_write_memory(struct target *target, uint32_t address,
static int xscale_write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
struct xscale_common *xscale = target_to_xscale(target);
int retval;

LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32,
LOG_DEBUG("address: " TARGET_ADDR_FMT ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32,
address,
size,
count);
@@ -1963,7 +1965,7 @@ static int xscale_write_memory(struct target *target, uint32_t address,
return ERROR_OK;
}

static int xscale_write_phys_memory(struct target *target, uint32_t address,
static int xscale_write_phys_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
struct xscale_common *xscale = target_to_xscale(target);
@@ -3093,7 +3095,7 @@ COMMAND_HANDLER(xscale_handle_cache_info_command)
}

static int xscale_virt2phys(struct target *target,
uint32_t virtual, uint32_t *physical)
target_addr_t virtual, target_addr_t *physical)
{
struct xscale_common *xscale = target_to_xscale(target);
uint32_t cb;


Loading…
Cancel
Save