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@@ -13,16 +13,17 @@ jtag newtap $CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id 1 |
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set TARGETNAME [format "%s.cpu" $CHIPNAME] |
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target create $TARGETNAME mips_m4k -endian big -chain-position $TARGETNAME |
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$TARGETNAME configure -event reset-init { |
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$TARGETNAME configure -event reset-halt-post { |
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#setup PLL to lowest common denominator 300/300/150 setting |
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mww 0xb8050000 0x000f40a3 # reset val + CPU:3 DDR:3 AHB:0 |
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mww 0xb8050000 0x800f40a3 # send to PLL |
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#next command will reset for PLL changes to take effect |
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mww 0xb8050008 3 # set reset_switch and clock_switch (resets SoC) |
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reset halt # let openocd know that it is in the reset state |
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} |
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#initialize_pll |
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$TARGETNAME configure -event reset-init { |
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#complete pll initialization |
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mww 0xb8050000 0x800f0080 # set sw_update bit |
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mww 0xb8050008 0 # clear reset_switch bit |
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mww 0xb8050000 0x800f00e8 # clr pwrdwn & bypass |
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