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@@ -2,6 +2,9 @@ |
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* Copyright (C) 2007 by Dominic Rath * |
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* Dominic.Rath@gmx.de * |
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* * |
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* Copyright (C) 2009 by Øyvind Harboe * |
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* oyvind.harboe@zylin.com * |
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* * |
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* This program is free software; you can redistribute it and/or modify * |
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* it under the terms of the GNU General Public License as published by * |
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* the Free Software Foundation; either version 2 of the License, or * |
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@@ -680,8 +683,40 @@ int arm926ejs_write_memory(struct target_s *target, uint32_t address, uint32_t s |
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arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info; |
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arm926ejs_common_t *arm926ejs = arm9tdmi->arch_info; |
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if ((retval = arm7_9_write_memory(target, address, size, count, buffer)) != ERROR_OK) |
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return retval; |
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/* FIX!!!! this should be cleaned up and made much more general. The |
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* plan is to write up and test on arm926ejs specifically and |
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* then generalize and clean up afterwards. */ |
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if ((count == 1) && ((size==2) || (size==4))) |
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{ |
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/* special case the handling of single word writes to bypass MMU |
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* to allow implementation of breakpoints in memory marked read only |
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* by MMU */ |
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if (arm926ejs->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled) |
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{ |
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/* flush and invalidate data cache |
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* |
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* MCR p15,0,p,c7,c10,1 - clean cache line using virtual address |
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* |
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*/ |
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retval = arm926ejs->write_cp15(target, 0, 1, 7, 10, address&~0x3); |
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if (retval != ERROR_OK) |
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return retval; |
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} |
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uint32_t pa; |
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retval = target->type->virt2phys(target, address, &pa); |
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if (retval != ERROR_OK) |
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return retval; |
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/* write directly to physical memory bypassing any read only MMU bits, etc. */ |
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retval = armv4_5_mmu_write_physical(target, &arm926ejs->armv4_5_mmu, pa, size, count, buffer); |
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if (retval != ERROR_OK) |
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return retval; |
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} else |
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{ |
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if ((retval = arm7_9_write_memory(target, address, size, count, buffer)) != ERROR_OK) |
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return retval; |
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} |
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/* If ICache is enabled, we have to invalidate affected ICache lines |
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* the DCache is forced to write-through, so we don't have to clean it here |
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