rename jtag_nsrst_delay as adapter_nsrst_delay

Globally rename "jtag_nsrst_delay" as "adapter_nsrst_delay", and move it
out of the "jtag" command group ...  it needs to be used with non-JTAG
transports

Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break.  That aid should Sunset in about a year.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

NEWS

@@ -10,6 +10,7 @@ JTAG Layer:
 	   convert your scripts to the new names, since those procedures
 	   will not be around forever.
 	   	jtag_khz	... is now adapter_khz
+		jtag_nsrst_delay ... is now adapter_nsrst_delay
 
 Boundary Scan:
 

doc/openocd.texi

@@ -2603,7 +2603,7 @@ stops issuing the reset.  For example, there may be chip or board
 requirements that all reset pulses last for at least a
 certain amount of time; and reset buttons commonly have
 hardware debouncing.
-Use the @command{jtag_nsrst_delay} and @command{jtag_ntrst_delay}
+Use the @command{adapter_nsrst_delay} and @command{jtag_ntrst_delay}
 commands to say when extra delays are needed.
 
 @item @emph{Drive type} ... Reset lines often have a pullup
@@ -2649,7 +2649,7 @@ after asserting nSRST (active-low system reset) before
 allowing it to be deasserted.
 @end deffn
 
-@deffn {Command} jtag_nsrst_delay milliseconds
+@deffn {Command} adapter_nsrst_delay milliseconds
 How long (in milliseconds) OpenOCD should wait after deasserting
 nSRST (active-low system reset) before starting new JTAG operations.
 When a board has a reset button connected to SRST line it will

src/jtag/core.c

@@ -93,7 +93,7 @@ static bool jtag_verify_capture_ir = true;
 static int jtag_verify = 1;
 
 /* how long the OpenOCD should wait before attempting JTAG communication after reset lines deasserted (in ms) */
-static int jtag_nsrst_delay = 0; /* default to no nSRST delay */
+static int adapter_nsrst_delay = 0; /* default to no nSRST delay */
 static int jtag_ntrst_delay = 0; /* default to no nTRST delay */
 static int jtag_nsrst_assert_width = 0; /* width of assertion */
 static int jtag_ntrst_assert_width = 0; /* width of assertion */
@@ -704,8 +704,8 @@ void jtag_add_reset(int req_tlr_or_trst, int req_srst)
 		}
 		else {
 			LOG_DEBUG("SRST line released");
-			if (jtag_nsrst_delay)
-				jtag_add_sleep(jtag_nsrst_delay * 1000);
+			if (adapter_nsrst_delay)
+				jtag_add_sleep(adapter_nsrst_delay * 1000);
 		}
 	}
 
@@ -1696,11 +1696,11 @@ int jtag_get_srst(void)
 
 void jtag_set_nsrst_delay(unsigned delay)
 {
-	jtag_nsrst_delay = delay;
+	adapter_nsrst_delay = delay;
 }
 unsigned jtag_get_nsrst_delay(void)
 {
-	return jtag_nsrst_delay;
+	return adapter_nsrst_delay;
 }
 void jtag_set_ntrst_delay(unsigned delay)
 {

src/jtag/startup.tcl

@@ -83,4 +83,5 @@ proc srst_asserted {} {
 # FIXME phase these aids out after about April 2011
 #
 proc jtag_khz args { eval adapter_khz $args }
+proc jtag_nsrst_delay args { eval adapter_nsrst_delay $args }
 # END MIGRATION AIDS

src/jtag/tcl.c

@@ -1291,7 +1291,7 @@ next:
 	return ERROR_OK;
 }
 
-COMMAND_HANDLER(handle_jtag_nsrst_delay_command)
+COMMAND_HANDLER(handle_adapter_nsrst_delay_command)
 {
 	if (CMD_ARGC > 1)
 		return ERROR_COMMAND_SYNTAX_ERROR;
@@ -1302,7 +1302,7 @@ COMMAND_HANDLER(handle_jtag_nsrst_delay_command)
 
 		jtag_set_nsrst_delay(delay);
 	}
-	command_print(CMD_CTX, "jtag_nsrst_delay: %u", jtag_get_nsrst_delay());
+	command_print(CMD_CTX, "adapter_nsrst_delay: %u", jtag_get_nsrst_delay());
 	return ERROR_OK;
 }
 
@@ -1618,6 +1618,13 @@ static const struct command_registration interface_command_handlers[] = {
 			"With or without argument, display current setting.",
 		.usage = "[khz]",
 	},
+	{
+		.name = "adapter_nsrst_delay",
+		.handler = handle_adapter_nsrst_delay_command,
+		.mode = COMMAND_ANY,
+		.help = "delay after deasserting srst in ms",
+		.usage = "[milliseconds]",
+	},
 	{
 		.name = "interface",
 		.handler = handle_interface_command,
@@ -1666,13 +1673,6 @@ static const struct command_registration jtag_command_handlers[] = {
 			"[trst_push_pull|trst_open_drain] "
 			"[srst_push_pull|srst_open_drain]",
 	},
-	{
-		.name = "jtag_nsrst_delay",
-		.handler = handle_jtag_nsrst_delay_command,
-		.mode = COMMAND_ANY,
-		.help = "delay after deasserting srst in ms",
-		.usage = "[milliseconds]",
-	},
 	{
 		.name = "jtag_ntrst_delay",
 		.handler = handle_jtag_ntrst_delay_command,

tcl/board/at91sam9g20-ek.cfg

@@ -32,7 +32,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 # affected by the board and type of JTAG adapter.  A value of 200 ms seems
 # to work reliably for the configuration listed in the file header above.
 
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
 # Set fallback clock to 1/6 of worst-case clock speed (which would be the 32.768 kHz slow clock).

tcl/board/crossbow_tech_imote2.cfg

@@ -4,7 +4,7 @@ set  CHIPNAME imote2
 source [find target/pxa270.cfg]
 
 # longer-than-normal reset delay
-jtag_nsrst_delay 800
+adapter_nsrst_delay 800
 
 reset_config trst_and_srst separate
 

tcl/board/csb732.cfg

@@ -3,7 +3,7 @@ source [find target/imx35.cfg]
 
 # Determined by trial and error
 reset_config trst_and_srst combined
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
 $_TARGETNAME configure -event gdb-attach { reset init }

tcl/board/digi_connectcore_wi-9c.cfg

@@ -36,7 +36,7 @@ if { [info exists CPUTAPID ] } {
 set _TARGETNAME $_CHIPNAME.cpu
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 0
 
 

tcl/board/ek-lm3s1968.cfg

@@ -16,7 +16,7 @@ source [find target/lm3s1968.cfg]
 # jtag speed
 adapter_khz 3000
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 
 #LM3S1968 Evaluation Board has only srst
 reset_config srst_only

tcl/board/ek-lm3s811.cfg

@@ -12,7 +12,7 @@ source [find target/lm3s811.cfg]
 # jtag speed
 adapter_khz 500
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 
 #LM3S811 Evaluation Board has only srst
 reset_config srst_only

tcl/board/ek-lm3s9b9x.cfg

@@ -11,7 +11,7 @@ source [find target/lm3s9b9x.cfg]
 # jtag speed
 adapter_khz 500
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 
 #LM3S9B9x Evaluation Board has only srst
 reset_config srst_only

tcl/board/ethernut3.cfg

@@ -20,7 +20,7 @@ flash bank $_FLASHNAME cfi 0x10000000 0x400000 2 2 $_TARGETNAME
 # Micrel MIC2775-29YM5 Supervisor
 # Reset output will remain active for 280ms (maximum)
 #
-jtag_nsrst_delay 300
+adapter_nsrst_delay 300
 jtag_ntrst_delay 300
 
 

tcl/board/hitex_lpc2929.cfg

@@ -2,7 +2,7 @@
 # http://www.hitex.com/
 
 # Delays on reset lines
-jtag_nsrst_delay 50
+adapter_nsrst_delay 50
 jtag_ntrst_delay 1
 
 # Maximum of 1/8 of clock frequency (XTAL = 16 MHz).

tcl/board/hitex_str9-comstick.cfg

@@ -7,7 +7,7 @@ source [find interface/hitex_str9-comstick.cfg]
 # set jtag speed
 adapter_khz 3000
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 #use combined on interfaces or targets that can't set TRST/SRST separately
 reset_config trst_and_srst

tcl/board/lubbock.cfg

@@ -4,7 +4,7 @@
 
 source [find target/pxa255.cfg]
 
-jtag_nsrst_delay 250
+adapter_nsrst_delay 250
 jtag_ntrst_delay 250
 
 # NOTE: until after pinmux and such are set up, only CS0 is

tcl/board/mini2440.cfg

@@ -112,7 +112,7 @@ target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME
 $_TARGETNAME configure -work-area-phys 0x40000000  -work-area-size 0x4000 -work-area-backup 1
 
 #reset configuration
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 reset_config trst_and_srst
 
@@ -141,7 +141,7 @@ reset_config trst_and_srst
 
     nand device s3c2440 0
 
-    jtag_nsrst_delay 100
+    adapter_nsrst_delay 100
     jtag_ntrst_delay 100
     reset_config trst_and_srst
     init

tcl/board/phytec_lpc3250.cfg

@@ -1,6 +1,6 @@
 source [find target/lpc3250.cfg]
 
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 1
 adapter_khz 200
 reset_config trst_and_srst separate

tcl/board/pxa255_sst.cfg

@@ -93,7 +93,7 @@ $_TARGETNAME configure -event reset-init {pxa255_sst_init}
 
 reset_config trst_and_srst
 
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
 #xscale debug_handler 0  0xFFFF0800      # debug handler base address

tcl/board/telo.cfg

@@ -16,7 +16,7 @@ source [find target/c100helper.tcl]
 jtag_nsrst_assert_width 100
 jtag_ntrst_assert_width 100
 # don't talk to JTAG after reset for: [ms]
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 reset_config trst_and_srst separate
 

tcl/interface/calao-usb-a9260.cfg

@@ -6,6 +6,6 @@
 # See calao-usb-a9260-c01.cfg and calao-usb-a9260-c02.cfg.
 #
 
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 

tcl/target/aduc702x.cfg

@@ -17,7 +17,7 @@ if { [info exists CPUTAPID] } {
    set  _CPUTAPID 0x3f0f0f0f
 }
 
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
 ## JTAG scan chain

tcl/target/ar71xx.cfg

@@ -1,7 +1,7 @@
 # Atheros AR71xx MIPS 24Kc SoC.
 # tested on PB44 refererence board
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 reset_config trst_and_srst

tcl/target/at91sam9260.cfg

@@ -26,7 +26,7 @@ reset_config trst_and_srst separate trst_push_pull srst_open_drain
 #
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
-jtag_nsrst_delay 300
+adapter_nsrst_delay 300
 jtag_ntrst_delay 200
 
 jtag_rclk 3

tcl/target/at91sam9260_ext_RAM_ext_flash.cfg

@@ -30,7 +30,7 @@ if { [info exists CPUTAPID ] } {
 reset_config trst_and_srst
 
 
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
 

tcl/target/at91sam9rl.cfg

@@ -26,7 +26,7 @@ reset_config trst_and_srst separate trst_push_pull srst_open_drain
 #
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
-jtag_nsrst_delay 300
+adapter_nsrst_delay 300
 jtag_ntrst_delay 200
 
 jtag_rclk 3

tcl/target/dragonite.cfg

@@ -26,6 +26,6 @@ set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME dragonite -endian $_ENDIAN -chain-position $_TARGETNAME
 
 reset_config trst_and_srst
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 

tcl/target/epc9301.cfg

@@ -20,7 +20,7 @@ if { [info exists CPUTAPID ] } {
 }
 
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 set _TARGETNAME $_CHIPNAME.cpu

tcl/target/feroceon.cfg

@@ -26,6 +26,6 @@ set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME feroceon -endian $_ENDIAN -chain-position $_TARGETNAME
 
 reset_config trst_and_srst
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 

tcl/target/imx31.cfg

@@ -3,7 +3,7 @@
 
 reset_config trst_and_srst srst_gates_jtag
 
-jtag_nsrst_delay 5
+adapter_nsrst_delay 5
 
 if { [info exists CHIPNAME] } {
    set  _CHIPNAME $CHIPNAME

tcl/target/lm3s6965.cfg

@@ -15,7 +15,7 @@ if { [info exists CPUTAPID ] } {
 # jtag speed
 adapter_khz 500
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 #LM3S6965 Evaluation Board has only srst

tcl/target/lpc1768.cfg

@@ -25,7 +25,7 @@ if { [info exists CPUTAPID ] } {
 }
 
 #delays on reset lines
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
 # LPC2000 & LPC1700 -> SRST causes TRST

tcl/target/lpc2103.cfg

@@ -22,7 +22,7 @@ if { [info exists CPUTAPID ] } {
 reset_config trst_and_srst srst_pulls_trst
 
 # reset delays
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID

tcl/target/lpc2124.cfg

@@ -24,7 +24,7 @@ if { [info exists CPUTAPID ] } {
 reset_config trst_and_srst srst_pulls_trst
 
 # reset delays
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 adapter_khz 1000

tcl/target/lpc2129.cfg

@@ -25,7 +25,7 @@ if { [info exists CPUTAPID ] } {
 reset_config trst_and_srst srst_pulls_trst
 
 # reset delays
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 #jtag scan chain

tcl/target/lpc2148.cfg

@@ -21,7 +21,7 @@ if { [info exists CPUTAPID ] } {
    set _CPUTAPID 0x4f1f0f0f
 }
 
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
 # NOTE!!! LPCs need reset pulled while RTCK is low. 0 to activate

tcl/target/lpc2294.cfg

@@ -17,7 +17,7 @@ if { [info exists CPUTAPID ] } {
    set _CPUTAPID 0xffffffff
 }
 
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
 #use combined on interfaces or targets that can't set TRST/SRST separately

tcl/target/lpc2378.cfg

@@ -19,7 +19,7 @@ if { [info exists CPUTAPID ] } {
 }
 
 #delays on reset lines
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
 # LPC2000 -> SRST causes TRST

tcl/target/lpc2478.cfg

@@ -19,7 +19,7 @@ if { [info exists CPUTAPID ] } {
 }
 
 #delays on reset lines
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 # LPC2000 -> SRST causes TRST

tcl/target/mega128.cfg

@@ -7,7 +7,7 @@
 adapter_khz 4500
 
 reset_config  srst_only
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 
 #jtag scan chain
 if { [info exists CPUTAPID ] } {

tcl/target/netx500.cfg

@@ -20,7 +20,7 @@ if { [info exists CPUTAPID ] } {
 
 # FIXME most reset config belongs in board code
 reset_config trst_and_srst
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 # jtag scan chain

tcl/target/omap5912.cfg

@@ -14,7 +14,7 @@ if { [info exists CPUTAPID ] } {
    set _CPUTAPID 0x0692602f
 }
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 
 # NOTE:  presumes irlen 38 is the C55x DSP, matching BSDL for
 # its standalone siblings (like TMS320VC5502) of the same era

tcl/target/pic32mx.cfg

@@ -26,7 +26,7 @@ if { [info exists WORKAREASIZE] } {
 }
 
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 #use combined on interfaces or targets that can't set TRST/SRST separately

tcl/target/pxa270.cfg

@@ -28,9 +28,9 @@ if { [info exists CPUTAPID2 ] } {
 }
 
 
-# set jtag_nsrst_delay to the delay introduced by your reset circuit
+# set adapter_nsrst_delay to the delay introduced by your reset circuit
 # the rest of the needed delays are built into the openocd program
-jtag_nsrst_delay 260
+adapter_nsrst_delay 260
 # set the jtag_ntrst_delay to the delay introduced by a reset circuit
 # the rest of the needed delays are built into the openocd program
 jtag_ntrst_delay 250

tcl/target/pxa3xx.cfg

@@ -59,9 +59,9 @@ if { [info exists CPUTAPID_PXA32X_C0 ] } {
    set _CPUTAPID_PXA32X_C0 0x7E642013
 }
 
-# set jtag_nsrst_delay to the delay introduced by your reset circuit
+# set adapter_nsrst_delay to the delay introduced by your reset circuit
 # the rest of the needed delays are built into the openocd program
-jtag_nsrst_delay 260
+adapter_nsrst_delay 260
 
 # set the jtag_ntrst_delay to the delay introduced by a reset circuit
 # the rest of the needed delays are built into the openocd program

tcl/target/samsung_s3c6410.cfg

@@ -42,7 +42,7 @@ jtag newtap $_CHIPNAME cpu     -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm11 -endian $_ENDIAN  -chain-position $_TARGETNAME -variant arm1176
 
-jtag_nsrst_delay 500
+adapter_nsrst_delay 500
 jtag_ntrst_delay 500
 
 #reset configuration

tcl/target/smp8634.cfg

@@ -19,7 +19,7 @@ if { [info exists CPUTAPID ] } {
    set _CPUTAPID 0x08630001
 }
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 reset_config trst_and_srst separate

tcl/target/stm32.cfg

@@ -23,7 +23,7 @@ if { [info exists WORKAREASIZE] } {
 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
 adapter_khz 1000
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 #jtag scan chain

tcl/target/str730.cfg

@@ -27,7 +27,7 @@ reset_config trst_and_srst srst_pulls_trst
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
 
 #jtag nTRST and nSRST delay
-jtag_nsrst_delay 500
+adapter_nsrst_delay 500
 jtag_ntrst_delay 500
 
 set _TARGETNAME $_CHIPNAME.cpu

tcl/target/str750.cfg

@@ -29,7 +29,7 @@ reset_config trst_and_srst srst_pulls_trst
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
 
 #jtag nTRST and nSRST delay
-jtag_nsrst_delay 500
+adapter_nsrst_delay 500
 jtag_ntrst_delay 500
 
 set _TARGETNAME $_CHIPNAME.cpu

tcl/target/str912.cfg

@@ -15,7 +15,7 @@ if { [info exists ENDIAN] } {
 # jtag speed. We need to stick to 16kHz until we've finished reset.
 jtag_rclk 16
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 #use combined on interfaces or targets that can't set TRST/SRST separately

tcl/target/telo.cfg

@@ -16,7 +16,7 @@ source [find target/c100helper.tcl]
 jtag_nsrst_assert_width 100
 jtag_ntrst_assert_width 100
 # don't talk to JTAG after reset for: [ms]
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 reset_config trst_and_srst separate
 

tcl/target/tmpa900.cfg

@@ -32,7 +32,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 
 #use combined on interfaces or targets that can't set TRST/SRST separately
 reset_config trst_and_srst
-jtag_nsrst_delay 20
+adapter_nsrst_delay 20
 jtag_ntrst_delay 20
 
 ######################

tcl/target/tmpa910.cfg

@@ -32,7 +32,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 
 #use combined on interfaces or targets that can't set TRST/SRST separately
 reset_config trst_and_srst
-jtag_nsrst_delay 20
+adapter_nsrst_delay 20
 jtag_ntrst_delay 20
 
 ######################

tcl/target/xba_revA3.cfg

@@ -22,7 +22,7 @@ if { [info exists CPUTAPID ] } {
 
 reset_config trst_and_srst separate
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 #jtag scan chain

tcl/test/syntax1.cfg

@@ -1,4 +1,4 @@
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
 #use combined on interfaces or targets that can't set TRST/SRST separately